113 	outb(((dev & 0x7f) << 1) | 1, base + SMBXMITADD);  in smbus_block_read()
115 	outb(offset & 0xff, base + SMBHSTCMD);  in smbus_block_read()
117 	outb((inb(base + SMBHSTCTL) & (~(0x7) << 2)) | (0x5 << 2),  in smbus_block_read()
120 	outb(inb(base + SMBHSTSTAT), base + SMBHSTSTAT);  in smbus_block_read()
123 	outb((inb(base + SMBHSTCTL) | SMBHSTCNT_START), base + SMBHSTCTL);  in smbus_block_read()
173 	outb(((dev & 0x7f) << 1) & ~0x01, base + SMBXMITADD);  in smbus_block_write()
175 	outb(offset, base + SMBHSTCMD);  in smbus_block_write()
177 	outb((inb(base + SMBHSTCTL) & (~(0x7) << 2)) | (0x5 << 2),  in smbus_block_write()
180 	outb(inb(base + SMBHSTSTAT), base + SMBHSTSTAT);  in smbus_block_write()
183 	outb(len, base + SMBHSTDAT0);  in smbus_block_write()
187 		outb(*buffer++, base + SMBBLKDAT);  in smbus_block_write()
190 	outb((inb(base + SMBHSTCTL) | SMBHSTCNT_START), base + SMBHSTCTL);  in smbus_block_write()
262 	outb(inb(base + SMBHSTCTL) & ~SMBHSTCNT_INTREN, base + SMBHSTCTL);  in intel_i2c_probe()
265 	outb(inb(base + SMBAUXCTL) | SMBAUXCTL_E32B, base + SMBAUXCTL);  in intel_i2c_probe()