1a2927e09SBin Meng /*
2a2927e09SBin Meng * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
3a2927e09SBin Meng *
4a2927e09SBin Meng * SPDX-License-Identifier: GPL-2.0+
5a2927e09SBin Meng */
6a2927e09SBin Meng
7a2927e09SBin Meng #include <common.h>
8a2927e09SBin Meng #include <asm/io.h>
9a2927e09SBin Meng #include <asm/pnp_def.h>
10a2927e09SBin Meng
pnp_enter_conf_state(u16 dev)11a2927e09SBin Meng static void pnp_enter_conf_state(u16 dev)
12a2927e09SBin Meng {
13a2927e09SBin Meng u16 port = dev >> 8;
14a2927e09SBin Meng
15a2927e09SBin Meng outb(0x55, port);
16a2927e09SBin Meng }
17a2927e09SBin Meng
pnp_exit_conf_state(u16 dev)18a2927e09SBin Meng static void pnp_exit_conf_state(u16 dev)
19a2927e09SBin Meng {
20a2927e09SBin Meng u16 port = dev >> 8;
21a2927e09SBin Meng
22a2927e09SBin Meng outb(0xaa, port);
23a2927e09SBin Meng }
24a2927e09SBin Meng
lpc47m_enable_serial(uint dev,uint iobase,uint irq)25*c78dfb4fSBin Meng void lpc47m_enable_serial(uint dev, uint iobase, uint irq)
26a2927e09SBin Meng {
27a2927e09SBin Meng pnp_enter_conf_state(dev);
28a2927e09SBin Meng pnp_set_logical_device(dev);
29a2927e09SBin Meng pnp_set_enable(dev, 0);
30a2927e09SBin Meng pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
3119268834SBin Meng pnp_set_irq(dev, PNP_IDX_IRQ0, irq);
32a2927e09SBin Meng pnp_set_enable(dev, 1);
33a2927e09SBin Meng pnp_exit_conf_state(dev);
34a2927e09SBin Meng }
35*c78dfb4fSBin Meng
lpc47m_enable_kbc(uint dev,uint irq0,uint irq1)36*c78dfb4fSBin Meng void lpc47m_enable_kbc(uint dev, uint irq0, uint irq1)
37*c78dfb4fSBin Meng {
38*c78dfb4fSBin Meng pnp_enter_conf_state(dev);
39*c78dfb4fSBin Meng pnp_set_logical_device(dev);
40*c78dfb4fSBin Meng pnp_set_enable(dev, 0);
41*c78dfb4fSBin Meng pnp_set_irq(dev, PNP_IDX_IRQ0, irq0);
42*c78dfb4fSBin Meng pnp_set_irq(dev, PNP_IDX_IRQ1, irq1);
43*c78dfb4fSBin Meng pnp_set_enable(dev, 1);
44*c78dfb4fSBin Meng pnp_exit_conf_state(dev);
45*c78dfb4fSBin Meng }
46