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Searched refs:dev_dbg (Results 1 – 25 of 56) sorted by relevance

123

/rk3399_rockchip-uboot/drivers/usb/dwc3/
H A Ddwc3-omap.c220 dev_dbg(omap->dev, "ID GND\n"); in dwc3_omap_set_mailbox()
232 dev_dbg(omap->dev, "VBUS Connect\n"); in dwc3_omap_set_mailbox()
245 dev_dbg(omap->dev, "VBUS Disconnect\n"); in dwc3_omap_set_mailbox()
257 dev_dbg(omap->dev, "invalid state\n"); in dwc3_omap_set_mailbox()
269 dev_dbg(omap->dev, "DMA Disable was Cleared\n"); in dwc3_omap_interrupt()
274 dev_dbg(omap->dev, "OTG Event\n"); in dwc3_omap_interrupt()
277 dev_dbg(omap->dev, "DRVVBUS Rise\n"); in dwc3_omap_interrupt()
280 dev_dbg(omap->dev, "CHRGVBUS Rise\n"); in dwc3_omap_interrupt()
283 dev_dbg(omap->dev, "DISCHRGVBUS Rise\n"); in dwc3_omap_interrupt()
286 dev_dbg(omap->dev, "IDPULLUP Rise\n"); in dwc3_omap_interrupt()
[all …]
H A Dep0.c97 dev_dbg(dwc->dev, "%s STARTTRANSFER failed", dep->name); in dwc3_ep0_start_trans()
162 dev_dbg(dwc->dev, "too early for delayed status"); in __dwc3_gadget_ep0_queue()
226 dev_dbg(dwc->dev, "trying to queue request %p to disabled %s", in dwc3_gadget_ep0_queue()
505 dev_dbg(dwc->dev, "invalid device address %d", addr); in dwc3_ep0_set_address()
510 dev_dbg(dwc->dev, "trying to set address when configured"); in dwc3_ep0_set_address()
579 dev_dbg(dwc->dev, "resize FIFOs flag SET"); in dwc3_ep0_set_config()
801 dev_dbg(dwc->dev, "Setup Pending received"); in dwc3_ep0_complete_data()
889 dev_dbg(dwc->dev, "Invalid Test #%d", in dwc3_ep0_complete_status()
898 dev_dbg(dwc->dev, "Setup Pending received"); in dwc3_ep0_complete_status()
952 dev_dbg(dwc->dev, "failed to map request\n"); in __dwc3_ep0_do_control_data()
[all …]
H A Dgadget.c258 dev_dbg(dwc->dev, "request %p from %s completed %d/%d ===> %d\n", in dwc3_gadget_giveback()
915 dev_dbg(dwc->dev, "failed to send STARTTRANSFER command\n"); in __dwc3_gadget_kick_transfer()
1033 dev_dbg(dwc->dev, "%s: failed to kick transfers\n", in __dwc3_gadget_ep_queue()
1050 dev_dbg(dwc->dev, "%s: failed to kick transfers\n", in __dwc3_gadget_ep_queue()
1065 dev_dbg(dwc->dev, "%s: failed to kick transfers\n", in __dwc3_gadget_ep_queue()
1085 dev_dbg(dwc->dev, "trying to queue request %p to disabled %s\n", in dwc3_gadget_ep_queue()
1171 dev_dbg(dwc->dev, "%s: pending request, cannot halt\n", in __dwc3_gadget_ep_set_halt()
1296 dev_dbg(dwc->dev, "no wakeup on SuperSpeed\n"); in dwc3_gadget_wakeup()
1308 dev_dbg(dwc->dev, "can't wakeup from link state %d\n", in dwc3_gadget_wakeup()
1718 dev_dbg(dwc->dev, "incomplete IN transfer %s\n", in __dwc3_cleanup_done_trbs()
[all …]
/rk3399_rockchip-uboot/drivers/pinctrl/
H A Dpinctrl-single.c53 dev_dbg(dev, " invalid register offset 0x%08x\n", reg); in single_configure_pins()
70 dev_dbg(dev, " reg/val 0x%08x/0x%08x\n",reg, val); in single_configure_pins()
85 dev_dbg(dev, "configuring pins for %s\n", config->name); in single_set_state()
87 dev_dbg(dev, " invalid pin configuration in fdt\n"); in single_set_state()
115 dev_dbg(dev, "no valid base register address\n"); in single_ofdata_to_platdata()
H A Dpinctrl-generic.c25 dev_dbg(dev, "get_pins_count or get_pin_name missing\n"); in pinctrl_pin_name_to_selector()
56 dev_dbg(dev, "get_groups_count or get_group_name missing\n"); in pinctrl_group_name_to_selector()
88 dev_dbg(dev, in pinmux_func_name_to_selector()
122 dev_dbg(dev, "pinmux_group_set op missing\n"); in pinmux_enable_setting()
129 dev_dbg(dev, "pinmux_set op missing\n"); in pinmux_enable_setting()
165 dev_dbg(dev, "pinconf_num_params or pinconf_params missing\n"); in pinconf_prop_name_to_param()
201 dev_dbg(dev, "pinconf_group_set op missing\n"); in pinconf_enable_setting()
209 dev_dbg(dev, "pinconf_set op missing\n"); in pinconf_enable_setting()
H A Dpinctrl-uclass.c193 dev_dbg(dev, "%s: dev_read_phandle_with_args: err=%d\n", in pinctrl_gpio_get_pinctrl_and_offset()
201 dev_dbg(dev, in pinctrl_gpio_get_pinctrl_and_offset()
212 dev_dbg(dev, in pinctrl_gpio_get_pinctrl_and_offset()
305 dev_dbg(dev, "set_state_simple op missing\n"); in pinctrl_select_state_simple()
411 dev_dbg(dev, "ops is not set. Do not bind.\n"); in pinctrl_post_bind()
/rk3399_rockchip-uboot/drivers/usb/musb-new/
H A Dmusb_gadget.c194 dev_dbg(musb->controller, "%s done request %p, %d/%d\n", in musb_g_giveback()
198 dev_dbg(musb->controller, "%s request %p, %d/%d fault %d\n", in musb_g_giveback()
243 dev_dbg(musb->controller, "%s: abort DMA --> %d\n", in nuke()
327 dev_dbg(musb->controller, "ep:%s disabled - ignore request\n", in txstate()
334 dev_dbg(musb->controller, "dma pending...\n"); in txstate()
346 dev_dbg(musb->controller, "%s old packet still ready , txcsr %03x\n", in txstate()
352 dev_dbg(musb->controller, "%s stalling, txcsr %03x\n", in txstate()
357 dev_dbg(musb->controller, "hw_ep%d, maxpacket %d, fifo count %d, txcsr %03x\n", in txstate()
474 dev_dbg(musb->controller, "%s TX/IN %s len %d/%d, txcsr %04x, fifo %d/%d\n", in txstate()
501 dev_dbg(musb->controller, "<== %s, txcsr %04x\n", musb_ep->end_point.name, csr); in musb_g_tx()
[all …]
H A Dmusb_host.c101 dev_dbg(musb->controller, "Host TX FIFONOTEMPTY csr: %02x\n", csr); in musb_h_tx_flush_fifo()
229 dev_dbg(musb->controller, "qh %p urb %p dev%d ep%d%s%s, hw_ep %d, %p/%d\n", in musb_start_urb()
256 dev_dbg(musb->controller, "check whether there's still time for periodic Tx\n"); in musb_start_urb()
273 dev_dbg(musb->controller, "SOF for %d\n", epnum); in musb_start_urb()
283 dev_dbg(musb->controller, "Start TX%d %s\n", epnum, in musb_start_urb()
298 dev_dbg(musb->controller, in musb_giveback()
421 dev_dbg(musb->controller, "... next ep%d %cX urb %p\n", in musb_advance_schedule()
466 dev_dbg(musb->controller, "RX%d count %d, buffer %p len %d/%d\n", epnum, rx_count, in musb_host_packet_rx()
489 dev_dbg(musb->controller, "** OVERFLOW %d into %d\n", rx_count, length); in musb_host_packet_rx()
508 dev_dbg(musb->controller, "** OVERFLOW %d into %d\n", rx_count, length); in musb_host_packet_rx()
[all …]
H A Dmusb_core.c224 dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n", in musb_write_fifo()
264 dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n", in musb_read_fifo()
345 dev_dbg(musb->controller, "HNP: b_wait_acon timeout; back to b_peripheral\n"); in musb_otg_timer_func()
352 dev_dbg(musb->controller, "HNP: %s timeout\n", in musb_otg_timer_func()
358 dev_dbg(musb->controller, "HNP: Unhandled mode %s\n", in musb_otg_timer_func()
374 dev_dbg(musb->controller, "HNP: stop from %s\n", otg_state_string(musb->xceiv->state)); in musb_hnp_stop()
379 dev_dbg(musb->controller, "HNP: back to %s\n", in musb_hnp_stop()
383 dev_dbg(musb->controller, "HNP: Disabling HR\n"); in musb_hnp_stop()
393 dev_dbg(musb->controller, "HNP: Stopping in unknown state %s\n", in musb_hnp_stop()
426 dev_dbg(musb->controller, "<== Power=%02x, DevCtl=%02x, int_usb=0x%x\n", power, devctl, in musb_stage0_irq()
[all …]
H A Dmusb_gadget_ep0.c191 dev_dbg(musb->controller, "HNP: Setting HR\n"); in musb_try_b_hnp_enable()
288 dev_dbg(musb->controller, "restarting the request\n"); in service_zero_data_request()
533 dev_dbg(musb->controller, "odd; csr0 %04x\n", musb_readw(regs, MUSB_CSR0)); in ep0_txstate()
590 dev_dbg(musb->controller, "SETUP req%02x.%02x v%04x i%04x l%d\n", in musb_read_setup()
658 dev_dbg(musb->controller, "csr %04x, count %d, myaddr %d, ep0stage %s\n", in musb_g_ep0_irq()
737 dev_dbg(musb->controller, "entering TESTMODE\n"); in musb_g_ep0_irq()
849 dev_dbg(musb->controller, "handled %d, csr %04x, ep0stage %s\n", in musb_g_ep0_irq()
866 dev_dbg(musb->controller, "stall (%d)\n", handled); in musb_g_ep0_irq()
946 dev_dbg(musb->controller, "ep0 request queued in state %d\n", in musb_g_ep0_queue()
955 dev_dbg(musb->controller, "queue to %s (%s), length=%d\n", in musb_g_ep0_queue()
[all …]
H A Dmusb_dsps.c216 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, in otg_timer()
272 dev_dbg(musb->controller, "%s active, deleting timer\n", in dsps_musb_try_idle()
280 dev_dbg(musb->controller, in dsps_musb_try_idle()
286 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", in dsps_musb_try_idle()
328 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", in dsps_interrupt()
381 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", in dsps_interrupt()
H A Dam35x.c152 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, in otg_timer()
204 dev_dbg(musb->controller, "%s active, deleting timer\n", in am35x_musb_try_idle()
212 dev_dbg(musb->controller, "Longer idle timer already pending, ignoring...\n"); in am35x_musb_try_idle()
217 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", in am35x_musb_try_idle()
322 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", in am35x_musb_interrupt()
/rk3399_rockchip-uboot/drivers/usb/cdns3/
H A Ddrd.c43 dev_dbg(cdns->dev, "Set controller to OTG mode\n"); in cdns3_set_mode()
74 dev_dbg(cdns->dev, "OTG ID: %d", id); in cdns3_get_id()
84 dev_dbg(cdns->dev, "OTG VBUS: %d", vbus); in cdns3_get_vbus()
126 dev_dbg(cdns->dev, "Waiting till Host mode is turned on\n"); in cdns3_drd_switch_host()
163 dev_dbg(cdns->dev, "Waiting till Device mode is turned on\n"); in cdns3_drd_switch_gadget()
282 dev_dbg(cdns->dev, "Controller strapped to HOST\n"); in cdns3_drd_init()
285 dev_dbg(cdns->dev, "Controller strapped to PERIPHERAL\n"); in cdns3_drd_init()
H A Dcore.c234 dev_dbg(cdns->dev, "role %d -> %d\n", cdns->role, role); in cdsn3_hw_role_state_machine()
300 dev_dbg(cdns->dev, "Switching role %d -> %d", current_role, real_role); in cdns3_hw_role_switch()
363 dev_dbg(dev, "Cadence USB3 core: probe succeed\n"); in cdns3_probe()
/rk3399_rockchip-uboot/drivers/pinctrl/nxp/
H A Dpinctrl-imx.c30 dev_dbg(dev, "%s: %s\n", __func__, config->name); in imx_pinctrl_set_state()
91 dev_dbg(dev, "mux_reg 0x%x, conf_reg 0x%x, input_reg 0x%x, " in imx_pinctrl_set_state()
109 dev_dbg(dev, "write mux: offset 0x%x val 0x%x\n", mux_reg, in imx_pinctrl_set_state()
153 dev_dbg(dev, "select_input: offset 0x%x val 0x%x\n", in imx_pinctrl_set_state()
166 dev_dbg(dev, "write config: offset 0x%x val 0x%x\n", in imx_pinctrl_set_state()
232 dev_dbg(dev, "initialized IMX pinctrl driver\n"); in imx_pinctrl_probe()
/rk3399_rockchip-uboot/drivers/mtd/spi/
H A Dspi-nor-tiny.c57 dev_dbg(&flash->spimem->spi->dev, "error %d reading %x\n", ret, in spi_nor_read_reg()
124 dev_dbg(nor->dev, "error %d reading CR\n", ret); in read_cr()
365 dev_dbg(nor->dev, "error %d reading JEDEC ID\n", tmp); in spi_nor_read_id()
376 dev_dbg(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n", in spi_nor_read_id()
387 dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len); in spi_nor_read()
477 dev_dbg(nor->dev, in write_sr_cr()
484 dev_dbg(nor->dev, in write_sr_cr()
513 dev_dbg(dev, "error while reading configuration register\n"); in spansion_read_cr_quad_enable()
525 dev_dbg(dev, "error while reading status register\n"); in spansion_read_cr_quad_enable()
537 dev_dbg(nor->dev, "Spansion Quad bit not set\n"); in spansion_read_cr_quad_enable()
[all …]
H A Dspi-nor-core.c57 dev_dbg(&flash->spimem->spi->dev, "error %d reading %x\n", ret, in spi_nor_read_reg()
192 dev_dbg(nor->dev, "error %d reading CR\n", ret); in read_cr()
379 dev_dbg(nor->dev, "Erase Error occurred\n"); in spi_nor_sr_ready()
381 dev_dbg(nor->dev, "Programming Error occurred\n"); in spi_nor_sr_ready()
562 dev_dbg(nor->dev, "at 0x%llx, len %lld\n", (long long)instr->addr, in spi_nor_erase()
903 dev_dbg(nor->dev, "error %d reading JEDEC ID\n", tmp); in spi_nor_read_id()
926 dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len); in spi_nor_read()
1181 dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len); in sst_write()
1256 dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len); in spi_nor_write()
1365 dev_dbg(nor->dev, in write_sr_cr()
[all …]
/rk3399_rockchip-uboot/drivers/gpio/
H A Dnca9539_gpio.c83 dev_dbg(dev, "%s offset(%d)\n", __func__, offset); in nca9539_gpio_get_direction()
105 dev_dbg(dev, "%s offset(%d)\n", __func__, offset); in nca9539_gpio_direction_input()
131 dev_dbg(dev, "%s offset(%d) val(%d)\n", __func__, offset, val); in nca9539_gpio_direction_output()
168 dev_dbg(dev, "%s offset(%d)\n", __func__, offset); in nca9539_gpio_get()
196 dev_dbg(dev, "%s offset(%d) val(%d)\n", __func__, offset, val); in nca9539_gpio_set()
281 dev_dbg(dev, "%s is ready\n", str); in nca9539_probe()
H A D74x164_gpio.c154 dev_dbg(dev, "No registers-default property\n"); in gen_74x164_probe()
159 dev_dbg(dev, "No oe-pins property\n"); in gen_74x164_probe()
169 dev_dbg(dev, "%s is ready\n", dev->name); in gen_74x164_probe()
/rk3399_rockchip-uboot/drivers/pci/
H A Dpcie_dw_rockchip.c50 #define dev_dbg dev_err macro
52 #define dev_dbg(dev, fmt, ...) \ macro
443 …dev_dbg(pci->dev, "ATU programmed with: index: %d, type: %d, cpu addr: %8llx, pci addr: %8llx, siz… in rk_pcie_prog_outbound_atu_unroll()
807 dev_dbg(dev, "DBI address is 0x%p\n", priv->dbi_base); in rockchip_pcie_parse_dt()
813 dev_dbg(dev, "APB address is 0x%p\n", priv->apb_base); in rockchip_pcie_parse_dt()
912 dev_dbg(dev, "Config space: [0x%p - 0x%p, size 0x%llx]\n", in rockchip_pcie_probe()
916 dev_dbg(dev, "IO space: [0x%llx - 0x%llx, size 0x%llx]\n", in rockchip_pcie_probe()
920 dev_dbg(dev, "IO bus: [0x%llx - 0x%llx, size 0x%llx]\n", in rockchip_pcie_probe()
924 dev_dbg(dev, "MEM32 space: [0x%llx - 0x%llx, size 0x%llx]\n", in rockchip_pcie_probe()
928 dev_dbg(dev, "MEM32 bus: [0x%llx - 0x%llx, size 0x%llx]\n", in rockchip_pcie_probe()
[all …]
/rk3399_rockchip-uboot/drivers/spi/
H A Drockchip_sfc.c221 dev_dbg(sfc->dev, "reset\n"); in rockchip_sfc_reset()
374 dev_dbg(sfc->dev, "sfc Enable ahb clock fail %s: %d\n", bus->name, ret); in rockchip_sfc_probe()
378 dev_dbg(sfc->dev, "sfc Enable clock fail for %s: %d\n", bus->name, ret); in rockchip_sfc_probe()
413 dev_dbg(sfc->dev, "sfc wait tx fifo timeout\n"); in rockchip_sfc_wait_txfifo_ready()
430 dev_dbg(sfc->dev, "sfc wait rx fifo timeout\n"); in rockchip_sfc_wait_rxfifo_ready()
529 dev_dbg(sfc->dev, "sfc addr.nbytes=%x(x%d) dummy.nbytes=%x(x%d)\n", in rockchip_sfc_xfer_setup()
532 dev_dbg(sfc->dev, "sfc ctrl=%x cmd=%x addr=%llx len=%x cs=%x\n", in rockchip_sfc_xfer_setup()
618 dev_dbg(sfc->dev, "sfc xfer_poll len=%x\n", len); in rockchip_sfc_xfer_data_poll()
634 dev_dbg(sfc->dev, "sfc xfer_dma len=%x\n", len); in rockchip_sfc_xfer_data_dma()
668 dev_dbg(sfc->dev, "xfer_dma_async len=%x %p\n", len, dma_buf); in rockchip_sfc_xfer_data_dma_async()
[all …]
/rk3399_rockchip-uboot/drivers/phy/
H A Dphy-rockchip-inno-usb3.c281 dev_dbg(u3phy->dev, "deassert APB bus interface reset\n"); in rockchip_u3phy_rest_deassert()
290 dev_dbg(u3phy->dev, "deassert u2 and u3 phy power on reset\n"); in rockchip_u3phy_rest_deassert()
299 dev_dbg(u3phy->dev, "deassert pipe and utmi MAC reset\n"); in rockchip_u3phy_rest_deassert()
310 dev_dbg(u3phy->dev, "assert u3phy reset\n"); in rockchip_u3phy_rest_assert()
340 dev_dbg(u3phy->dev, "u3phy port initialize\n"); in rockchip_u3phy_port_init()
360 dev_dbg(u3phy->dev, "do u3phy tuning\n"); in rockchip_u3phy_port_init()
481 dev_dbg(u3phy->dev, "switch to 25m refclk\n"); in rk3328_u3phy_tuning()
/rk3399_rockchip-uboot/include/dm/
H A Ddevice.h890 #ifdef dev_dbg
891 #undef dev_dbg
937 #define dev_dbg(dev, fmt, ...) \ macro
940 #define dev_dbg(dev, fmt, ...) \ macro
948 #define dev_vdbg dev_dbg
/rk3399_rockchip-uboot/drivers/firmware/scmi/
H A Dsmt.c72 dev_dbg(dev, "Channel busy\n"); in scmi_write_msg_to_smt()
78 dev_dbg(dev, "Buffer too small\n"); in scmi_write_msg_to_smt()
/rk3399_rockchip-uboot/include/linux/
H A Dcompat.h20 #ifdef dev_dbg
21 #undef dev_dbg
36 #define dev_dbg(dev, fmt, args...) \ macro

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