| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/ |
| H A D | clock.h | 196 uint clk_div; in clk_get_divisor() local
198 clk_div = input_rate / output_rate; in clk_get_divisor()
199 clk_div = (clk_div + 1) & 0xfffe; in clk_get_divisor()
201 return clk_div; in clk_get_divisor()
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| /rk3399_rockchip-uboot/drivers/spi/ |
| H A D | rk_spi.c | 95 uint clk_div = DIV_ROUND_UP(priv->input_rate, speed); in rkspi_set_clk() local
104 if (clk_div > 0xfffe) { in rkspi_set_clk()
105 clk_div = 0xfffe; in rkspi_set_clk()
107 __func__, speed, priv->input_rate / clk_div); in rkspi_set_clk()
111 clk_div = (clk_div + 1) & 0xfffe; in rkspi_set_clk()
113 debug("spi speed %u, div %u\n", speed, clk_div); in rkspi_set_clk()
116 if (priv->max_baud_div_in_cpha && clk_div > priv->max_baud_div_in_cpha && priv->mode & SPI_CPHA) { in rkspi_set_clk()
117 clk_div = priv->max_baud_div_in_cpha; in rkspi_set_clk()
121 clrsetbits_le32(&priv->regs->baudr, 0xffff, clk_div); in rkspi_set_clk()
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| H A D | designware_spi.c | 444 u16 clk_div; in dw_spi_set_speed() local
453 clk_div = priv->bus_clk_rate / speed; in dw_spi_set_speed()
454 clk_div = (clk_div + 1) & 0xfffe; in dw_spi_set_speed()
455 dw_write(priv, DW_SPI_BAUDR, clk_div); in dw_spi_set_speed()
462 priv->freq, clk_div); in dw_spi_set_speed()
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| H A D | ti_qspi.c | 119 uint clk_div; in ti_spi_set_speed() local
122 clk_div = 0; in ti_spi_set_speed()
124 clk_div = DIV_ROUND_UP(priv->fclk, hz) - 1; in ti_spi_set_speed()
127 if (clk_div > QSPI_CLK_DIV_MAX) in ti_spi_set_speed()
128 clk_div = QSPI_CLK_DIV_MAX; in ti_spi_set_speed()
130 debug("ti_spi_set_speed: hz: %d, clock divider %d\n", hz, clk_div); in ti_spi_set_speed()
136 writel(QSPI_CLK_EN | clk_div, &priv->base->clk_ctrl); in ti_spi_set_speed()
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| /rk3399_rockchip-uboot/drivers/led/ |
| H A D | led_bcm6358.c | 124 unsigned int clk_div; in bcm6358_led_probe() local
136 clk_div = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), in bcm6358_led_probe()
138 switch (clk_div) { in bcm6358_led_probe()
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| /rk3399_rockchip-uboot/drivers/video/sunxi/ |
| H A D | sunxi_display.c | 522 int *clk_div, int *clk_double) in sunxi_lcdc_pll_set() argument
627 *clk_div = best_m; in sunxi_lcdc_pll_set()
757 int clk_div, clk_double, pin; local
776 sunxi_lcdc_pll_set(0, mode->pixclock_khz, &clk_div, &clk_double);
779 lcdc_tcon0_mode_set(lcdc, &timing, clk_div, for_ext_vga_dac,
785 int *clk_div, int *clk_double, argument
801 sunxi_lcdc_pll_set(1, mode->pixclock_khz, clk_div, clk_double);
855 int clk_div, int clk_double) argument
879 SUNXI_HDMI_PLL_CTRL_DIV(clk_div));
1029 int __maybe_unused clk_div, clk_double; local
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| H A D | lcdc.c | 72 int clk_div, bool for_ext_vga_dac, in lcdc_tcon0_mode_set() argument
88 SUNXI_LCDC_TCON0_DCLK_DIV(clk_div), &lcdc->tcon0_dclk); in lcdc_tcon0_mode_set()
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| /rk3399_rockchip-uboot/drivers/mmc/ |
| H A D | exynos_dw_mmc.c | 58 int8_t clk_div; in exynos_dwmci_get_clk() local
66 clk_div = ((dwmci_readl(host, DWMCI_CLKSEL) >> DWMCI_DIVRATIO_BIT) in exynos_dwmci_get_clk()
74 return sclk / clk_div / (host->div + 1); in exynos_dwmci_get_clk()
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| H A D | meson_gx_mmc.c | 36 unsigned int clk, clk_src, clk_div; in meson_mmc_config_clock() local
46 clk_div = DIV_ROUND_UP(clk, mmc->clock); in meson_mmc_config_clock()
56 meson_mmc_clk |= clk_div; in meson_mmc_config_clock()
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| /rk3399_rockchip-uboot/drivers/i2c/ |
| H A D | mxc_i2c.c | 141 u8 clk_div; in i2c_imx_get_clk() local
156 clk_div = 0; in i2c_imx_get_clk()
158 clk_div = ARRAY_SIZE(i2c_clk_div) - 1; in i2c_imx_get_clk()
160 for (clk_div = 0; i2c_clk_div[clk_div][0] < div; clk_div++) in i2c_imx_get_clk()
164 return clk_div; in i2c_imx_get_clk()
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| H A D | s3c24x0_i2c.h | 60 unsigned clk_div; member
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| H A D | exynos_hs_i2c.c | 167 i2c_bus->clk_div = i; in hsi2c_get_clk_details()
188 n_clkdiv = i2c_bus->clk_div; in hsi2c_ch_init()
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| H A D | tegra_i2c.c | 120 int clk_div_stdfst_mode = readl(&i2c_bus->regs->clk_div) >> 16; in i2c_init_controller()
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra/ |
| H A D | tegra_i2c.h | 92 u32 clk_div; /* 6C: I2C_I2C_CLOCK_DIVISOR */ member
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 122 int clk_div, bool for_ext_vga_dac,
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| /rk3399_rockchip-uboot/examples/standalone/ |
| H A D | rkspi.c | 70 static void rkspi_set_baudr(struct rockchip_spi_priv *priv, uint clk_div) in rkspi_set_baudr() argument
72 writel(clk_div, &priv->regs->baudr); in rkspi_set_baudr()
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv7/bcm235xx/ |
| H A D | clk-bcm235xx.c | 24 #define DECLARE_REF_CLK(clk_name, clk_parent, clk_rate, clk_div) \ argument
30 .div = clk_div, \
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv7/bcm281xx/ |
| H A D | clk-bcm281xx.c | 24 #define DECLARE_REF_CLK(clk_name, clk_parent, clk_rate, clk_div) \ argument
30 .div = clk_div, \
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| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rk3399.c | 566 #define I2C_CLK_REG_VALUE(bus, clk_div) \ argument
567 ((clk_div - 1) << \
580 #define I2C_PMUCLK_REG_VALUE(bus, clk_div) \ argument
581 ((clk_div - 1) << \
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