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/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dsdram.h63 #define SYS_REG_ROW_3_4_SHIFT(ch) (30 + (ch)) argument
65 #define SYS_REG_CHINFO_SHIFT(ch) (28 + (ch)) argument
66 #define SYS_REG_RANK_SHIFT(ch) (11 + (ch) * 16) argument
68 #define SYS_REG_COL_SHIFT(ch) (9 + (ch) * 16) argument
70 #define SYS_REG_BK_SHIFT(ch) (8 + (ch) * 16) argument
72 #define SYS_REG_CS0_ROW_SHIFT(ch) (6 + (ch) * 16) argument
74 #define SYS_REG_CS1_ROW_SHIFT(ch) (4 + (ch) * 16) argument
76 #define SYS_REG_BW_SHIFT(ch) (2 + (ch) * 16) argument
78 #define SYS_REG_DBW_SHIFT(ch) ((ch) * 16) argument
83 #define SYS_REG1_EXTEND_CS0_ROW_SHIFT(ch) (5 + (ch) * 2) argument
[all …]
H A Dsdram_common.h316 #define SYS_REG_ENC_ROW_3_4(n, ch) ((n) << (30 + (ch))) argument
317 #define SYS_REG_DEC_ROW_3_4(n, ch) (((n) >> (30 + (ch))) & 0x1) argument
318 #define SYS_REG_ENC_CHINFO(ch) (1 << (28 + (ch))) argument
319 #define SYS_REG_DEC_CHINFO(n, ch) (((n) >> (28 + (ch))) & 0x1) argument
324 #define SYS_REG_ENC_RANK(n, ch) (((n) - 1) << (11 + ((ch) * 16))) argument
325 #define SYS_REG_DEC_RANK(n, ch) (1 + (((n) >> (11 + 16 * (ch))) & 0x1)) argument
326 #define SYS_REG_ENC_COL(n, ch) (((n) - 9) << (9 + ((ch) * 16))) argument
327 #define SYS_REG_DEC_COL(n, ch) (9 + (((n) >> (9 + 16 * (ch))) & 0x3)) argument
328 #define SYS_REG_ENC_BK(n, ch) (((n) == 3 ? 0 : 1) << \ argument
329 (8 + ((ch) * 16)))
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/rk3399_rockchip-uboot/arch/x86/cpu/quark/
H A Dsmc.c261 uint8_t ch; /* channel counter */ in ddrphy_init() local
285 for (ch = 0; ch < NUM_CHANNELS; ch++) { in ddrphy_init()
286 if (mrc_params->channel_enables & (1 << ch)) { in ddrphy_init()
289 CMDPMCONFIG0 + ch * DDRIOCCC_CH_OFFSET, in ddrphy_init()
293 CMDCFGREG0 + ch * DDRIOCCC_CH_OFFSET, in ddrphy_init()
297 CMDPTRREG + ch * DDRIOCCC_CH_OFFSET, in ddrphy_init()
309 for (ch = 0; ch < NUM_CHANNELS; ch++) { in ddrphy_init()
310 if (mrc_params->channel_enables & (1 << ch)) { in ddrphy_init()
319 ch * DDRIODQ_CH_OFFSET, in ddrphy_init()
342 ch * DDRIODQ_CH_OFFSET, in ddrphy_init()
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/rk3399_rockchip-uboot/lib/
H A Dtiny-printf.c23 void (*putc)(struct printf_info *info, char ch);
26 static void putc_normal(struct printf_info *info, char ch) in putc_normal() argument
28 putc(ch); in putc_normal()
59 char ch; in string() local
61 while ((ch = *s++)) in string()
62 out(info, ch); in string()
206 char ch; in _vprintf() local
212 while ((ch = *(fmt++))) { in _vprintf()
213 if (ch != '%') { in _vprintf()
214 info->putc(info, ch); in _vprintf()
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/rk3399_rockchip-uboot/arch/arm/mach-rockchip/
H A Dsdram.c26 u32 ch; in rockchip_sdram_size() local
37 for (ch = 0; ch < ch_num; ch++) { in rockchip_sdram_size()
38 rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) & in rockchip_sdram_size()
40 cs0_col = 9 + (sys_reg >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK); in rockchip_sdram_size()
42 bk = 3 - ((sys_reg >> SYS_REG_BK_SHIFT(ch)) & SYS_REG_BK_MASK); in rockchip_sdram_size()
45 cs1_col = 9 + (sys_reg1 >> SYS_REG1_CS1_COL_SHIFT(ch) & in rockchip_sdram_size()
47 if (((sys_reg1 >> SYS_REG1_EXTEND_CS0_ROW_SHIFT(ch) & in rockchip_sdram_size()
49 SYS_REG_CS0_ROW_SHIFT(ch) & in rockchip_sdram_size()
54 SYS_REG_CS0_ROW_SHIFT(ch) & in rockchip_sdram_size()
57 SYS_REG1_EXTEND_CS0_ROW_SHIFT(ch) & in rockchip_sdram_size()
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/rk3399_rockchip-uboot/drivers/clk/uniphier/
H A Dclk-uniphier-mio.c10 #define UNIPHIER_MIO_CLK_SD_GATE(id, ch) \ argument
11 UNIPHIER_CLK_GATE((id), 0x20 + 0x200 * (ch), 8)
13 #define UNIPHIER_MIO_CLK_USB2(id, ch) \ argument
14 UNIPHIER_CLK_GATE((id), 0x20 + 0x200 * (ch), 28)
16 #define UNIPHIER_MIO_CLK_USB2_PHY(id, ch) \ argument
17 UNIPHIER_CLK_GATE((id), 0x20 + 0x200 * (ch), 29)
22 #define UNIPHIER_MIO_CLK_SD_MUX(_id, ch) \ argument
26 .reg = 0x30 + 0x200 * (ch), \
/rk3399_rockchip-uboot/common/
H A Dkgdb.c118 hex(unsigned char ch) in hex() argument
120 if (ch >= 'a' && ch <= 'f') in hex()
121 return ch-'a'+10; in hex()
122 if (ch >= '0' && ch <= '9') in hex()
123 return ch-'0'; in hex()
124 if (ch >= 'A' && ch <= 'F') in hex()
125 return ch-'A'+10; in hex()
136 unsigned char ch; in mem2hex() local
148 ch = *tmp++; in mem2hex()
149 *buf++ = hexchars[ch >> 4]; in mem2hex()
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/rk3399_rockchip-uboot/include/
H A Dhexdump.h37 static inline int hex_to_bin(char ch) in hex_to_bin() argument
39 if ((ch >= '0') && (ch <= '9')) in hex_to_bin()
40 return ch - '0'; in hex_to_bin()
41 ch = tolower(ch); in hex_to_bin()
42 if ((ch >= 'a') && (ch <= 'f')) in hex_to_bin()
43 return ch - 'a' + 10; in hex_to_bin()
H A Ddebug_uart.h78 void printch(int ch);
142 static inline void _printch(int ch) \
144 if (ch == '\n') \
146 _debug_uart_putc(ch); \
149 void printch(int ch) \
151 _printch(ch); \
/rk3399_rockchip-uboot/arch/arm/mach-uniphier/clk/
H A Dclk-ld11.c40 int ch; in uniphier_ld11_clk_init() local
46 for (ch = 0; ch < 3; ch++) { in uniphier_ld11_clk_init()
49 writel(0x82280600, phyctrl + 8 * ch); in uniphier_ld11_clk_init()
50 writel(0x00000106, phyctrl + 8 * ch + 4); in uniphier_ld11_clk_init()
/rk3399_rockchip-uboot/board/freescale/ls1021aqds/
H A Ddcu.c19 static int select_i2c_ch_pca9547(u8 ch) in select_i2c_ch_pca9547() argument
23 ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1); in select_i2c_ch_pca9547()
50 u8 ch; in platform_dcu_init() local
54 1, &ch, 1); in platform_dcu_init()
60 ch &= 0x1F; in platform_dcu_init()
61 ch |= 0xA0; in platform_dcu_init()
63 1, &ch, 1); in platform_dcu_init()
/rk3399_rockchip-uboot/drivers/serial/
H A Dserial_efi.c52 int ret, ch; in serial_efi_getc() local
59 ch = priv->key.unicode_char; in serial_efi_getc()
66 if (!ch && priv->key.scan_code == 8) in serial_efi_getc()
67 ch = 8; in serial_efi_getc()
68 debug(" [%x %x %x] ", ch, priv->key.unicode_char, priv->key.scan_code); in serial_efi_getc()
70 return ch; in serial_efi_getc()
73 static int serial_efi_putc(struct udevice *dev, const char ch) in serial_efi_putc() argument
79 ucode[0] = ch; in serial_efi_putc()
114 static inline void _debug_uart_putc(int ch) in _debug_uart_putc() argument
119 ucode[0] = ch; in _debug_uart_putc()
H A Darm_dcc.c101 int ch; in arm_dcc_getc() local
107 read_dcc(ch); in arm_dcc_getc()
109 return ch; in arm_dcc_getc()
112 static int arm_dcc_putc(struct udevice *dev, char ch) in arm_dcc_putc() argument
125 write_dcc(ch); in arm_dcc_putc()
170 static inline void _debug_uart_putc(int ch) in _debug_uart_putc() argument
172 arm_dcc_putc(NULL, ch); in _debug_uart_putc()
/rk3399_rockchip-uboot/drivers/reset/
H A Dreset-uniphier.c92 #define UNIPHIER_MIO_RESET_SD(id, ch) \ argument
93 UNIPHIER_RESETX((id), 0x110 + 0x200 * (ch), 0)
95 #define UNIPHIER_MIO_RESET_SD_BRIDGE(id, ch) \ argument
96 UNIPHIER_RESETX((id), 0x110 + 0x200 * (ch), 26)
98 #define UNIPHIER_MIO_RESET_EMMC_HW_RESET(id, ch) \ argument
99 UNIPHIER_RESETX((id), 0x80 + 0x200 * (ch), 0)
101 #define UNIPHIER_MIO_RESET_USB2(id, ch) \ argument
102 UNIPHIER_RESETX((id), 0x114 + 0x200 * (ch), 0)
104 #define UNIPHIER_MIO_RESET_USB2_BRIDGE(id, ch) \ argument
105 UNIPHIER_RESETX((id), 0x110 + 0x200 * (ch), 24)
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H A Dsti-reset.c229 struct syscfg_reset_channel_data *ch; in sti_reset_program_hw() local
241 ch = &reset_desc->channels[reset_ctl->id]; in sti_reset_program_hw()
245 ch->deassert_cnt++; in sti_reset_program_hw()
246 if (ch->deassert_cnt > 1) in sti_reset_program_hw()
249 if (ch->deassert_cnt > 0) { in sti_reset_program_hw()
250 ch->deassert_cnt--; in sti_reset_program_hw()
251 if (ch->deassert_cnt > 0) in sti_reset_program_hw()
258 reg = (void __iomem *)base + ch->reset_offset; in sti_reset_program_hw()
261 generic_set_bit(ch->reset_bit, reg); in sti_reset_program_hw()
263 generic_clear_bit(ch->reset_bit, reg); in sti_reset_program_hw()
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/rk3399_rockchip-uboot/drivers/video/
H A Dipu_regs.h312 #define IPU_CHA_DB_MODE_SEL(ch) (&IPU_CM_REG->ch_db_mode_sel[ch / 32]) argument
317 #define IPU_CHA_CUR_BUF(ch) (&IPU_STAT->cur_buf[ch / 32]) argument
318 #define IPU_CHA_BUF0_RDY(ch) (&IPU_STAT->ch_buf0_rdy[ch / 32]) argument
319 #define IPU_CHA_BUF1_RDY(ch) (&IPU_STAT->ch_buf1_rdy[ch / 32]) argument
328 #define IDMAC_CHA_EN(ch) (&IDMAC_REG->ch_en[ch / 32]) argument
329 #define IDMAC_CHA_PRI(ch) (&IDMAC_REG->ch_pri[ch / 32]) argument
364 static inline struct ipu_dc_ch *dc_ch_offset(int ch) in dc_ch_offset() argument
366 switch (ch) { in dc_ch_offset()
370 return &DC_REG->dc_ch0_1_2[ch]; in dc_ch_offset()
373 return &DC_REG->dc_ch5_6[ch - 5]; in dc_ch_offset()
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H A Dipu.h84 #define _MAKE_ALT_CHAN(ch) (ch | (IPU_MAX_CH << 24)) argument
85 #define IPU_CHAN_ID(ch) (ch >> 24) argument
86 #define IPU_CHAN_ALT(ch) (ch & 0x02000000) argument
87 #define IPU_CHAN_ALPHA_IN_DMA(ch) ((uint32_t) (ch >> 6) & 0x3F) argument
88 #define IPU_CHAN_GRAPH_IN_DMA(ch) ((uint32_t) (ch >> 12) & 0x3F) argument
89 #define IPU_CHAN_VIDEO_IN_DMA(ch) ((uint32_t) (ch >> 18) & 0x3F) argument
90 #define IPU_CHAN_OUT_DMA(ch) ((uint32_t) (ch & 0x3F)) argument
H A Dipu_common.c38 #define ipu_ch_param_addr(ch) (((struct ipu_ch_param *)ipu_cpmem_base) + (ch)) argument
244 static inline void ipu_ch_param_set_high_priority(uint32_t ch) in ipu_ch_param_set_high_priority() argument
246 ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 93, 2, 1); in ipu_ch_param_set_high_priority()
249 static inline uint32_t channel_2_dma(ipu_channel_t ch, ipu_buffer_t type) in channel_2_dma() argument
251 return ((uint32_t) ch >> (6 * type)) & 0x3F; in channel_2_dma()
266 static inline void ipu_ch_param_set_buffer(uint32_t ch, int bufNum, in ipu_ch_param_set_buffer() argument
269 ipu_ch_param_mod_field(ipu_ch_param_addr(ch), 1, 29 * bufNum, 29, in ipu_ch_param_set_buffer()
273 #define idma_is_valid(ch) (ch != NO_DMA) argument
274 #define idma_mask(ch) (idma_is_valid(ch) ? (1UL << (ch & 0x1F)) : 0) argument
735 static inline void ipu_ch_param_dump(int ch) in ipu_ch_param_dump() argument
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/rk3399_rockchip-uboot/arch/arm/mach-uniphier/dram/
H A Dumc-ld4.c42 static int umc_get_rank(int ch) in umc_get_rank() argument
44 return ch; /* ch0: rank0, ch1: rank1 for this SoC */ in umc_get_rank()
146 int freq, unsigned long size, bool ddr3plus, int ch) in umc_ch_init() argument
161 ddrphy_prepare_training(phy_base, umc_get_rank(ch)); in umc_ch_init()
175 int ch, ret; in uniphier_ld4_umc_init() local
177 for (ch = 0; ch < DRAM_CH_NR; ch++) { in uniphier_ld4_umc_init()
179 bd->dram_ch[ch].size, in uniphier_ld4_umc_init()
180 !!(bd->flags & UNIPHIER_BD_DDR3PLUS), ch); in uniphier_ld4_umc_init()
182 pr_err("failed to initialize UMC ch%d\n", ch); in uniphier_ld4_umc_init()
H A Dumc-sld8.c45 static int umc_get_rank(int ch) in umc_get_rank() argument
47 return ch; /* ch0: rank0, ch1: rank1 for this SoC */ in umc_get_rank()
149 int freq, unsigned long size, bool ddr3plus, int ch) in umc_ch_init() argument
164 ddrphy_prepare_training(phy_base, umc_get_rank(ch)); in umc_ch_init()
178 int ch, ret; in uniphier_sld8_umc_init() local
180 for (ch = 0; ch < DRAM_CH_NR; ch++) { in uniphier_sld8_umc_init()
182 bd->dram_ch[ch].size, in uniphier_sld8_umc_init()
183 !!(bd->flags & UNIPHIER_BD_DDR3PLUS), ch); in uniphier_sld8_umc_init()
185 pr_err("failed to initialize UMC ch%d\n", ch); in uniphier_sld8_umc_init()
H A Dumc-pxs2.c143 int ch) in ddrphy_init() argument
171 writel(ddrphy_acbdlr0[ch], phy_base + MPHY_ACBDLR0); in ddrphy_init()
455 static void umc_ud_init(void __iomem *umc_base, int ch) in umc_ud_init() argument
459 if (ch == 2) in umc_ud_init()
464 unsigned long size, int width, int ch) in umc_dc_init() argument
481 size, ch); in umc_dc_init()
487 writel(ch == 2 ? umc_cmdctlb_ch2[freq] : umc_cmdctlb_ch01[freq], in umc_dc_init()
518 writel(ch == 2 ? umc_flowctla_ch2[freq] : umc_flowctla_ch01[freq], in umc_dc_init()
526 if (ch != 2) { in umc_dc_init()
543 unsigned long size, unsigned int width, int ch) in umc_ch_init() argument
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/rk3399_rockchip-uboot/scripts/
H A Dbin2c.c14 int ch, total = 0; in main() local
22 while ((ch = getchar()) != EOF) { in main()
24 printf("\\x%02x", ch); in main()
29 } while (ch != EOF); in main()
/rk3399_rockchip-uboot/lib/efi_loader/
H A Defi_console.c152 u16 ch; in efi_cout_output_string() local
156 for (;(ch = *string); string++) { in efi_cout_output_string()
157 print_unicode_in_utf8(ch); in efi_cout_output_string()
159 if (ch == '\n') { in efi_cout_output_string()
350 char ch; in efi_cin_read_key_stroke() local
362 ch = getc(); in efi_cin_read_key_stroke()
363 if (ch == cESC) { in efi_cin_read_key_stroke()
365 ch = getc(); in efi_cin_read_key_stroke()
366 switch (ch) { in efi_cin_read_key_stroke()
374 ch = ch - 'a'; in efi_cin_read_key_stroke()
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/rk3399_rockchip-uboot/arch/arm/mach-uniphier/bcu/
H A Dbcu-ld4.c14 #define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x)) macro
28 writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */ in uniphier_ld4_bcu_init()
31 writel(ch(shift), BCIPPCCHR3); /* 0xa0000000-0xbfffffff */ in uniphier_ld4_bcu_init()
34 writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */ in uniphier_ld4_bcu_init()
/rk3399_rockchip-uboot/fs/ubifs/
H A Dscan.c65 struct ubifs_ch *ch = buf; in ubifs_scan_a_node() local
68 magic = le32_to_cpu(ch->magic); in ubifs_scan_a_node()
82 dbg_ntype(ch->node_type), lnum, offs); in ubifs_scan_a_node()
87 if (ch->node_type == UBIFS_PAD_NODE) { in ubifs_scan_a_node()
90 int node_len = le32_to_cpu(ch->len); in ubifs_scan_a_node()
190 struct ubifs_ch *ch = buf; in ubifs_add_snod() local
198 snod->sqnum = le64_to_cpu(ch->sqnum); in ubifs_add_snod()
199 snod->type = ch->node_type; in ubifs_add_snod()
201 snod->len = le32_to_cpu(ch->len); in ubifs_add_snod()
204 switch (ch->node_type) { in ubifs_add_snod()
[all …]

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