| #
de9242dc |
| 04-Nov-2020 |
Tang Yun ping <typ@rock-chips.com> |
drivers: ram: sdram_common: add 4rank support for rk3568
Change-Id: I179ff4ef1f07a881f76ac086c4ab330e3ff82d73
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
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| #
b8dc613c |
| 19-Nov-2019 |
Joseph Chen <chenjh@rock-chips.com> |
Merge branch 'next-dev' into thunder-boot
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| #
e1f97ec3 |
| 07-Mar-2019 |
YouMin Chen <cym@rock-chips.com> |
driver: ram: rockchip: rename sdram_common.* to sdram.*
Change-Id: Idc6edee2906297d3ab681a36dc58c79283c0eb57
Signed-off-by: YouMin Chen <cym@rock-chips.com>
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| #
5589e612 |
| 26-Jun-2018 |
YouMin Chen <cym@rock-chips.com> |
rockchip: sdram: the enum of DDR type move to sdram_common.h
Change-Id: I62877384b6f0ee232e9765143b3deea2c5693a36
Signed-off-by: YouMin Chen <cym@rock-chips.com>
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| #
7fd11738 |
| 02-Nov-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
|
| #
7d6c78f5 |
| 07-Oct-2016 |
Kever Yang <kever.yang@rock-chips.com> |
rk3288: sdram: auto-detect the capacity
Add support for rk3288 dram capacity auto detect, support DDR3 and
LPDDR3, DDR2 is not supported.
The program will automatically detect:
- channel number
- ra
rk3288: sdram: auto-detect the capacity
Add support for rk3288 dram capacity auto detect, support DDR3 and
LPDDR3, DDR2 is not supported.
The program will automatically detect:
- channel number
- rank number
- column address number
- row address number
The dts file do not need to describe those info after apply this patch.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
show more ...
|
| #
201c9d88 |
| 22-Sep-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
|
| #
ce26e8a1 |
| 12-Aug-2016 |
Xu Ziyuan <xzy.xu@rock-chips.com> |
rockchip: use dummy byte only enable OF_PLATDATA
Add a condition to determine the rk3288_sdram_channel size.
This patch fixes read sdram_channel property failed from DT on rk3288
boards, which not
rockchip: use dummy byte only enable OF_PLATDATA
Add a condition to determine the rk3288_sdram_channel size.
This patch fixes read sdram_channel property failed from DT on rk3288
boards, which not enable OF_PLATDATA.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
show more ...
|
| #
ebe621d5 |
| 15-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
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| #
fb4baf5d |
| 04-Jul-2016 |
Simon Glass <sjg@chromium.org> |
rockchip: sdram: Move all DT decoding to ofdata_to_platdata()
It is more correct to avoid touching the device tree in the probe() method.
Update the driver to work this way. Note that only SPL needs
rockchip: sdram: Move all DT decoding to ofdata_to_platdata()
It is more correct to avoid touching the device tree in the probe() method.
Update the driver to work this way. Note that only SPL needs to fiddle with
the SDRAM registers, so decoding the platform data fully is not necessary in
U-Boot proper.
Signed-off-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
9ca7e672 |
| 04-Jul-2016 |
Simon Glass <sjg@chromium.org> |
rockchip: Update the sdram-channel property to support of-platdata
Add an extra byte so that this data is not byteswapped. Add a comment to
the code to explain the purpose.
Signed-off-by: Simon Gla
rockchip: Update the sdram-channel property to support of-platdata
Add an extra byte so that this data is not byteswapped. Add a comment to
the code to explain the purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
c9feb427 |
| 03-Sep-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
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| #
5ff093ab |
| 30-Aug-2015 |
Simon Glass <sjg@chromium.org> |
rockchip: rk3288: Add SDRAM init
Add code to set up the SDRAM in SPL, ready for loading U-Boot. This uses
device tree for configuration so should be able to support other RAM
configurations. It may
rockchip: rk3288: Add SDRAM init
Add code to set up the SDRAM in SPL, ready for loading U-Boot. This uses
device tree for configuration so should be able to support other RAM
configurations. It may be possible to generalise the code to support other
SoCs at some point.
Signed-off-by: Simon Glass <sjg@chromium.org>
show more ...
|