| #
b491b498 |
| 18-Jun-2019 |
Jon Lin <jon.lin@rock-chips.com> |
UPSTREAM: wait_bit: use wait_for_bit_le32 and remove wait_for_bit
wait_for_bit callers use the 32 bit LE version
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwie
UPSTREAM: wait_bit: use wait_for_bit_le32 and remove wait_for_bit
wait_for_bit callers use the 32 bit LE version
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Change-Id: I638846de7db29711fb7c778cc8304b507de057fe Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 48263504c8d501678acaa90c075f3f7cda17c316) Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
90aa625c |
| 16-Sep-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace with error() with pr_err()
U-Boot widely uses error() as a bit noisier variant of printf().
This macro causes name conflict with the following line in include/linux/compiler-gcc.h
treewide: replace with error() with pr_err()
U-Boot widely uses error() as a bit noisier variant of printf().
This macro causes name conflict with the following line in include/linux/compiler-gcc.h:
# define __compiletime_error(message) __attribute__((error(message)))
This prevents us from using __compiletime_error(), and makes it difficult to fully sync BUILD_BUG macros with Linux. (Notice Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)
Let's convert error() into now treewide-available pr_err().
Done with the help of Coccinelle, excluing tools/ directory.
The semantic patch I used is as follows:
// <smpl> @@@@ -error +pr_err (...) // </smpl>
Change-Id: I921807c1770d36a91e692c48ab477558bb2ed0b8 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Re-run Coccinelle] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 9b643e312d528f291966c1f30b0d90bf3b1d43dc)
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| #
aef5b738 |
| 18-May-2017 |
Patrice Chotard <patrice.chotard@st.com> |
reset: sti: add deassert counter in reset channel descriptor
This deassert counter allow to manage "shared" reset lines encountered in some specific case. On STiH410 SoC, DWC3, EHCI and OHCI are all
reset: sti: add deassert counter in reset channel descriptor
This deassert counter allow to manage "shared" reset lines encountered in some specific case. On STiH410 SoC, DWC3, EHCI and OHCI are all using a respective PHY, but all of these PHYs shared a "global" reset.
Currently, during command "usb stop", all host controller are stopped (XHCI, EHCI and OHCI). XHCI is first shutdowned, which means that PHY global reset is asserted. Then EHCI is shutdowned, but its PHY reset has already been asserted which make handshake() call failed in ehci_shutdown().
This counter allows to really assert a reset lines only when the "last" user is asserting it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
584861ff |
| 22-Mar-2017 |
Patrice Chotard <patrice.chotard@st.com> |
reset: Add STi reset support
This patch adds a reset controller implementation for STMicroelectronics STi family SoCs; it allows a group of related reset like controls found in multiple system confi
reset: Add STi reset support
This patch adds a reset controller implementation for STMicroelectronics STi family SoCs; it allows a group of related reset like controls found in multiple system configuration registers to be represented by a single controller device.
Driver code has been mainly extracted from kernel drivers/reset/sti/reset-stih407.c
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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