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Searched refs:c7 (Results 1 – 19 of 19) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/cpu/pxa/
H A Dstart.S102 mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */
103 mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */
152 mcr p15, 0, r0, c7, c7, 0
159 mcr p15, 0, r0, c8, c7, 0
164 mcr p15, 0, r0, c7, c10, 4
177 mcr p15, 0, r1, c7, c2, 5
179 mcr p15, 0, r0, c7, c10, 4
187 mcr p15, 0, r0, c7, c10, 4
/rk3399_rockchip-uboot/arch/arm/mach-mvebu/
H A Dlowlevel_spl.S32 mcr p15, 0, r0, c7, c6, 1
48 mcr p15, 0, r0, c7, c10, 5 /* @ data memory barrier */
49 mcr p15, 0, r0, c7, c14, 1 /* @ clean & invalidate D line */
50 mcr p15, 0, r0, c7, c10, 4 /* @ data sync barrier */
67 mcr p15, 0, r0, c7, c14, 1 /* @ clean & invalidate D line */
/rk3399_rockchip-uboot/arch/arm/include/asm/
H A Darm32_macros.S102 mcr p15, 0, r0, c7, c1, 0
110 mcr p15, 0, r0, c7, c1, 6
115 mcr p15, 0, r0, c7, c5, 0
120 mcr p15, 0, \reg, c7, c5, 1
125 mcr p15, 0, r0, c7, c5, 6
130 mcr p15, 0, \reg, c7, c6, 1
135 mcr p15, 0, \reg, c7, c6, 2
140 mcr p15, 0, \reg, c7, c10, 1
145 mcr p15, 0, \reg, c7, c10, 2
150 mcr p15, 0, \reg, c7, c14, 1
[all …]
/rk3399_rockchip-uboot/arch/arm/cpu/arm926ejs/spear/
H A Dstart.S65 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
66 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
/rk3399_rockchip-uboot/arch/arm/cpu/arm926ejs/
H A Dstart.S80 mrc p15, 0, r15, c7, c10, 3
83 mcr p15, 0, r0, c8, c7, 0 /* invalidate TLB */
84 mcr p15, 0, r0, c7, c5, 0 /* invalidate I Cache */
/rk3399_rockchip-uboot/arch/arm/cpu/arm1136/
H A Dstart.S72 mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */
73 mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */
/rk3399_rockchip-uboot/arch/arm/cpu/arm1176/
H A Dstart.S78 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
79 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
/rk3399_rockchip-uboot/arch/arm/cpu/arm920t/
H A Dstart.S88 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
89 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
/rk3399_rockchip-uboot/arch/arm/cpu/sa1100/
H A Dstart.S124 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
125 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx35/
H A Dlowlevel_macro.S119 mcr p15, 0, r0, c7, c7, 0 /* Invalidate I cache and D cache */
120 mcr p15, 0, r0, c8, c7, 0 /* Invalidate TLBs */
121 mcr p15, 0, r0, c7, c10, 4 /* Drain the write buffer */
/rk3399_rockchip-uboot/arch/arm/lib/
H A Drelocate.S119 mcr p15, 0, r0, c7, c7, 0 /* invalidate icache */
120 mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
/rk3399_rockchip-uboot/arch/arm/cpu/arm946es/
H A Dstart.S80 mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */
81 mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */
/rk3399_rockchip-uboot/arch/arm/cpu/armv7/
H A Dstart.S110 mcr p15, 0, r0, c7, c5, 0 @ invalidate icache
111 mcr p15, 0, r0, c7, c10, 4 @ DSB
112 mcr p15, 0, r0, c7, c5, 4 @ ISB
155 mcr p15, 0, r0, c8, c7, 0 @ invalidate TLBs
156 mcr p15, 0, r0, c7, c5, 0 @ invalidate icache
157 mcr p15, 0, r0, c7, c5, 6 @ invalidate BP array
158 mcr p15, 0, r0, c7, c10, 4 @ DSB
159 mcr p15, 0, r0, c7, c5, 4 @ ISB
H A Dcache_v7_asm.S60 mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
133 mcr p15, 0, r11, c7, c6, 2 @ invalidate by set/way
H A Dpsci.S221 mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
/rk3399_rockchip-uboot/arch/m68k/include/asm/coldfire/
H A Dskha.h38 u32 c7; /* 0x88 Context 7 */ member
/rk3399_rockchip-uboot/cmd/ddr_tool/
H A Dddr_tool_mp.S60 mcr p15, 0, r0, c7, c5, 0
/rk3399_rockchip-uboot/arch/arm/mach-omap2/omap3/
H A Dlowlevel_init.S33 mcr p15, 0, r0, c7, c10, 4 @ DSB
34 mcr p15, 0, r0, c7, c10, 5 @ DMB
/rk3399_rockchip-uboot/arch/arm/mach-uniphier/arm32/
H A Dlowlevel_init.S63 mcr p15, 0, r0, c8, c7, 0 @ invalidate TLBs