184ad6884SPeter Tyser/* 284ad6884SPeter Tyser * armboot - Startup Code for OMP2420/ARM1136 CPU-core 384ad6884SPeter Tyser * 484ad6884SPeter Tyser * Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com> 584ad6884SPeter Tyser * 6fa82f871SAlbert ARIBAUD * Copyright (c) 2001 Marius Gröger <mag@sysgo.de> 7fa82f871SAlbert ARIBAUD * Copyright (c) 2002 Alex Züpke <azu@sysgo.de> 884ad6884SPeter Tyser * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> 984ad6884SPeter Tyser * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com> 1084ad6884SPeter Tyser * Copyright (c) 2003 Kshitij <kshitij@ti.com> 1184ad6884SPeter Tyser * 121a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 1384ad6884SPeter Tyser */ 1484ad6884SPeter Tyser 1525ddd1fbSWolfgang Denk#include <asm-offsets.h> 1684ad6884SPeter Tyser#include <config.h> 1784ad6884SPeter Tyser 1884ad6884SPeter Tyser/* 1984ad6884SPeter Tyser ************************************************************************* 2084ad6884SPeter Tyser * 2184ad6884SPeter Tyser * Startup Code (reset vector) 2284ad6884SPeter Tyser * 2384ad6884SPeter Tyser * do important init only if we don't start from memory! 2484ad6884SPeter Tyser * setup Memory and board specific bits prior to relocation. 2584ad6884SPeter Tyser * relocate armboot to ram 2684ad6884SPeter Tyser * setup stack 2784ad6884SPeter Tyser * 2884ad6884SPeter Tyser ************************************************************************* 2984ad6884SPeter Tyser */ 3084ad6884SPeter Tyser 3141623c91SAlbert ARIBAUD .globl reset 32e48b7c0aSHeiko Schocher 33e48b7c0aSHeiko Schocherreset: 34e48b7c0aSHeiko Schocher /* 35e48b7c0aSHeiko Schocher * set the cpu to SVC32 mode 36e48b7c0aSHeiko Schocher */ 37e48b7c0aSHeiko Schocher mrs r0,cpsr 38e48b7c0aSHeiko Schocher bic r0,r0,#0x1f 39e48b7c0aSHeiko Schocher orr r0,r0,#0xd3 40e48b7c0aSHeiko Schocher msr cpsr,r0 41e48b7c0aSHeiko Schocher 42e48b7c0aSHeiko Schocher /* the mask ROM code should have PLL and others stable */ 43e48b7c0aSHeiko Schocher#ifndef CONFIG_SKIP_LOWLEVEL_INIT 44e48b7c0aSHeiko Schocher bl cpu_init_crit 45e48b7c0aSHeiko Schocher#endif 46e48b7c0aSHeiko Schocher 47e05e5de7SAlbert ARIBAUD bl _main 48e48b7c0aSHeiko Schocher 49e48b7c0aSHeiko Schocher/*------------------------------------------------------------------------------*/ 50e48b7c0aSHeiko Schocher 51e05e5de7SAlbert ARIBAUD .globl c_runtime_cpu_setup 52e05e5de7SAlbert ARIBAUDc_runtime_cpu_setup: 53e48b7c0aSHeiko Schocher 54e05e5de7SAlbert ARIBAUD bx lr 55bafe7437SHeiko Schocher 5684ad6884SPeter Tyser/* 5784ad6884SPeter Tyser ************************************************************************* 5884ad6884SPeter Tyser * 5984ad6884SPeter Tyser * CPU_init_critical registers 6084ad6884SPeter Tyser * 6184ad6884SPeter Tyser * setup important registers 6284ad6884SPeter Tyser * setup memory timing 6384ad6884SPeter Tyser * 6484ad6884SPeter Tyser ************************************************************************* 6584ad6884SPeter Tyser */ 6684ad6884SPeter Tyser#ifndef CONFIG_SKIP_LOWLEVEL_INIT 6784ad6884SPeter Tysercpu_init_crit: 6884ad6884SPeter Tyser /* 6984ad6884SPeter Tyser * flush v4 I/D caches 7084ad6884SPeter Tyser */ 7184ad6884SPeter Tyser mov r0, #0 72409a07c9SGeorge G. Davis mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */ 73409a07c9SGeorge G. Davis mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */ 7484ad6884SPeter Tyser 7584ad6884SPeter Tyser /* 7684ad6884SPeter Tyser * disable MMU stuff and caches 7784ad6884SPeter Tyser */ 7884ad6884SPeter Tyser mrc p15, 0, r0, c1, c0, 0 7984ad6884SPeter Tyser bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) 8084ad6884SPeter Tyser bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM) 81ba10b852SYuichiro Goto orr r0, r0, #0x00000002 @ set bit 1 (A) Align 8284ad6884SPeter Tyser orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache 8384ad6884SPeter Tyser mcr p15, 0, r0, c1, c0, 0 8484ad6884SPeter Tyser 85*b5bd0982SSimon Glass#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY 8684ad6884SPeter Tyser /* 8784ad6884SPeter Tyser * Jump to board specific initialization... The Mask ROM will have already initialized 8884ad6884SPeter Tyser * basic memory. Go here to bump up clock rate and handle wake up conditions. 8984ad6884SPeter Tyser */ 9084ad6884SPeter Tyser mov ip, lr /* persevere link reg across call */ 9184ad6884SPeter Tyser bl lowlevel_init /* go setup pll,mux,memory */ 9284ad6884SPeter Tyser mov lr, ip /* restore link */ 93*b5bd0982SSimon Glass#endif 9484ad6884SPeter Tyser mov pc, lr /* back to my caller */ 9584ad6884SPeter Tyser#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 96