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Searched refs:DCLK0_VOP_SEL_SHIFT (Results 1 – 6 of 6) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3588.h370 DCLK0_VOP_SEL_SHIFT = 7, enumerator
371 DCLK0_VOP_SEL_MASK = 3 << DCLK0_VOP_SEL_SHIFT,
H A Dcru_rk3568.h356 DCLK0_VOP_SEL_SHIFT = 10, enumerator
357 DCLK0_VOP_SEL_MASK = 3 << DCLK0_VOP_SEL_SHIFT,
H A Dcru_rk3576.h448 DCLK0_VOP_SEL_SHIFT = 11, enumerator
449 DCLK0_VOP_SEL_MASK = 1 << DCLK0_VOP_SEL_SHIFT,
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3568.c1802 sel = (con & DCLK0_VOP_SEL_MASK) >> DCLK0_VOP_SEL_SHIFT; in rk3568_dclk_vop_get_clk()
1842 sel = (con & DCLK0_VOP_SEL_MASK) >> DCLK0_VOP_SEL_SHIFT; in rk3568_dclk_vop_set_clk()
1848 (DCLK_VOP_SEL_HPLL << DCLK0_VOP_SEL_SHIFT) | in rk3568_dclk_vop_set_clk()
1857 (DCLK_VOP_SEL_VPLL << DCLK0_VOP_SEL_SHIFT) | in rk3568_dclk_vop_set_clk()
1894 best_sel << DCLK0_VOP_SEL_SHIFT | in rk3568_dclk_vop_set_clk()
3123 DCLK_VOP_SEL_VPLL << DCLK0_VOP_SEL_SHIFT); in rk3568_dclk_vop_set_parent()
3126 DCLK_VOP_SEL_HPLL << DCLK0_VOP_SEL_SHIFT); in rk3568_dclk_vop_set_parent()
3129 DCLK_VOP_SEL_CPLL << DCLK0_VOP_SEL_SHIFT); in rk3568_dclk_vop_set_parent()
3132 DCLK_VOP_SEL_GPLL << DCLK0_VOP_SEL_SHIFT); in rk3568_dclk_vop_set_parent()
H A Dclk_rk3588.c2003 sel << DCLK0_VOP_SEL_SHIFT); in rk3588_dclk_vop_set_parent()
H A Dclk_rk3576.c2423 sel << DCLK0_VOP_SEL_SHIFT); in rk3576_dclk_vop_set_parent()