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Searched refs:read_ctx_reg (Results 1 – 25 of 37) sorted by relevance

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/rk3399_ARM-atf/plat/qti/qtiseclib/src/
H A Dqtiseclib_cb_interface.c141 read_ctx_reg(get_el3state_ctx(ctx), CTX_SPSR_EL3); in qtiseclib_cb_get_ns_ctx()
142 qti_ns_ctx->elr_el3 = read_ctx_reg(get_el3state_ctx(ctx), CTX_ELR_EL3); in qtiseclib_cb_get_ns_ctx()
150 qti_ns_ctx->x0 = read_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X0); in qtiseclib_cb_get_ns_ctx()
151 qti_ns_ctx->x1 = read_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X1); in qtiseclib_cb_get_ns_ctx()
152 qti_ns_ctx->x2 = read_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X2); in qtiseclib_cb_get_ns_ctx()
153 qti_ns_ctx->x3 = read_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X3); in qtiseclib_cb_get_ns_ctx()
154 qti_ns_ctx->x4 = read_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X4); in qtiseclib_cb_get_ns_ctx()
155 qti_ns_ctx->x5 = read_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X5); in qtiseclib_cb_get_ns_ctx()
156 qti_ns_ctx->x6 = read_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X6); in qtiseclib_cb_get_ns_ctx()
157 qti_ns_ctx->x7 = read_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X7); in qtiseclib_cb_get_ns_ctx()
[all …]
/rk3399_ARM-atf/bl1/aarch32/
H A Dbl1_context_mgmt.c74 next_smc_ctx->r0 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R0); in copy_cpu_ctx_to_smc_ctx()
75 next_smc_ctx->r1 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R1); in copy_cpu_ctx_to_smc_ctx()
76 next_smc_ctx->r2 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R2); in copy_cpu_ctx_to_smc_ctx()
77 next_smc_ctx->r3 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R3); in copy_cpu_ctx_to_smc_ctx()
78 next_smc_ctx->lr_mon = read_ctx_reg(cpu_reg_ctx, CTX_LR); in copy_cpu_ctx_to_smc_ctx()
79 next_smc_ctx->spsr_mon = read_ctx_reg(cpu_reg_ctx, CTX_SPSR); in copy_cpu_ctx_to_smc_ctx()
80 next_smc_ctx->scr = read_ctx_reg(cpu_reg_ctx, CTX_SCR); in copy_cpu_ctx_to_smc_ctx()
154 ns_sctlr = read_ctx_reg(get_regs_ctx(ctx), CTX_NS_SCTLR); in bl1_prepare_next_image()
/rk3399_ARM-atf/bl32/sp_min/
H A Dsp_min_main.c113 next_smc_ctx->r0 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R0); in copy_cpu_ctx_to_smc_stx()
114 next_smc_ctx->r1 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R1); in copy_cpu_ctx_to_smc_stx()
115 next_smc_ctx->r2 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R2); in copy_cpu_ctx_to_smc_stx()
116 next_smc_ctx->r3 = read_ctx_reg(cpu_reg_ctx, CTX_GPREG_R3); in copy_cpu_ctx_to_smc_stx()
117 next_smc_ctx->lr_mon = read_ctx_reg(cpu_reg_ctx, CTX_LR); in copy_cpu_ctx_to_smc_stx()
118 next_smc_ctx->spsr_mon = read_ctx_reg(cpu_reg_ctx, CTX_SPSR); in copy_cpu_ctx_to_smc_stx()
119 next_smc_ctx->scr = read_ctx_reg(cpu_reg_ctx, CTX_SCR); in copy_cpu_ctx_to_smc_stx()
151 ns_sctlr = read_ctx_reg(gpregs, CTX_NS_SCTLR); in sp_min_prepare_next_image_entry()
245 ns_sctlr = read_ctx_reg(gpregs, CTX_NS_SCTLR); in sp_min_warm_boot()
/rk3399_ARM-atf/services/std_svc/spmd/
H A Dspmd_logical_sp.c158 retval->func = read_ctx_reg(gpregs, CTX_GPREG_X0); in spmd_encode_ctx_to_ffa_value()
159 retval->arg1 = read_ctx_reg(gpregs, CTX_GPREG_X1); in spmd_encode_ctx_to_ffa_value()
160 retval->arg2 = read_ctx_reg(gpregs, CTX_GPREG_X2); in spmd_encode_ctx_to_ffa_value()
161 retval->arg3 = read_ctx_reg(gpregs, CTX_GPREG_X3); in spmd_encode_ctx_to_ffa_value()
162 retval->arg4 = read_ctx_reg(gpregs, CTX_GPREG_X4); in spmd_encode_ctx_to_ffa_value()
163 retval->arg5 = read_ctx_reg(gpregs, CTX_GPREG_X5); in spmd_encode_ctx_to_ffa_value()
164 retval->arg6 = read_ctx_reg(gpregs, CTX_GPREG_X6); in spmd_encode_ctx_to_ffa_value()
165 retval->arg7 = read_ctx_reg(gpregs, CTX_GPREG_X7); in spmd_encode_ctx_to_ffa_value()
166 retval->arg8 = read_ctx_reg(gpregs, CTX_GPREG_X8); in spmd_encode_ctx_to_ffa_value()
167 retval->arg9 = read_ctx_reg(gpregs, CTX_GPREG_X9); in spmd_encode_ctx_to_ffa_value()
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H A Dspmd_pm.c156 ffa_resp_func_id = (uint32_t)read_ctx_reg(get_gpregs_ctx(&ctx->cpu_ctx), in spmd_cpu_off_handler()
163 msg_flags = (uint32_t)read_ctx_reg(get_gpregs_ctx(&ctx->cpu_ctx), in spmd_cpu_off_handler()
167 status = (int)read_ctx_reg(get_gpregs_ctx(&ctx->cpu_ctx), in spmd_cpu_off_handler()
/rk3399_ARM-atf/plat/nvidia/tegra/common/
H A Dtegra_fiq_glue.c66 fiq_state[cpu].elr_el3 = read_ctx_reg((el3state_ctx), (uint32_t)(CTX_ELR_EL3)); in tegra_fiq_interrupt_handler()
67 fiq_state[cpu].spsr_el3 = read_ctx_reg((el3state_ctx), (uint32_t)(CTX_SPSR_EL3)); in tegra_fiq_interrupt_handler()
142 val = read_ctx_reg((gpregs_ctx), (uint32_t)(CTX_GPREG_SP_EL0)); in tegra_fiq_get_intr_context()
/rk3399_ARM-atf/lib/extensions/tcr/
H A Dtcr2.c23 reg = read_ctx_reg(state, CTX_SCR_EL3); in tcr2_enable()
39 reg = read_ctx_reg(state, CTX_SCR_EL3); in tcr2_disable()
/rk3399_ARM-atf/include/arch/aarch64/
H A Dsmccc_helpers.h74 read_ctx_reg((get_gpregs_ctx(_h)), (_g))
101 read_ctx_reg((get_el3state_ctx(_h)), (_e))
111 _x1 = read_ctx_reg(regs, CTX_GPREG_X1); \
112 _x2 = read_ctx_reg(regs, CTX_GPREG_X2); \
113 _x3 = read_ctx_reg(regs, CTX_GPREG_X3); \
114 _x4 = read_ctx_reg(regs, CTX_GPREG_X4); \
/rk3399_ARM-atf/plat/arm/board/fvp/aarch64/
H A Dfvp_ea.c37 fault_address = read_ctx_reg(gpregs_ctx, CTX_GPREG_X0); in plat_ea_handler()
43 elr_el3 = read_ctx_reg(el3_ctx, CTX_ELR_EL3); in plat_ea_handler()
H A Dfvp_lsp_ras_sp.c86 cactus_cmd_ret = read_ctx_reg(get_gpregs_ctx(ns_cpu_context), CTX_GPREG_X3); in injected_fault_handler()
87 event_num = (int)read_ctx_reg(get_gpregs_ctx(ns_cpu_context), CTX_GPREG_X4); in injected_fault_handler()
/rk3399_ARM-atf/lib/extensions/trbe/
H A Dtrbe.c45 u_register_t mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3); in trbe_enable_ns()
56 u_register_t mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3); in trbe_disable_all()
/rk3399_ARM-atf/lib/extensions/spe/
H A Dspe.c55 u_register_t mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3); in spe_enable_ns()
70 u_register_t mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3); in spe_disable_others()
/rk3399_ARM-atf/lib/extensions/sme/
H A Dsme.c26 reg = read_ctx_reg(state, CTX_SCR_EL3); in sme_enable()
87 reg = read_ctx_reg(state, CTX_SCR_EL3); in sme_disable()
/rk3399_ARM-atf/plat/rockchip/rk3399/
H A Dplat_sip_calls.c70 x5 = read_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X5); in rockchip_plat_sip_handler()
71 x6 = read_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X6); in rockchip_plat_sip_handler()
/rk3399_ARM-atf/services/std_svc/spm/el3_spmc/
H A Dspmc_pm.c169 resp = read_ctx_reg(gpregs_ctx, CTX_GPREG_X0); in spmc_send_pm_msg()
177 resp = read_ctx_reg(gpregs_ctx, CTX_GPREG_X1); in spmc_send_pm_msg()
186 resp = read_ctx_reg(gpregs_ctx, CTX_GPREG_X2); in spmc_send_pm_msg()
198 return read_ctx_reg(gpregs_ctx, CTX_GPREG_X3); in spmc_send_pm_msg()
/rk3399_ARM-atf/lib/extensions/fgt/
H A Dfgt2.c23 reg = read_ctx_reg(state, CTX_SCR_EL3); in fgt2_enable()
/rk3399_ARM-atf/lib/extensions/debug/
H A Ddebugv8p9.c18 mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3); in debugv8p9_extended_bp_wp_enable()
/rk3399_ARM-atf/bl31/
H A Dbl31_traps.c236 u_register_t old_spsr = read_ctx_reg(state, CTX_SPSR_EL3); in inject_undef64()
249 scr_el3 = read_ctx_reg(state, CTX_SCR_EL3); in inject_undef64()
252 elr_el3 = read_ctx_reg(state, CTX_ELR_EL3); in inject_undef64()
/rk3399_ARM-atf/plat/arm/common/aarch64/
H A Dexecution_state_switch.c61 spsr = read_ctx_reg(el3_ctx, CTX_SPSR_EL3); in arm_execution_state_switch()
95 scr = read_ctx_reg(el3_ctx, CTX_SCR_EL3); in arm_execution_state_switch()
/rk3399_ARM-atf/lib/extensions/trf/aarch64/
H A Dtrf.c15 u_register_t mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3); in trf_enable()
/rk3399_ARM-atf/lib/extensions/brbe/
H A Dbrbe.c15 u_register_t mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3); in brbe_enable()
/rk3399_ARM-atf/lib/el3_runtime/aarch32/
H A Dcontext_mgmt.c187 scr = read_ctx_reg(get_regs_ctx(ctx), CTX_SCR); in cm_prepare_el3_exit()
190 hsctlr = read_ctx_reg(get_regs_ctx(ctx), in cm_prepare_el3_exit()
/rk3399_ARM-atf/include/lib/el3_runtime/aarch32/
H A Dcontext.h50 #define read_ctx_reg(ctx, offset) ((ctx)->ctx_regs[offset >> WORD_SHIFT]) macro
/rk3399_ARM-atf/include/lib/el3_runtime/aarch64/
H A Dcontext.h250 #define read_ctx_reg(ctx, offset) ((ctx)->ctx_regs[(offset) >> DWORD_SHIFT]) macro
438 return read_ctx_reg(get_errata_speculative_at_ctx(ctx), in read_ctx_sctlr_el1_reg_errata()
448 return read_ctx_reg(get_errata_speculative_at_ctx(ctx), in read_ctx_tcr_el1_reg_errata()
/rk3399_ARM-atf/lib/extensions/pmuv3/aarch64/
H A Dpmuv3.c49 u_register_t mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3); in pmuv3_enable()

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