18fcd3d96SManish V Badarkhe /* 2*c1b0a97bSBoyan Karatotev * Copyright (c) 2021-2025, Arm Limited. All rights reserved. 38fcd3d96SManish V Badarkhe * 48fcd3d96SManish V Badarkhe * SPDX-License-Identifier: BSD-3-Clause 58fcd3d96SManish V Badarkhe */ 68fcd3d96SManish V Badarkhe 78fcd3d96SManish V Badarkhe #include <arch.h> 8fc8d2d39SAndre Przywara #include <arch_features.h> 98fcd3d96SManish V Badarkhe #include <arch_helpers.h> 108fcd3d96SManish V Badarkhe #include <lib/extensions/trf.h> 118fcd3d96SManish V Badarkhe trf_enable(cpu_context_t * ctx)12123002f9SJayanth Dodderi Chidanandvoid trf_enable(cpu_context_t *ctx) 138fcd3d96SManish V Badarkhe { 14123002f9SJayanth Dodderi Chidanand el3_state_t *state = get_el3state_ctx(ctx); 15123002f9SJayanth Dodderi Chidanand u_register_t mdcr_el3_val = read_ctx_reg(state, CTX_MDCR_EL3); 168fcd3d96SManish V Badarkhe 178fcd3d96SManish V Badarkhe /* 1899506facSBoyan Karatotev * MDCR_EL3.STE = b0 1999506facSBoyan Karatotev * Trace prohibited in Secure state unless overridden by the 2099506facSBoyan Karatotev * IMPLEMENTATION DEFINED authentication interface. 2199506facSBoyan Karatotev * 228fcd3d96SManish V Badarkhe * MDCR_EL3.TTRF = b0 238fcd3d96SManish V Badarkhe * Allow access of trace filter control registers from NS-EL2 248fcd3d96SManish V Badarkhe * and NS-EL1 when NS-EL2 is implemented but not used 25*c1b0a97bSBoyan Karatotev * 26*c1b0a97bSBoyan Karatotev * MDCR_EL3.RLTE = b0 27*c1b0a97bSBoyan Karatotev * Trace prohibited in Realm state, unless overridden by the 28*c1b0a97bSBoyan Karatotev * IMPLEMENTATION DEFINED authentication interface. 298fcd3d96SManish V Badarkhe */ 30*c1b0a97bSBoyan Karatotev mdcr_el3_val &= ~(MDCR_STE_BIT | MDCR_TTRF_BIT | MDCR_RLTE_BIT); 31123002f9SJayanth Dodderi Chidanand write_ctx_reg(state, CTX_MDCR_EL3, mdcr_el3_val); 328fcd3d96SManish V Badarkhe } 3360d330dcSBoyan Karatotev trf_init_el2_unused(void)3460d330dcSBoyan Karatotevvoid trf_init_el2_unused(void) 3560d330dcSBoyan Karatotev { 3660d330dcSBoyan Karatotev /* 3760d330dcSBoyan Karatotev * MDCR_EL2.TTRF: Set to zero so that access to Trace 3860d330dcSBoyan Karatotev * Filter Control register TRFCR_EL1 at EL1 is not 3960d330dcSBoyan Karatotev * trapped to EL2. This bit is RES0 in versions of 4060d330dcSBoyan Karatotev * the architecture earlier than ARMv8.4. 4160d330dcSBoyan Karatotev * 4260d330dcSBoyan Karatotev */ 4360d330dcSBoyan Karatotev write_mdcr_el2(read_mdcr_el2() & ~MDCR_EL2_TTRF); 4460d330dcSBoyan Karatotev } 45