| #
cb6551e2 |
| 22-Oct-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "perf(spmd): don't initialise context on boot, do it on CPU_ON" into integration
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| #
9f3f4d87 |
| 20-Oct-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
perf(spmd): don't initialise context on boot, do it on CPU_ON
Normal and Realm worlds setup their contexts whenever a core comes online. This speeds up boot and as a side effect allows any cores tha
perf(spmd): don't initialise context on boot, do it on CPU_ON
Normal and Realm worlds setup their contexts whenever a core comes online. This speeds up boot and as a side effect allows any cores that are never turned on to not be initialised.
So do this for spmd's Secure world too. This makes all three worlds consistent.
Change-Id: I8676d2a03a472074176e4db06910fc2b6cbf269a Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
8ed1e20b |
| 04-Apr-2025 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "fix(spmd): check pwr mgmt status for SPMC framework response" into integration
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| #
8723eaf2 |
| 08-Feb-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
fix(spmd): check pwr mgmt status for SPMC framework response
The direct message response received by the SPMD upon a CPU_OFF power management operation must be a framework message. If message indica
fix(spmd): check pwr mgmt status for SPMC framework response
The direct message response received by the SPMD upon a CPU_OFF power management operation must be a framework message. If message indicates SPMC denied the CPU_OFF operation, SPMD shall panic.
However, if SPMC does not support receiving power management related framework messages from SPMD, it will return FFA_ERROR. In such case, SPMD takes an implementation defined choice to ignore the the FFA_ERROR and proceed with power management operation.
Change-Id: I18b9ee3fb8fd605bcd4aaa6802c969e9d36ccbe1 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| #
2c1cbfdd |
| 26-Oct-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(spmd): fix FFA_VERSION forwarding" into integration
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| #
76d53ee1 |
| 10-Jul-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
fix(spmd): fix FFA_VERSION forwarding
When FFA_VERSION is forwarded from SPMD to SPMC, ensure that the full NS GP regs context incl. x8-x17 is carried when building the SPMD to SPMC direct message.
fix(spmd): fix FFA_VERSION forwarding
When FFA_VERSION is forwarded from SPMD to SPMC, ensure that the full NS GP regs context incl. x8-x17 is carried when building the SPMD to SPMC direct message.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I3467c0e04de95ab80f7c86a0763021a5fa961e4d
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| #
b1470ccc |
| 16-May-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "ffa_el3_spmc" into integration
* changes: feat(spmd): allow forwarding of FFA_FRAG_RX/TX calls feat(spmc): add support for FFA_SPM_ID_GET feat(spmc): add support for
Merge changes from topic "ffa_el3_spmc" into integration
* changes: feat(spmd): allow forwarding of FFA_FRAG_RX/TX calls feat(spmc): add support for FFA_SPM_ID_GET feat(spmc): add support for forwarding a secure interrupt to the SP feat(spmc): add support for FF-A power mgmt. messages in the EL3 SPMC
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| #
59bd2ad8 |
| 12-Apr-2022 |
Marc Bonnici <marc.bonnici@arm.com> |
feat(spmc): add support for FF-A power mgmt. messages in the EL3 SPMC
This patch adds support for forwarding the following PSCI messages received by the SPMC at EL3 to the S-EL1 SP if the SP has ind
feat(spmc): add support for FF-A power mgmt. messages in the EL3 SPMC
This patch adds support for forwarding the following PSCI messages received by the SPMC at EL3 to the S-EL1 SP if the SP has indicated that it wishes to receive the appropriate message via its manifest.
1. A PSCI CPU_OFF message in response to a cpu hot unplug request from the OS. 2. A message to indicate warm boot of a cpu in response to a cpu hot plug request from the OS. 3. A PSCI CPU_SUSPEND message in response to a cpu idle event initiated from the OS. 4. A message to indicate warm boot of a cpu from a shallow power state in response to a cpu resume power event.
This patch also implements the FFA_SECONDARY_EP_REGISTER function to enable the SP specify its secondary entrypoint.
Signed-off-by: Achin Gupta <achin.gupta@arm.com> Signed-off-by: Marc Bonnici <marc.bonnici@arm.com> Change-Id: I375d0655b2c6fc27445facc39213d1d0678557f4
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| #
b298d4df |
| 04-Mar-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "feat(ff-a): forward FFA_VERSION from SPMD to SPMC" into integration
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| #
9944f557 |
| 09-Dec-2021 |
Daniel Boulby <daniel.boulby@arm.com> |
feat(ff-a): forward FFA_VERSION from SPMD to SPMC
Introduced by FF-A v1.1 we must forward a call to FFA_VERSION to the SPMC so that the ffa version of the caller can be stored for later use. Since t
feat(ff-a): forward FFA_VERSION from SPMD to SPMC
Introduced by FF-A v1.1 we must forward a call to FFA_VERSION to the SPMC so that the ffa version of the caller can be stored for later use. Since the return of FFA_VERSION is not wrapped in a FF-A call we need to use a direct message request to do this forwarding. For the spmd_handler in the SPMC to hand off to the correct function we use w2 to specify a target framework function. Therefore we must update PSCI CPU_OFF to do this as well.
Change-Id: Ibaa6832b66f1597b3d65aa8986034f0c5916016d Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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| #
28623c10 |
| 08-Nov-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix: libc: use long for 64-bit types on aarch64" into integration
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| #
4ce3e99a |
| 25-Aug-2020 |
Scott Branden <scott.branden@broadcom.com> |
fix: libc: use long for 64-bit types on aarch64
Use long instead of long long on aarch64 for 64_t stdint types. Introduce inttypes.h to properly support printf format specifiers for fixed width type
fix: libc: use long for 64-bit types on aarch64
Use long instead of long long on aarch64 for 64_t stdint types. Introduce inttypes.h to properly support printf format specifiers for fixed width types for such change.
Change-Id: I0bca594687a996fde0a9702d7a383055b99f10a1 Signed-off-by: Scott Branden <scott.branden@broadcom.com>
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| #
2245bb8a |
| 24-Sep-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "refactor(spmd): boot interface and pass core id" into integration
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| #
f2dcf418 |
| 21-Jun-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
refactor(spmd): boot interface and pass core id
This change refactors the SPMD to setup SPMC CPU contexts once and early from spmd_spmc_init (single call to cm_setup_context rather than on each and
refactor(spmd): boot interface and pass core id
This change refactors the SPMD to setup SPMC CPU contexts once and early from spmd_spmc_init (single call to cm_setup_context rather than on each and every warm boot). Pass the core linear ID through a GP register as an implementation defined behavior helping FF-A adoption to legacy TOSes (essentially when secure virtualization is not used).
A first version of this change was originally submitted by Lukas [1]. Pasting below the original justification:
Our TEE, Kinibi, is used to receive the core linear ID in the x3 register of booting secondary cores. This patch is necessary to bring up secondary cores with Kinibi as an SPMC in SEL1.
In Kinibi, the TEE is mostly platform-independent and all platform- specifics like topology is concentrated in TF-A of our customers. That is why we don't have the MPIDR - linear ID mapping in Kinibi. We need the correct linear ID to program the GICv2 target register, for example in power management case. It is not needed on GICv3/v4, because of using a fixed mapping from MPIDR to ICDIPTR/GICD_ITARGETSRn register.
For debug and power management purpose, we also want a unified view to linear id between Linux and the TEE. E.g. to disable a core, to see what cores are printing a trace / an event.
In the past, Kinibi had several other designs, but the complexity was getting out of control: * Platform-specific assembler macros in the kernel. * A per-core SMC from Linux to tell the linear ID after the boot. * With DynamiQ, it seems SIPs were playing with MPIDR register values, reusing them between cores and changing them during boot.
[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/10235
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Lukas Hanel <lukas.hanel@trustonic.com> Change-Id: Ifa8fa208e9b8eb1642c80b5f7b54152dadafa75e
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| #
ae030052 |
| 16-Mar-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "od/ffa_spmc_pwr" into integration
* changes: SPM: declare third cactus instance as UP SP SPMD: lock the g_spmd_pm structure FF-A: implement FFA_SECONDARY_EP_REGISTER
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| #
473ced56 |
| 02-Mar-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMD: lock the g_spmd_pm structure
Add a lock and spin lock/unlock calls when accessing the fields of the SPMD PM structure.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I9bab7
SPMD: lock the g_spmd_pm structure
Add a lock and spin lock/unlock calls when accessing the fields of the SPMD PM structure.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I9bab705564dc1ba003c29512b1f9be5f126fbb0d
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| #
cdb49d47 |
| 19-Jan-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
FF-A: implement FFA_SECONDARY_EP_REGISTER
Remove the former impdef SPMD service for SPMC entry point registration. Replace with FFA_SECONDARY_EP_REGISTER ABI providing a single entry point address i
FF-A: implement FFA_SECONDARY_EP_REGISTER
Remove the former impdef SPMD service for SPMC entry point registration. Replace with FFA_SECONDARY_EP_REGISTER ABI providing a single entry point address into the SPMC for primary and secondary cold boot.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I067adeec25fc12cdae90c15a616903b4ac4d4d83
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| #
c2c03e75 |
| 03-Oct-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "spmd: Fix signedness comparison warning" into integration
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| #
6e4da01f |
| 02-Oct-2020 |
Andre Przywara <andre.przywara@arm.com> |
spmd: Fix signedness comparison warning
With -Wsign-compare, compilers issue a warning in the SPMD code: ==================== services/std_svc/spmd/spmd_pm.c:35:22: error: comparison of integer expr
spmd: Fix signedness comparison warning
With -Wsign-compare, compilers issue a warning in the SPMD code: ==================== services/std_svc/spmd/spmd_pm.c:35:22: error: comparison of integer expressions of different signedness: 'int' and 'unsigned int' [-Werror=sign-compare] 35 | if ((id < 0) || (id >= PLATFORM_CORE_COUNT)) { | ^~ cc1: all warnings being treated as errors ====================
Since we just established that "id" is positive, we can safely cast it to an unsigned type to make the comparison have matching types.
Change-Id: I6ef24804c88136d7e3f15de008e4fea854f10ffe Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| #
a6ab1ae3 |
| 21-Aug-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "spm-secondary-cores" into integration
* changes: SPMC: embed secondary core ep info into to SPMC context SPMC: manifest changes to support multicore boot SPMD: second
Merge changes from topic "spm-secondary-cores" into integration
* changes: SPMC: embed secondary core ep info into to SPMC context SPMC: manifest changes to support multicore boot SPMD: secondary cores PM on and off SPD hooks relayed to SPMC SPMD: handle SPMC message to register secondary core entry point SPMD: introduce SPMC to SPMD messages SPMD: register the SPD PM hooks SPMD: add generic SPD PM handlers SPMD: enhance SPMC internal boot states SPMD: entry point info get helper
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| #
02d50bb0 |
| 19-Jun-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMC: embed secondary core ep info into to SPMC context
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Icdb15b8664fb3467ffd55
SPMC: embed secondary core ep info into to SPMC context
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Icdb15b8664fb3467ffd55b44d1f0660457192586
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| #
a92bc73b |
| 23-Mar-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMD: secondary cores PM on and off SPD hooks relayed to SPMC
Define SPMD PM hooks for warm boot and off events. svc_on_finish handler enters the SPMC at the entry point defined by the secondary EP
SPMD: secondary cores PM on and off SPD hooks relayed to SPMC
Define SPMD PM hooks for warm boot and off events. svc_on_finish handler enters the SPMC at the entry point defined by the secondary EP register service. The svc_off handler notifies the SPMC that a physical core is being turned off through a notification message.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I2609a75a0c6ffb9f6313fc09553be2b29a41de59
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| #
f0d743db |
| 16-Apr-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMD: handle SPMC message to register secondary core entry point
Upon booting, the SPMC running on the primary core shall register the secondary core entry points to which a given secondary core bei
SPMD: handle SPMC message to register secondary core entry point
Upon booting, the SPMC running on the primary core shall register the secondary core entry points to which a given secondary core being woken up shall jump to into the SPMC . The current implementation assumes the SPMC calls a registering service implemented in the SPMD for each core identified by its MPIDR. This can typically happen in a simple loop implemented in the early SPMC initialization routines by passing each core identifier associated with an entry point address and context information. This service is implemented on top of a more generic SPMC<=>SPMD interface using direct request/response message passing as defined by the FF-A specification.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: I1f70163b6b5cee0880bd2004e1fec41e3780ba35
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| #
b058f20a |
| 28-Oct-2019 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMD: add generic SPD PM handlers
This patch defines and registers the SPMD PM handler hooks. This is intended to relay boot and PM events to the SPMC.
Change-Id: If5a758d22b8d2152cbbb83a0cad563b5e
SPMD: add generic SPD PM handlers
This patch defines and registers the SPMD PM handler hooks. This is intended to relay boot and PM events to the SPMC.
Change-Id: If5a758d22b8d2152cbbb83a0cad563b5e1c6bd49 Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
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