1*33e6aaacSArvind Ram Prakash /* 2*33e6aaacSArvind Ram Prakash * Copyright (c) 2024, Arm Limited. All rights reserved. 3*33e6aaacSArvind Ram Prakash * 4*33e6aaacSArvind Ram Prakash * SPDX-License-Identifier: BSD-3-Clause 5*33e6aaacSArvind Ram Prakash */ 6*33e6aaacSArvind Ram Prakash 7*33e6aaacSArvind Ram Prakash #include <arch.h> 8*33e6aaacSArvind Ram Prakash #include <arch_features.h> 9*33e6aaacSArvind Ram Prakash #include <arch_helpers.h> 10*33e6aaacSArvind Ram Prakash #include <lib/extensions/fgt2.h> 11*33e6aaacSArvind Ram Prakash fgt2_enable(cpu_context_t * context)12*33e6aaacSArvind Ram Prakashvoid fgt2_enable(cpu_context_t *context) 13*33e6aaacSArvind Ram Prakash { 14*33e6aaacSArvind Ram Prakash u_register_t reg; 15*33e6aaacSArvind Ram Prakash el3_state_t *state; 16*33e6aaacSArvind Ram Prakash 17*33e6aaacSArvind Ram Prakash state = get_el3state_ctx(context); 18*33e6aaacSArvind Ram Prakash 19*33e6aaacSArvind Ram Prakash /* Set the FGTEN2 bit in SCR_EL3 to enable access to HFGITR2_EL2, 20*33e6aaacSArvind Ram Prakash * HFGRTR2_EL2, HFGWTR_EL2, HDFGRTR2_EL2, and HDFGWTR2_EL2. 21*33e6aaacSArvind Ram Prakash */ 22*33e6aaacSArvind Ram Prakash 23*33e6aaacSArvind Ram Prakash reg = read_ctx_reg(state, CTX_SCR_EL3); 24*33e6aaacSArvind Ram Prakash reg |= SCR_FGTEN2_BIT; 25*33e6aaacSArvind Ram Prakash write_ctx_reg(state, CTX_SCR_EL3, reg); 26*33e6aaacSArvind Ram Prakash } 27*33e6aaacSArvind Ram Prakash 28