| /rk3399_ARM-atf/drivers/arm/css/mhu/ |
| H A D | css_mhu_doorbell.c | 13 void mhu_ring_doorbell(struct scmi_channel_plat_info *plat_info) in mhu_ring_doorbell() argument
15 MHU_RING_DOORBELL(plat_info->db_reg_addr, in mhu_ring_doorbell()
16 plat_info->db_modify_mask, in mhu_ring_doorbell()
17 plat_info->db_preserve_mask); in mhu_ring_doorbell()
20 void mhuv2_ring_doorbell(struct scmi_channel_plat_info *plat_info) in mhuv2_ring_doorbell() argument
22 uintptr_t mhuv2_base = plat_info->db_reg_addr & MHU_V2_FRAME_BASE_MASK; in mhuv2_ring_doorbell()
31 MHU_RING_DOORBELL(plat_info->db_reg_addr, in mhuv2_ring_doorbell()
32 plat_info->db_modify_mask, in mhuv2_ring_doorbell()
33 plat_info->db_preserve_mask); in mhuv2_ring_doorbell()
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| /rk3399_ARM-atf/plat/arm/board/morello/ |
| H A D | morello_bl2_setup.c | 26 static void dmc_ecc_setup(struct morello_plat_info *plat_info) in dmc_ecc_setup() argument
34 (uint32_t)(plat_info->local_ddr_size / 0x40000000)); in dmc_ecc_setup()
36 assert(plat_info->local_ddr_size > ARM_DRAM1_SIZE); in dmc_ecc_setup()
37 dram2_size = plat_info->local_ddr_size - ARM_DRAM1_SIZE; in dmc_ecc_setup()
72 if (plat_info->scc_config & MORELLO_SCC_CLIENT_MODE_MASK) { in dmc_ecc_setup()
74 usable_mem_size = plat_info->local_ddr_size - in dmc_ecc_setup()
75 (plat_info->local_ddr_size / 128ULL); in dmc_ecc_setup()
94 if (plat_info->scc_config & MORELLO_SCC_C1_TAG_CACHE_EN_MASK) { in dmc_ecc_setup()
100 if (plat_info->scc_config & MORELLO_SCC_C2_TAG_CACHE_EN_MASK) { in dmc_ecc_setup()
121 plat_info->local_ddr_size = usable_mem_size; in dmc_ecc_setup()
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| H A D | morello_image_load.c | 51 static int plat_morello_append_config_node(struct morello_plat_info *plat_info, in plat_morello_append_config_node() argument
59 usable_mem_size = plat_info->local_ddr_size; in plat_morello_append_config_node()
89 plat_info->remote_ddr_size); in plat_morello_append_config_node()
96 plat_info->remote_chip_count); in plat_morello_append_config_node()
103 plat_info->multichip_mode); in plat_morello_append_config_node()
110 plat_info->scc_config); in plat_morello_append_config_node()
116 if (plat_info->scc_config & MORELLO_SCC_CLIENT_MODE_MASK) { in plat_morello_append_config_node()
117 usable_mem_size = get_mem_client_mode(plat_info->local_ddr_size); in plat_morello_append_config_node()
171 struct morello_plat_info plat_info; local
183 &plat_info,
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| H A D | morello_bl31_setup.c | 19 struct morello_plat_info plat_info; variable
55 &plat_info, in bl31_platform_setup()
103 return (int32_t)plat_info.silicon_revision; in plat_get_soc_revision()
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| /rk3399_ARM-atf/plat/arm/board/n1sdp/ |
| H A D | n1sdp_image_load.c | 45 static int plat_n1sdp_append_config_node(struct n1sdp_plat_info *plat_info) in plat_n1sdp_append_config_node() argument
72 plat_info->multichip_mode); in plat_n1sdp_append_config_node()
79 plat_info->secondary_count); in plat_n1sdp_append_config_node()
86 plat_info->local_ddr_size); in plat_n1sdp_append_config_node()
93 plat_info->remote_ddr_size); in plat_n1sdp_append_config_node()
110 struct n1sdp_plat_info plat_info; in plat_get_next_bl_params() local
121 &plat_info, in plat_get_next_bl_params()
130 if ((plat_info.local_ddr_size == 0U) in plat_get_next_bl_params()
131 || (plat_info.local_ddr_size > N1SDP_MAX_DDR_CAPACITY_GB) in plat_get_next_bl_params()
132 || (plat_info.remote_ddr_size > N1SDP_MAX_DDR_CAPACITY_GB) in plat_get_next_bl_params()
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| H A D | n1sdp_bl31_setup.c | 133 struct n1sdp_plat_info plat_info; in bl31_platform_setup() local
144 &plat_info, in bl31_platform_setup()
152 if ((plat_info.local_ddr_size == 0) in bl31_platform_setup()
153 || (plat_info.local_ddr_size > N1SDP_MAX_DDR_CAPACITY_GB) in bl31_platform_setup()
154 || (plat_info.remote_ddr_size > N1SDP_MAX_DDR_CAPACITY_GB) in bl31_platform_setup()
155 || (plat_info.secondary_count > N1SDP_MAX_SECONDARY_COUNT)) { in bl31_platform_setup()
160 if (plat_info.multichip_mode) { in bl31_platform_setup()
161 n1sdp_multichip_data.chip_count = plat_info.secondary_count + 1; in bl31_platform_setup()
170 if (!plat_info.multichip_mode) { in bl31_platform_setup()
176 if ((plat_info.multichip_mode) && (plat_info.remote_ddr_size != 0)) in bl31_platform_setup()
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| H A D | n1sdp_bl2_setup.c | 62 struct n1sdp_plat_info plat_info; in bl2_platform_setup() local
73 &plat_info, in bl2_platform_setup()
81 if ((plat_info.local_ddr_size == 0) in bl2_platform_setup()
82 || (plat_info.local_ddr_size > N1SDP_MAX_DDR_CAPACITY_GB) in bl2_platform_setup()
83 || (plat_info.remote_ddr_size > N1SDP_MAX_DDR_CAPACITY_GB) in bl2_platform_setup()
84 || (plat_info.secondary_count > N1SDP_MAX_SECONDARY_COUNT)) { in bl2_platform_setup()
89 dmc_ecc_setup(plat_info.local_ddr_size); in bl2_platform_setup()
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| /rk3399_ARM-atf/plat/arm/css/common/ |
| H A D | css_bl2u_setup.c | 25 void bl2u_early_platform_setup(meminfo_t *mem_layout, void *plat_info) in bl2u_early_platform_setup() argument
27 if (!plat_info) in bl2u_early_platform_setup()
30 arm_bl2u_early_platform_setup(mem_layout, plat_info); in bl2u_early_platform_setup()
32 scp_bl2u_image_info = *(image_info_t *)plat_info; in bl2u_early_platform_setup()
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| /rk3399_ARM-atf/plat/imx/imx9/common/scmi/ |
| H A D | scmi_client.c | 27 static void mu_ring_doorbell(struct scmi_channel_plat_info *plat_info) in mu_ring_doorbell() argument
29 uint32_t db = mmio_read_32(plat_info->db_reg_addr) & in mu_ring_doorbell()
30 (plat_info->db_preserve_mask); in mu_ring_doorbell()
32 mmio_write_32(plat_info->db_reg_addr, db | plat_info->db_modify_mask); in mu_ring_doorbell()
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| /rk3399_ARM-atf/plat/xilinx/versal/aarch64/ |
| H A D | versal_common.c | 49 uint32_t plat_info[2]; in board_detection() local
51 if (pm_get_chipid(plat_info) != PM_RET_SUCCESS) { in board_detection()
59 platform_id = FIELD_GET(PLATFORM_MASK, plat_info[1]); in board_detection()
60 platform_version = FIELD_GET(PLATFORM_VERSION_MASK, plat_info[1]); in board_detection()
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| /rk3399_ARM-atf/plat/arm/common/ |
| H A D | arm_bl2u_setup.c | 42 void arm_bl2u_early_platform_setup(struct meminfo *mem_layout, void *plat_info) in arm_bl2u_early_platform_setup() argument
56 void bl2u_early_platform_setup(struct meminfo *mem_layout, void *plat_info) in bl2u_early_platform_setup() argument
58 arm_bl2u_early_platform_setup(mem_layout, plat_info); in bl2u_early_platform_setup()
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| /rk3399_ARM-atf/plat/arm/board/fvp/ |
| H A D | fvp_bl2u_setup.c | 13 void bl2u_early_platform_setup(struct meminfo *mem_layout, void *plat_info) in bl2u_early_platform_setup() argument
15 arm_bl2u_early_platform_setup(mem_layout, plat_info); in bl2u_early_platform_setup()
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| /rk3399_ARM-atf/include/drivers/arm/css/ |
| H A D | css_mhu_doorbell.h | 45 void mhu_ring_doorbell(struct scmi_channel_plat_info *plat_info);
46 void mhuv2_ring_doorbell(struct scmi_channel_plat_info *plat_info);
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| H A D | scmi.h | 136 void (*ring_doorbell)(struct scmi_channel_plat_info *plat_info);
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| /rk3399_ARM-atf/plat/renesas/rcar_gen5/ |
| H A D | plat_pm_scmi.c | 60 static void rcar_ring_doorbell(struct scmi_channel_plat_info *plat_info) in rcar_ring_doorbell() argument
62 u_register_t reg = plat_info->db_reg_addr; in rcar_ring_doorbell()
71 mmio_setbits_32(reg, plat_info->db_modify_mask); in rcar_ring_doorbell()
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| /rk3399_ARM-atf/include/plat/arm/common/ |
| H A D | plat_arm.h | 268 void *plat_info);
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| /rk3399_ARM-atf/include/plat/common/ |
| H A D | platform.h | 355 void *plat_info);
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| /rk3399_ARM-atf/docs/ |
| H A D | porting-guide.rst | 2092 Argument : meminfo *mem_info, void *plat_info
2099 The platform may copy the contents of the ``mem_info`` and ``plat_info`` into
2102 On Arm CSS platforms ``plat_info`` is interpreted as an ``image_info_t`` structure,
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