Merge "fix(versal): kernel QEMU boot is failing on versal platform" into integration

Merge "feat(versal): add support for QEMU COSIM platform" into integration

feat(versal): add support for QEMU COSIM platform

QEMU COSIM introduces a new platform id for Versal Platform.
QEMU COSIM is equivalent to QEMU with additional COSIM
extensions, so just switching pl

feat(versal): add support for QEMU COSIM platform

QEMU COSIM introduces a new platform id for Versal Platform.
QEMU COSIM is equivalent to QEMU with additional COSIM
extensions, so just switching platform_id to QEMU if QEMU COSIM
id is detected.

Change-Id: If81e0bf04301c7101f89d0df13134f7d04e8c257
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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fix(versal): kernel QEMU boot is failing on versal platform

Due to deprecation of VERSAL_PLATFORM build argument,
the board detection is done at runtime due to this the cpu
and uart clock freq was n

fix(versal): kernel QEMU boot is failing on versal platform

Due to deprecation of VERSAL_PLATFORM build argument,
the board detection is done at runtime due to this the cpu
and uart clock freq was not set as required to silicon values.

Updated Versal QEMU cpu_clock and uart_clock to silicon values.

Change-Id: I7c772f07ba45eb7e0ae095fd670718190e24f0d7
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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Merge "feat(versal): deprecate build time arg VERSAL_PLATFORM" into integration

feat(versal): deprecate build time arg VERSAL_PLATFORM

Update Versal platform to enable runtime detection of variants instead
of relying on the build argument VERSAL_PLATFORM.
Integrate functionalit

feat(versal): deprecate build time arg VERSAL_PLATFORM

Update Versal platform to enable runtime detection of variants instead
of relying on the build argument VERSAL_PLATFORM.
Integrate functionality for identifying the board variant during
runtime, allowing dynamic adjustment of CPU and UART clock values
accordingly.
Print the runtime board information during boot.
This advancement streamlines the build process by eliminating
dependencies on variant-specific builds, enabling the use of a single
binary for multiple variants.
Removing all the platform related constants for versal_virt,SPP,EMU as
they are not used.

Change-Id: I8c1a1d391bd1a8971addc1f56f8309a3fb75aa6d
Signed-off-by: Amey Avinash Raghatate <AmeyAvinash.Raghatate@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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Merge changes from topic "xlnx_set_freq" into integration

* changes:
refactor(xilinx): move plat_get_syscnt_freq2 to common file
refactor(versal-net): rename VERSAL_NET_IOU_SCNTRS register to ge

Merge changes from topic "xlnx_set_freq" into integration

* changes:
refactor(xilinx): move plat_get_syscnt_freq2 to common file
refactor(versal-net): rename VERSAL_NET_IOU_SCNTRS register to generic
fix(versal-net): setup counter frequency
fix(versal): initialize cntfrq_el0 register

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refactor(xilinx): move plat_get_syscnt_freq2 to common file

The code in the AMD-Xilinx platform for Versal and Versal NET is being
refactored to move the plat_get_syscnt_freq2() function to a common

refactor(xilinx): move plat_get_syscnt_freq2 to common file

The code in the AMD-Xilinx platform for Versal and Versal NET is being
refactored to move the plat_get_syscnt_freq2() function to a common
file. This common function is utilized for obtaining the CPU clock
frequency from the platform.

Change-Id: I7a4c3fa43a2941d51cacd259c57b24e545aea848
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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fix(versal): initialize cntfrq_el0 register

The set_cnt_freq() function is introduced to configure the counter
frequency register.If the counter frequency register is zero, it writes
the output of p

fix(versal): initialize cntfrq_el0 register

The set_cnt_freq() function is introduced to configure the counter
frequency register.If the counter frequency register is zero, it writes
the output of plat_get_syscnt_freq2() the cpu_clocks to the counter
frequency register.

According to the design specifications provided for Versal, the
lpd_data.cdo file contains a mask_write operation for register
0xFF140020 (base_frequency_ID_register) to set it to 0x5f5e100,
configuring it for a 100MHz clock frequency.

Reading the value of the IOU_SCNTRS_BASE_FREQ register using
mmio_read_32() to determine the counter frequency. If the counter
frequency is zero, the system will set the default CPU clocks constants
in TF-A and displays message. However, if the counter frequency is
non-zero, the program will return the value stored in the
IOU_SCNTRS_BASE_FREQ register.

The issue lies in dcc_status_timeout(),function verifying timeout
status, particularly within timeout_cnt_us2cnt(), converting
microseconds to counter ticks using read_cntfrq_el0(), which returns
zero. timeout_elapsed() then checks if the current counter from
read_cntpct_el0()exceeds the expiration count, denoting timeout.

After the function set_cnt_freq() writes into the counter frequency
register, the function timeout_cnt_us2cnt() is used to obtain the
appropriate counter ticks. Subsequently, the function timeout_elapsed()
checks whether the current counter value read_cntpct_el0() has
exceeded the specified expiration count. If it has, this indicates
that the timeout has lapsed.

Change-Id: I8f2f4d804b5aefa6f92083d831a5ebfade384294
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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Merge changes from topic "xlnx_tsp_feat" into integration

* changes:
docs(versal-net): add TSP build documentation
docs(versal): add TSP build documentation
feat(versal-net): add tsp support

Merge changes from topic "xlnx_tsp_feat" into integration

* changes:
docs(versal-net): add TSP build documentation
docs(versal): add TSP build documentation
feat(versal-net): add tsp support
feat(versal): add tsp support
refactor(xilinx): add generic TSP makefile
chore(zynqmp): reorganize tsp code into common path
refactor(xilinx): rename platform function to generic name

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refactor(xilinx): rename platform function to generic name

Refactor two platform specific functions, plat_versal_get_mmap() and
plat_versal_net_get_mmap(), to use a more generic function name
plat_g

refactor(xilinx): rename platform function to generic name

Refactor two platform specific functions, plat_versal_get_mmap() and
plat_versal_net_get_mmap(), to use a more generic function name
plat_get_mmap(). The function can be used in the common code to
obtain memory region.

Change-Id: I3eeb24aff217eef30af60a7742cbebe9d3b2edce
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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Merge changes from topic "xlnx_dtb_console" into integration

* changes:
feat(versal-net): retrieval of console information from dtb
feat(versal): retrieval of console information from dtb
refa

Merge changes from topic "xlnx_dtb_console" into integration

* changes:
feat(versal-net): retrieval of console information from dtb
feat(versal): retrieval of console information from dtb
refactor(xilinx): create generic function for clock retrieval
feat(zynqmp): retrieval of console information from dtb

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refactor(xilinx): create generic function for clock retrieval

Refactors the code in the AMD-Xilinx platform for Versal and Versal NET
to create a more generic function for obtaining clock signals
fr

refactor(xilinx): create generic function for clock retrieval

Refactors the code in the AMD-Xilinx platform for Versal and Versal NET
to create a more generic function for obtaining clock signals
from the platform. The new function get_uart_clk is specific to each
platform and providing greater flexibility for clock signal retrieval
in various parts of the codebase.

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: Iff67315339b2651c9bea73af0d89fcbad2bb332a

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Merge changes from topic "xlnx_smcc_soc_id" into integration

* changes:
feat(versal-net): add support for SMCC ARCH SOC ID
feat(versal): add support for SMCC ARCH SOC ID
refactor(versal-net):

Merge changes from topic "xlnx_smcc_soc_id" into integration

* changes:
feat(versal-net): add support for SMCC ARCH SOC ID
feat(versal): add support for SMCC ARCH SOC ID
refactor(versal-net): move macros to common header
feat(xilinx): add support to get chipid

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feat(versal): add support for SMCC ARCH SOC ID

Add support for SMCCC_ARCH_SOC_ID as per SMC Calling Convention for
Versal platform.
The SMCC ARCH SOC ID call is used by system software to obtain the

feat(versal): add support for SMCC ARCH SOC ID

Add support for SMCCC_ARCH_SOC_ID as per SMC Calling Convention for
Versal platform.
The SMCC ARCH SOC ID call is used by system software to obtain the SiP
defined SoC identification details.

Change-Id: I1466a9ad1bc8dde1cda516ddd3edbaa6a5941237
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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Merge "feat(xilinx): sync copyright format" into integration

feat(xilinx): sync copyright format

Use the same format in all files 's/Copyright (C)/Copyright (c)/g'.

Change-Id: I0e200eb135e7369d0e6b3b694acd406ec10ca9e7
Signed-off-by: Michal Simek <michal.sime

feat(xilinx): sync copyright format

Use the same format in all files 's/Copyright (C)/Copyright (c)/g'.

Change-Id: I0e200eb135e7369d0e6b3b694acd406ec10ca9e7
Signed-off-by: Michal Simek <michal.simek@amd.com>

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Merge changes from topic "versal/xlat-v2" into integration

* changes:
feat(versal): switch to xlat_v2
fix(xilinx): remove asserts around arg0/arg1

Merge "style(xilinx): replace ARM by Arm in copyrights" into integration

feat(versal): switch to xlat_v2

Switch to v2 version to add support for dynamic mapping which is not
supported in v1. It can be used for run time DT mapping.

Change-Id: I3f27591caf944dc758cc45ee870

feat(versal): switch to xlat_v2

Switch to v2 version to add support for dynamic mapping which is not
supported in v1. It can be used for run time DT mapping.

Change-Id: I3f27591caf944dc758cc45ee870b9b5b3ff0a18d
Signed-off-by: Michal Simek <michal.simek@amd.com>

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Merge "fix(versal): replace FPD_MAINCCI* macros" into integration

style(xilinx): replace ARM by Arm in copyrights

The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix")
is enforcing proper case for ARM. That's why fix it in plat/xilinx to
make sure

style(xilinx): replace ARM by Arm in copyrights

The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix")
is enforcing proper case for ARM. That's why fix it in plat/xilinx to
make sure that pre-commit.copyright won't be touching platform specific
files.

Change-Id: I49c66e18d46ed871a6aa128c9b2a403d0cf83416
Signed-off-by: Michal Simek <michal.simek@amd.com>

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fix(versal): replace FPD_MAINCCI* macros

Replace FPD_MAINCCI* macros by PLAT_ARM_CCI* not to have two different
names for the same IP.

Change-Id: Ia1930e150a51603471051acec5c79c649d57f92f
Signed-of

fix(versal): replace FPD_MAINCCI* macros

Replace FPD_MAINCCI* macros by PLAT_ARM_CCI* not to have two different
names for the same IP.

Change-Id: Ia1930e150a51603471051acec5c79c649d57f92f
Signed-off-by: Michal Simek <michal.simek@amd.com>

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Merge changes from topic "xlnx_feat_chores" into integration

* changes:
chore(xilinx): update print information
feat(versal-net): add jtag dcc support

chore(xilinx): update print information

Remove company name from the console messages while printing only
relevant information for the platform.

Change-Id: Id8171326e0267eb6f3a26de4eb66143970de2dbd

chore(xilinx): update print information

Remove company name from the console messages while printing only
relevant information for the platform.

Change-Id: Id8171326e0267eb6f3a26de4eb66143970de2dbd
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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