1cf85030eSsahil /*
2*0f37ae13STamas Ban * Copyright (c) 2022-2024, Arm Limited. All rights reserved.
3cf85030eSsahil *
4cf85030eSsahil * SPDX-License-Identifier: BSD-3-Clause
5cf85030eSsahil */
6cf85030eSsahil
7cf85030eSsahil #include <arch_helpers.h>
8cf85030eSsahil #include <common/debug.h>
9cf85030eSsahil #include <common/desc_image_load.h>
10cf85030eSsahil #include <drivers/arm/css/sds.h>
11cf85030eSsahil #include <libfdt.h>
12cf85030eSsahil #include <plat/common/platform.h>
13cf85030eSsahil
14cf85030eSsahil #include "n1sdp_def.h"
15cf85030eSsahil #include <plat/arm/common/plat_arm.h>
16*0f37ae13STamas Ban #include <platform_def.h>
17cf85030eSsahil
18cf85030eSsahil /*
19cf85030eSsahil * Platform information structure stored in SDS.
20cf85030eSsahil * This structure holds information about platform's DDR
21cf85030eSsahil * size which will be used to zero out the memory before
22cf85030eSsahil * enabling the ECC capability as well as information
23cf85030eSsahil * about multichip setup
24cf85030eSsahil * - multichip mode
25cf85030eSsahil * - secondary_count
26cf85030eSsahil * - Local DDR size in GB, DDR memory in master board
27cf85030eSsahil * - Remote DDR size in GB, DDR memory in secondary board
28cf85030eSsahil */
29cf85030eSsahil struct n1sdp_plat_info {
30cf85030eSsahil bool multichip_mode;
31cf85030eSsahil uint8_t secondary_count;
32cf85030eSsahil uint8_t local_ddr_size;
33cf85030eSsahil uint8_t remote_ddr_size;
34cf85030eSsahil } __packed;
35cf85030eSsahil
36cf85030eSsahil /*******************************************************************************
37cf85030eSsahil * This function inserts Platform information via device tree nodes as,
38cf85030eSsahil * platform-info {
39cf85030eSsahil * multichip-mode = <0x0>;
40cf85030eSsahil * secondary-chip-count = <0x0>;
41cf85030eSsahil * local-ddr-size = <0x0>;
42cf85030eSsahil * remote-ddr-size = <0x0>;
43cf85030eSsahil * };
44cf85030eSsahil ******************************************************************************/
plat_n1sdp_append_config_node(struct n1sdp_plat_info * plat_info)45cf85030eSsahil static int plat_n1sdp_append_config_node(struct n1sdp_plat_info *plat_info)
46cf85030eSsahil {
47cf85030eSsahil bl_mem_params_node_t *mem_params;
48cf85030eSsahil void *fdt;
49cf85030eSsahil int nodeoffset, err;
50cf85030eSsahil
51cf85030eSsahil mem_params = get_bl_mem_params_node(NT_FW_CONFIG_ID);
52cf85030eSsahil if (mem_params == NULL) {
53cf85030eSsahil ERROR("NT_FW CONFIG base address is NULL\n");
54cf85030eSsahil return -1;
55cf85030eSsahil }
56cf85030eSsahil
57cf85030eSsahil fdt = (void *)(mem_params->image_info.image_base);
58cf85030eSsahil
59cf85030eSsahil /* Check the validity of the fdt */
60cf85030eSsahil if (fdt_check_header(fdt) != 0) {
61cf85030eSsahil ERROR("Invalid NT_FW_CONFIG DTB passed\n");
62cf85030eSsahil return -1;
63cf85030eSsahil }
64cf85030eSsahil
65cf85030eSsahil nodeoffset = fdt_subnode_offset(fdt, 0, "platform-info");
66cf85030eSsahil if (nodeoffset < 0) {
67cf85030eSsahil ERROR("NT_FW_CONFIG: Failed to get platform-info node offset\n");
68cf85030eSsahil return -1;
69cf85030eSsahil }
70cf85030eSsahil
71cf85030eSsahil err = fdt_setprop_u32(fdt, nodeoffset, "multichip-mode",
72cf85030eSsahil plat_info->multichip_mode);
73cf85030eSsahil if (err < 0) {
74cf85030eSsahil ERROR("NT_FW_CONFIG: Failed to set multichip-mode\n");
75cf85030eSsahil return -1;
76cf85030eSsahil }
77cf85030eSsahil
78cf85030eSsahil err = fdt_setprop_u32(fdt, nodeoffset, "secondary-chip-count",
79cf85030eSsahil plat_info->secondary_count);
80cf85030eSsahil if (err < 0) {
81cf85030eSsahil ERROR("NT_FW_CONFIG: Failed to set secondary-chip-count\n");
82cf85030eSsahil return -1;
83cf85030eSsahil }
84cf85030eSsahil
85cf85030eSsahil err = fdt_setprop_u32(fdt, nodeoffset, "local-ddr-size",
86cf85030eSsahil plat_info->local_ddr_size);
87cf85030eSsahil if (err < 0) {
88cf85030eSsahil ERROR("NT_FW_CONFIG: Failed to set local-ddr-size\n");
89cf85030eSsahil return -1;
90cf85030eSsahil }
91cf85030eSsahil
92cf85030eSsahil err = fdt_setprop_u32(fdt, nodeoffset, "remote-ddr-size",
93cf85030eSsahil plat_info->remote_ddr_size);
94cf85030eSsahil if (err < 0) {
95cf85030eSsahil ERROR("NT_FW_CONFIG: Failed to set remote-ddr-size\n");
96cf85030eSsahil return -1;
97cf85030eSsahil }
98cf85030eSsahil
99cf85030eSsahil flush_dcache_range((uintptr_t)fdt, mem_params->image_info.image_size);
100cf85030eSsahil
101cf85030eSsahil return 0;
102cf85030eSsahil }
103cf85030eSsahil
104cf85030eSsahil /*******************************************************************************
105cf85030eSsahil * This function returns the list of executable images.
106cf85030eSsahil ******************************************************************************/
plat_get_next_bl_params(void)107cf85030eSsahil bl_params_t *plat_get_next_bl_params(void)
108cf85030eSsahil {
109cf85030eSsahil int ret;
110cf85030eSsahil struct n1sdp_plat_info plat_info;
111cf85030eSsahil
112*0f37ae13STamas Ban ret = sds_init(SDS_SCP_AP_REGION_ID);
113cf85030eSsahil if (ret != SDS_OK) {
114cf85030eSsahil ERROR("SDS initialization failed. ret:%d\n", ret);
115cf85030eSsahil panic();
116cf85030eSsahil }
117cf85030eSsahil
118*0f37ae13STamas Ban ret = sds_struct_read(SDS_SCP_AP_REGION_ID,
119*0f37ae13STamas Ban N1SDP_SDS_PLATFORM_INFO_STRUCT_ID,
120cf85030eSsahil N1SDP_SDS_PLATFORM_INFO_OFFSET,
121cf85030eSsahil &plat_info,
122cf85030eSsahil N1SDP_SDS_PLATFORM_INFO_SIZE,
123cf85030eSsahil SDS_ACCESS_MODE_NON_CACHED);
124cf85030eSsahil if (ret != SDS_OK) {
125cf85030eSsahil ERROR("Error getting platform info from SDS. ret:%d\n", ret);
126cf85030eSsahil panic();
127cf85030eSsahil }
128cf85030eSsahil
129cf85030eSsahil /* Validate plat_info SDS */
130cf85030eSsahil if ((plat_info.local_ddr_size == 0U)
131cf85030eSsahil || (plat_info.local_ddr_size > N1SDP_MAX_DDR_CAPACITY_GB)
132cf85030eSsahil || (plat_info.remote_ddr_size > N1SDP_MAX_DDR_CAPACITY_GB)
133cf85030eSsahil || (plat_info.secondary_count > N1SDP_MAX_SECONDARY_COUNT)
134cf85030eSsahil ){
135cf85030eSsahil ERROR("platform info SDS is corrupted\n");
136cf85030eSsahil panic();
137cf85030eSsahil }
138cf85030eSsahil
139cf85030eSsahil ret = plat_n1sdp_append_config_node(&plat_info);
140cf85030eSsahil if (ret != 0) {
141cf85030eSsahil panic();
142cf85030eSsahil }
143cf85030eSsahil
144cf85030eSsahil return arm_get_next_bl_params();
145cf85030eSsahil }
146