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/rk3399_ARM-atf/plat/arm/common/
H A Darm_nor_psci_mem_protect.c53 unsigned long enable = (val != 0) ? 1UL : 0UL; in arm_nor_psci_write_mem_protect() local
60 if (enable == 1UL) { in arm_nor_psci_write_mem_protect()
74 if (nor_word_program(PLAT_ARM_MEM_PROT_ADDR, enable) != 0) { in arm_nor_psci_write_mem_protect()
97 int enable; in arm_nor_psci_do_dyn_mem_protect() local
99 arm_psci_read_mem_protect(&enable); in arm_nor_psci_do_dyn_mem_protect()
100 if (enable == 0) in arm_nor_psci_do_dyn_mem_protect()
117 int enable; in arm_nor_psci_do_static_mem_protect() local
119 (void) arm_psci_read_mem_protect(&enable); in arm_nor_psci_do_static_mem_protect()
120 if (enable == 0) in arm_nor_psci_do_static_mem_protect()
/rk3399_ARM-atf/plat/mediatek/include/drivers/
H A Ddbgtop.h10 int mtk_dbgtop_dram_reserved(int enable);
11 int mtk_dbgtop_cfg_dvfsrc(int enable);
12 int mtk_dbgtop_dfd_count_en(int enable);
13 int mtk_dbgtop_drm_latch_en(int enable);
14 int mtk_dbgtop_dfd_pause_dvfsrc(int enable);
H A Dsramrc.h10 int sramrc_update_dvfsrc_setting(int enable);
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_spm_pmic_lp.h26 void set_vcore_lp_enable(bool enable);
29 void set_vsram_lp_enable(bool enable);
36 static inline void set_vcore_lp_enable(bool enable) in set_vcore_lp_enable() argument
38 (void)enable; in set_vcore_lp_enable()
46 static inline void set_vsram_lp_enable(bool enable) in set_vsram_lp_enable() argument
48 (void)enable; in set_vsram_lp_enable()
H A Dmt_spm_pmic_lp.c149 void set_vcore_lp_enable(bool enable) in set_vcore_lp_enable() argument
151 vcore_lp_enable = enable; in set_vcore_lp_enable()
159 void set_vsram_lp_enable(bool enable) in set_vsram_lp_enable() argument
161 vcore_sram_lp_enable = enable; in set_vsram_lp_enable()
/rk3399_ARM-atf/plat/socionext/uniphier/
H A Duniphier_cci.c37 void (*enable)(void); member
44 .enable = NULL,
49 .enable = __uniphier_cci_enable,
54 .enable = NULL,
73 if (uniphier_cci_ops.enable) in uniphier_cci_enable()
74 uniphier_cci_ops.enable(); in uniphier_cci_enable()
/rk3399_ARM-atf/plat/mediatek/common/lpm/
H A Dmt_lpm_dispatch.c12 .enable = 0,
16 .enable = 0,
34 (mt_dispatcher.enable & (BIT(user)))) { in invoke_mt_lpm_dispatch()
61 if (mt_secure_dispatcher.enable & (BIT(user))) { in invoke_mt_secure_lpm_dispatch()
83 mt_dispatcher.enable |= BIT(id); in mt_lpm_dispatcher_registry()
92 mt_secure_dispatcher.enable |= BIT(id); in mt_secure_lpm_dispatcher_registry()
/rk3399_ARM-atf/plat/mediatek/common/lpm_v2/
H A Dmt_lpm_dispatch.c18 .enable = 0,
23 .enable = 0,
38 (mt_dispatcher.enable & (1 << user))) { in invoke_mt_lpm_dispatch()
60 if (mt_secure_dispatcher.enable & (1 << user)) { in invoke_mt_secure_lpm_dispatch()
78 mt_dispatcher.enable |= BIT(id); in mt_lpm_dispatcher_registry()
87 mt_secure_dispatcher.enable |= BIT(id); in mt_secure_lpm_dispatcher_registry()
/rk3399_ARM-atf/plat/arm/board/tc/fdts/
H A Dtc_spmc_manifest.dtsi36 enable-method = "psci";
47 enable-method = "psci";
54 enable-method = "psci";
61 enable-method = "psci";
68 enable-method = "psci";
75 enable-method = "psci";
82 enable-method = "psci";
89 enable-method = "psci";
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/apusys/
H A Dapupwr_clkctl.h14 void apupwr_smc_acc_top(bool enable);
17 int32_t apupwr_smc_bulk_pll(bool enable);
20 int32_t apu_pll_enable(int32_t pll_idx, bool enable, bool fhctl_en);
H A Dapupll.c312 static void _pll_iso(uint32_t pll_idx, bool enable) in _pll_iso() argument
314 if (enable) { in _pll_iso()
379 int32_t apu_pll_enable(int32_t pll_idx, bool enable, bool fhctl_en) in apu_pll_enable() argument
389 if (enable) { in apu_pll_enable()
394 _pll_switch(pll_idx, enable, fhctl_en); in apu_pll_enable()
402 _pll_switch(pll_idx, enable, fhctl_en); in apu_pll_enable()
410 _pll_switch(pll_idx, enable, fhctl_en); in apu_pll_enable()
418 _pll_switch(pll_idx, enable, fhctl_en); in apu_pll_enable()
436 _pll_switch(pll_idx, enable, fhctl_en); in apu_pll_enable()
446 _pll_switch(pll_idx, enable, fhctl_en); in apu_pll_enable()
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H A Dapupwr_clkctl.c96 void apupwr_smc_acc_top(bool enable) in apupwr_smc_acc_top() argument
98 if (enable) { in apupwr_smc_acc_top()
313 int32_t apupwr_smc_bulk_pll(bool enable) in apupwr_smc_bulk_pll() argument
318 if (enable) { in apupwr_smc_bulk_pll()
320 ret = apu_pll_enable(pll_idx, enable, false); in apupwr_smc_bulk_pll()
327 ret = apu_pll_enable(pll_idx, enable, false); in apupwr_smc_bulk_pll()
/rk3399_ARM-atf/plat/hisilicon/hikey/
H A Dhisi_pwrc.c57 unsigned int val, enable; in hisi_pwrc_enable_debug() local
59 enable = 1U << (core + PDBGUP_CLUSTER1_SHIFT * cluster); in hisi_pwrc_enable_debug()
63 mmio_write_32(ACPU_SC_PDBGUP_MBIST, val | enable); in hisi_pwrc_enable_debug()
67 } while (!(val & enable)); in hisi_pwrc_enable_debug()
/rk3399_ARM-atf/plat/mediatek/drivers/pmic/
H A Dpmic_psc.c57 int enable_pmic_smart_reset(bool enable) in enable_pmic_smart_reset() argument
61 if (enable) in enable_pmic_smart_reset()
68 int enable_pmic_smart_reset_shutdown(bool enable) in enable_pmic_smart_reset_shutdown() argument
72 if (enable) in enable_pmic_smart_reset_shutdown()
/rk3399_ARM-atf/plat/mediatek/mt8173/drivers/wdt/
H A Dwdt.c71 void wdt_set_enable(int enable) in wdt_set_enable() argument
73 if (enable) in wdt_set_enable()
76 WDT_MODE_KEY | (enable ? WDT_MODE_EN : 0)); in wdt_set_enable()
/rk3399_ARM-atf/drivers/clk/
H A Dclk.c18 assert((ops != NULL) && (ops->enable != NULL)); in clk_enable()
20 return ops->enable(id); in clk_enable()
86 (ops_ptr->enable != NULL) && in clk_register()
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_pmic_lp.h43 void set_vcore_lp_enable(bool enable);
48 void set_vsram_lp_enable(bool enable);
H A Dmt_spm_pmic_lp.c140 void set_vcore_lp_enable(bool enable) in set_vcore_lp_enable() argument
142 vcore_lp_enable = enable; in set_vcore_lp_enable()
165 void set_vsram_lp_enable(bool enable) in set_vsram_lp_enable() argument
167 vcore_sram_lp_enable = enable; in set_vsram_lp_enable()
/rk3399_ARM-atf/plat/mediatek/drivers/gpio/
H A Dmtgpio_common.c91 static void mt_gpio_set_spec_pull_pupd(uint32_t pin, int enable, in mt_gpio_set_spec_pull_pupd() argument
103 if (enable == MT_GPIO_PULL_ENABLE) { in mt_gpio_set_spec_pull_pupd()
116 static void mt_gpio_set_pull_pu_pd(uint32_t pin, int enable, in mt_gpio_set_pull_pu_pd() argument
129 if (enable == MT_GPIO_PULL_ENABLE) { in mt_gpio_set_pull_pu_pd()
143 static void mt_gpio_set_pull_chip(uint32_t pin, int enable, in mt_gpio_set_pull_chip() argument
150 mt_gpio_set_spec_pull_pupd(pin, enable, select); in mt_gpio_set_pull_chip()
152 mt_gpio_set_pull_pu_pd(pin, enable, select); in mt_gpio_set_pull_chip()
/rk3399_ARM-atf/lib/psci/
H A Dpsci_mem_protect.c14 u_register_t psci_mem_protect(unsigned int enable) in psci_mem_protect() argument
24 if (psci_plat_pm_ops->write_mem_protect(enable) < 0) { in psci_mem_protect()
/rk3399_ARM-atf/fdts/
H A Drd1ae.dts30 enable-method = "psci";
42 enable-method = "psci";
54 enable-method = "psci";
66 enable-method = "psci";
78 enable-method = "psci";
90 enable-method = "psci";
102 enable-method = "psci";
114 enable-method = "psci";
126 enable-method = "psci";
138 enable-method = "psci";
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H A Dn1sdp-multi-chip.dts14 enable-method = "psci";
21 enable-method = "psci";
28 enable-method = "psci";
35 enable-method = "psci";
/rk3399_ARM-atf/plat/mediatek/include/drivers/pmic/
H A Dpmic_psc.h39 int enable_pmic_smart_reset(bool enable);
40 int enable_pmic_smart_reset_shutdown(bool enable);
/rk3399_ARM-atf/plat/mediatek/drivers/spm/
H A Dmt_spm_dispatcher.c22 static void mt_spm_pcm_wdt(int enable, uint64_t time) in mt_spm_pcm_wdt() argument
25 __spm_set_pcm_wdt(enable); in mt_spm_pcm_wdt()
/rk3399_ARM-atf/docs/getting_started/
H A Dbuild-options.rst62 - ``RESET_TO_BL2``: Boolean option to enable BL2 entrypoint as the CPU reset
71 - ``BL2_ENABLE_SP_LOAD``: Boolean option to enable loading SP packages from the
77 enable this use-case. For now, this option is only supported
113 - ``BRANCH_PROTECTION``: Numeric value to enable ARMv8.3 Pointer Authentication
204 - ``CTX_INCLUDE_PAUTH_REGS``: Numeric value to enable the Pointer
253 - ``EARLY_CONSOLE``: This option is used to enable early traces before default
277 - ``ENABLE_BACKTRACE``: This option controls whether to enable backtrace
287 - ``ENABLE_FEAT_AMU``: Numeric value to enable Activity Monitor Unit
291 and this option can be used to enable this feature on those systems as well.
294 - ``ENABLE_FEAT_AMUv1p1``: Numeric value to enable the ``FEAT_AMUv1p1``
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