xref: /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/mt_spm_pmic_lp.h (revision af0370f25a6663a0d737bbfb3985df4232eaaa55)
1 /*
2  * Copyright (c) 2025, Mediatek Inc. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef MT_SPM_PMIC_LP_H
8 #define MT_SPM_PMIC_LP_H
9 
10 #ifdef MTK_SUSPEND_VOL_BIN_SUPPORT
11 #include <platform_def.h>
12 #define SOC_VB_REG (EFUSEC_BASE + 0x580)
13 #define SUSPEND_VB_USE_SHIFT (0)
14 #define SUSPEND_VB_USE_MASK (0xf)
15 #endif
16 #ifdef MTK_AGING_FLAVOR_LOAD
17 #define SUSPEND_AGING_VAL_SHIFT (3) /* aging margin + 1 */
18 #define SUSPEND_AGING_VAL_DEFAULT (20) /* sign off - 5% */
19 #endif
20 #ifdef MTK_AGING_HV_FLAVOR_LOAD
21 #define SUSPEND_AGING_HV_VAL_DEFAULT (28) /* sign off + 5% */
22 #endif
23 
24 enum SPM_PWR_TYPE { SPM_LP_ENTER, SPM_LP_RESUME };
25 
26 enum {
27 	LP_MT6365 = 0,
28 	LP_MT6319_S7,
29 	LP_PMIC_SLAVE_NUM,
30 };
31 
32 #ifdef MTK_SPM_PMIC_GS_DUMP
33 #ifdef MTK_SPM_PMIC_GS_DUMP_SUSPEND
34 extern struct pmic_gs pmic_gs_suspend[];
35 #endif
36 #ifdef MTK_SPM_PMIC_GS_DUMP_SODI3
37 extern struct pmic_gs pmic_gs_sodi3[];
38 #endif
39 #ifdef MTK_SPM_PMIC_GS_DUMP_DPIDLE
40 extern struct pmic_gs pmic_gs_dpidle[];
41 #endif
42 #endif
43 void set_vcore_lp_enable(bool enable);
44 bool get_vcore_lp_enable(void);
45 void set_vcore_lp_volt(unsigned int volt);
46 unsigned int get_vcore_lp_volt(void);
47 
48 void set_vsram_lp_enable(bool enable);
49 bool get_vsram_lp_enable(void);
50 void set_vsram_lp_volt(uint32_t volt);
51 uint32_t get_vsram_lp_volt(void);
52 
53 int do_spm_low_power(enum SPM_PWR_TYPE type, uint32_t cmd);
54 
55 #endif
56