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Searched refs:ctx (Results 1 – 25 of 96) sorted by relevance

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/rk3399_ARM-atf/lib/el3_runtime/aarch64/
H A Dcontext_mgmt.c53 static void manage_extensions_nonsecure(cpu_context_t *ctx);
54 static void manage_extensions_secure(cpu_context_t *ctx);
57 static void setup_el1_context(cpu_context_t *ctx, const struct entry_point_info *ep) in setup_el1_context() argument
102 write_ctx_sctlr_el1_reg_errata(ctx, sctlr_elx); in setup_el1_context()
112 write_el1_ctx_common(get_el1_sysregs_ctx(ctx), actlr_el1, actlr_elx); in setup_el1_context()
120 static void setup_secure_context(cpu_context_t *ctx, const struct entry_point_info *ep) in setup_secure_context() argument
125 state = get_el3state_ctx(ctx); in setup_secure_context()
148 setup_el1_context(ctx, ep); in setup_secure_context()
151 manage_extensions_secure(ctx); in setup_secure_context()
161 static void setup_realm_context(cpu_context_t *ctx, const struct entry_point_info *ep) in setup_realm_context() argument
[all …]
/rk3399_ARM-atf/include/lib/el3_runtime/
H A Dcontext_el2.h231 #define read_el2_ctx_common(ctx, reg) (((ctx)->common).reg) argument
233 #define write_el2_ctx_common(ctx, reg, val) ((((ctx)->common).reg) \ argument
236 #define write_el2_ctx_common_sysreg128(ctx, reg, val) ((((ctx)->common).reg) \ argument
240 #define read_el2_ctx_mte2(ctx, reg) (((ctx)->mte2).reg) argument
241 #define write_el2_ctx_mte2(ctx, reg, val) ((((ctx)->mte2).reg) \ argument
244 #define read_el2_ctx_mte2(ctx, reg) ULL(0) argument
245 #define write_el2_ctx_mte2(ctx, reg, val) argument
249 #define read_el2_ctx_fgt(ctx, reg) (((ctx)->fgt).reg) argument
250 #define write_el2_ctx_fgt(ctx, reg, val) ((((ctx)->fgt).reg) \ argument
253 #define read_el2_ctx_fgt(ctx, reg) ULL(0) argument
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H A Dcontext_el1.h191 #define read_el1_ctx_common(ctx, reg) (((ctx)->common).reg) argument
193 #define write_el1_ctx_common(ctx, reg, val) ((((ctx)->common).reg) \ argument
196 #define write_el1_ctx_common_sysreg128(ctx, reg, val) ((((ctx)->common).reg) \ argument
199 #define read_el1_ctx_arch_timer(ctx, reg) (((ctx)->arch_timer).reg) argument
200 #define write_el1_ctx_arch_timer(ctx, reg, val) ((((ctx)->arch_timer).reg) \ argument
204 #define read_el1_ctx_aarch32(ctx, reg) (((ctx)->el1_aarch32).reg) argument
205 #define write_el1_ctx_aarch32(ctx, reg, val) ((((ctx)->el1_aarch32).reg) \ argument
208 #define read_el1_ctx_aarch32(ctx, reg) ULL(0) argument
209 #define write_el1_ctx_aarch32(ctx, reg, val) argument
213 #define read_el1_ctx_mte2(ctx, reg) (((ctx)->mte2).reg) argument
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/rk3399_ARM-atf/lib/extensions/amu/aarch32/
H A Damu.c83 amu_regs_t *ctx = &amu_ctx[core_pos]; in amu_context_save() local
93 write_amu_grp0_ctx_reg(ctx, 0, read64_amevcntr00()); in amu_context_save()
94 write_amu_grp0_ctx_reg(ctx, 1, read64_amevcntr01()); in amu_context_save()
95 write_amu_grp0_ctx_reg(ctx, 2, read64_amevcntr02()); in amu_context_save()
96 write_amu_grp0_ctx_reg(ctx, 3, read64_amevcntr03()); in amu_context_save()
103 write_amu_grp1_ctx_reg(ctx, 0xf, read64_amevcntr1f()); in amu_context_save()
106 write_amu_grp1_ctx_reg(ctx, 0xe, read64_amevcntr1e()); in amu_context_save()
109 write_amu_grp1_ctx_reg(ctx, 0xd, read64_amevcntr1d()); in amu_context_save()
112 write_amu_grp1_ctx_reg(ctx, 0xc, read64_amevcntr1c()); in amu_context_save()
115 write_amu_grp1_ctx_reg(ctx, 0xb, read64_amevcntr1b()); in amu_context_save()
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/rk3399_ARM-atf/lib/extensions/amu/aarch64/
H A Damu.c31 void amu_enable(cpu_context_t *ctx) in amu_enable() argument
35 el3_state_t *state = get_el3state_ctx(ctx); in amu_enable()
115 amu_regs_t *ctx = PER_CPU_CUR(amu_ctx); in amu_context_save() local
125 write_amu_grp0_ctx_reg(ctx, 0, read_amevcntr00_el0()); in amu_context_save()
126 write_amu_grp0_ctx_reg(ctx, 1, read_amevcntr01_el0()); in amu_context_save()
127 write_amu_grp0_ctx_reg(ctx, 2, read_amevcntr02_el0()); in amu_context_save()
128 write_amu_grp0_ctx_reg(ctx, 3, read_amevcntr03_el0()); in amu_context_save()
135 write_amu_grp1_ctx_reg(ctx, 0xf, read_amevcntr1f_el0()); in amu_context_save()
138 write_amu_grp1_ctx_reg(ctx, 0xe, read_amevcntr1e_el0()); in amu_context_save()
141 write_amu_grp1_ctx_reg(ctx, 0xd, read_amevcntr1d_el0()); in amu_context_save()
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/rk3399_ARM-atf/lib/xlat_tables_v2/
H A Dxlat_tables_core.c45 static int xlat_table_get_index(const xlat_ctx_t *ctx, const uint64_t *table) in xlat_table_get_index() argument
47 for (int i = 0; i < ctx->tables_num; i++) in xlat_table_get_index()
48 if (ctx->tables[i] == table) in xlat_table_get_index()
61 static uint64_t *xlat_table_get_empty(const xlat_ctx_t *ctx) in xlat_table_get_empty() argument
63 for (int i = 0; i < ctx->tables_num; i++) in xlat_table_get_empty()
64 if (ctx->tables_mapped_regions[i] == 0) in xlat_table_get_empty()
65 return ctx->tables[i]; in xlat_table_get_empty()
71 static void xlat_table_inc_regions_count(const xlat_ctx_t *ctx, in xlat_table_inc_regions_count() argument
74 int idx = xlat_table_get_index(ctx, table); in xlat_table_inc_regions_count()
76 ctx->tables_mapped_regions[idx]++; in xlat_table_inc_regions_count()
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H A Dxlat_tables_utils.c32 void xlat_tables_print(__unused xlat_ctx_t *ctx) in xlat_tables_print() argument
54 static void xlat_desc_print(const xlat_ctx_t *ctx, uint64_t desc) in xlat_desc_print() argument
57 int xlat_regime = ctx->xlat_regime; in xlat_desc_print()
140 static void xlat_tables_print_internal(xlat_ctx_t *ctx, uintptr_t table_base_va, in xlat_tables_print_internal() argument
200 xlat_tables_print_internal(ctx, table_idx_va, in xlat_tables_print_internal()
208 xlat_desc_print(ctx, desc); in xlat_tables_print_internal()
223 void xlat_tables_print(xlat_ctx_t *ctx) in xlat_tables_print() argument
228 if (ctx->xlat_regime == EL1_EL0_REGIME) { in xlat_tables_print()
230 } else if (ctx->xlat_regime == EL2_REGIME) { in xlat_tables_print()
233 assert(ctx->xlat_regime == EL3_REGIME); in xlat_tables_print()
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/rk3399_ARM-atf/drivers/st/crypto/
H A Dstm32_saes.c209 static int saes_start(struct stm32_saes_context *ctx) in saes_start() argument
214 if ((mmio_read_32(ctx->base + _SAES_SR) & _SAES_SR_BUSY) != _SAES_SR_BUSY) { in saes_start()
215 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_start()
217 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_start()
221 while ((mmio_read_32(ctx->base + _SAES_SR) & _SAES_SR_BUSY) == _SAES_SR_BUSY) { in saes_start()
231 static void saes_end(struct stm32_saes_context *ctx, int prev_error) in saes_end() argument
235 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_end()
237 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_end()
241 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in saes_end()
244 static void saes_write_iv(struct stm32_saes_context *ctx) in saes_write_iv() argument
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/rk3399_ARM-atf/drivers/nxp/crypto/caam/src/auth/
H A Dhash.c42 int hash_init(enum hash_algo algo, void **ctx) in hash_init() argument
48 *ctx = &glbl_ctx; in hash_init()
67 struct hash_ctx *ctx = context; in hash_update() local
69 if (ctx->sg_num >= MAX_SG) { in hash_update()
71 ctx->active = false; in hash_update()
76 if (ctx->algo != algo) { in hash_update()
78 ctx->active = false; in hash_update()
88 sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_hi, in hash_update()
91 sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_hi, 0x0); in hash_update()
93 sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_lo, (uintptr_t) data_ptr); in hash_update()
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/rk3399_ARM-atf/plat/qti/qtiseclib/src/
H A Dqtiseclib_cb_interface.c132 void *ctx; in qtiseclib_cb_get_ns_ctx() local
134 ctx = cm_get_context(NON_SECURE); in qtiseclib_cb_get_ns_ctx()
135 if (ctx) { in qtiseclib_cb_get_ns_ctx()
141 read_ctx_reg(get_el3state_ctx(ctx), CTX_SPSR_EL3); in qtiseclib_cb_get_ns_ctx()
142 qti_ns_ctx->elr_el3 = read_ctx_reg(get_el3state_ctx(ctx), CTX_ELR_EL3); in qtiseclib_cb_get_ns_ctx()
145 read_el1_ctx_common(get_el1_sysregs_ctx(ctx), spsr_el1); in qtiseclib_cb_get_ns_ctx()
147 read_el1_ctx_common(get_el1_sysregs_ctx(ctx), elr_el1); in qtiseclib_cb_get_ns_ctx()
148 qti_ns_ctx->sp_el1 = read_el1_ctx_common(get_el1_sysregs_ctx(ctx), sp_el1); in qtiseclib_cb_get_ns_ctx()
150 qti_ns_ctx->x0 = read_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X0); in qtiseclib_cb_get_ns_ctx()
151 qti_ns_ctx->x1 = read_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X1); in qtiseclib_cb_get_ns_ctx()
[all …]
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/ras/
H A Dnrd_ras_cpu.c55 void *ctx; in populate_cpu_err_data() local
57 ctx = cm_get_context(security_state); in populate_cpu_err_data()
65 cpu_info->ErrCtxEl1Reg[0] = read_el1_ctx_common(get_el1_sysregs_ctx(ctx), in populate_cpu_err_data()
67 cpu_info->ErrCtxEl1Reg[1] = read_el1_ctx_common(get_el1_sysregs_ctx(ctx), in populate_cpu_err_data()
69 cpu_info->ErrCtxEl1Reg[2] = read_el1_ctx_common(get_el1_sysregs_ctx(ctx), in populate_cpu_err_data()
72 cpu_info->ErrCtxEl1Reg[4] = read_el1_ctx_common(get_el1_sysregs_ctx(ctx), in populate_cpu_err_data()
76 cpu_info->ErrCtxEl1Reg[7] = read_ctx_sctlr_el1_reg_errata(ctx); in populate_cpu_err_data()
77 cpu_info->ErrCtxEl1Reg[8] = read_ctx_reg(get_gpregs_ctx(ctx), in populate_cpu_err_data()
79 cpu_info->ErrCtxEl1Reg[9] = read_el1_ctx_common(get_el1_sysregs_ctx(ctx), in populate_cpu_err_data()
81 cpu_info->ErrCtxEl1Reg[10] = read_el1_ctx_common(get_el1_sysregs_ctx(ctx), in populate_cpu_err_data()
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/rk3399_ARM-atf/plat/intel/soc/common/lib/sha/
H A Dsha.c45 void sha384_init(sha512_context *ctx) in sha384_init() argument
47 ctx->state[0] = SHA384_H0; in sha384_init()
48 ctx->state[1] = SHA384_H1; in sha384_init()
49 ctx->state[2] = SHA384_H2; in sha384_init()
50 ctx->state[3] = SHA384_H3; in sha384_init()
51 ctx->state[4] = SHA384_H4; in sha384_init()
52 ctx->state[5] = SHA384_H5; in sha384_init()
53 ctx->state[6] = SHA384_H6; in sha384_init()
54 ctx->state[7] = SHA384_H7; in sha384_init()
55 ctx->count[0] = ctx->count[1] = 0; in sha384_init()
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/rk3399_ARM-atf/include/lib/extensions/
H A Dtrbe.h13 void trbe_enable_ns(cpu_context_t *ctx);
14 void trbe_disable_ns(cpu_context_t *ctx);
15 void trbe_disable_secure(cpu_context_t *ctx);
16 void trbe_disable_realm(cpu_context_t *ctx);
19 static inline void trbe_enable_ns(cpu_context_t *ctx) in trbe_enable_ns() argument
22 static inline void trbe_disable_ns(cpu_context_t *ctx) in trbe_disable_ns() argument
25 static inline void trbe_disable_secure(cpu_context_t *ctx) in trbe_disable_secure() argument
28 static inline void trbe_disable_realm(cpu_context_t *ctx) in trbe_disable_realm() argument
H A Damu.h19 void amu_enable(cpu_context_t *ctx);
29 void amu_enable(cpu_context_t *ctx) in amu_enable() argument
66 static inline u_register_t read_amu_grp0_ctx_reg(amu_regs_t *ctx, size_t index) in read_amu_grp0_ctx_reg() argument
68 return ctx->grp0[index]; in read_amu_grp0_ctx_reg()
71 static inline void write_amu_grp0_ctx_reg(amu_regs_t *ctx, size_t index, u_register_t val) in write_amu_grp0_ctx_reg() argument
73 ctx->grp0[index] = val; in write_amu_grp0_ctx_reg()
85 static inline u_register_t read_amu_grp1_ctx_reg(amu_regs_t *ctx, size_t index) in read_amu_grp1_ctx_reg() argument
88 return ctx->grp1[index]; in read_amu_grp1_ctx_reg()
94 static inline void write_amu_grp1_ctx_reg(amu_regs_t *ctx, size_t index, u_register_t val) in write_amu_grp1_ctx_reg() argument
97 ctx->grp1[index] = val; in write_amu_grp1_ctx_reg()
H A Dspe.h14 void spe_enable_ns(cpu_context_t *ctx);
15 void spe_disable_secure(cpu_context_t *ctx);
16 void spe_disable_realm(cpu_context_t *ctx);
19 static inline void spe_enable_ns(cpu_context_t *ctx) in spe_enable_ns() argument
22 static inline void spe_disable_secure(cpu_context_t *ctx) in spe_disable_secure() argument
25 static inline void spe_disable_realm(cpu_context_t *ctx) in spe_disable_realm() argument
/rk3399_ARM-atf/lib/extensions/trbe/
H A Dtrbe.c42 void trbe_enable_ns(cpu_context_t *ctx) in trbe_enable_ns() argument
44 el3_state_t *state = get_el3state_ctx(ctx); in trbe_enable_ns()
53 static void trbe_disable_all(cpu_context_t *ctx, bool ns) in trbe_disable_all() argument
55 el3_state_t *state = get_el3state_ctx(ctx); in trbe_disable_all()
72 void trbe_disable_ns(cpu_context_t *ctx) in trbe_disable_ns() argument
74 trbe_disable_all(ctx, true); in trbe_disable_ns()
77 void trbe_disable_secure(cpu_context_t *ctx) in trbe_disable_secure() argument
79 trbe_disable_all(ctx, false); in trbe_disable_secure()
82 void trbe_disable_realm(cpu_context_t *ctx) in trbe_disable_realm() argument
84 trbe_disable_all(ctx, false); in trbe_disable_realm()
/rk3399_ARM-atf/services/std_svc/spmd/
H A Dspmd_pm.c66 spmd_spm_core_context_t *ctx = spmd_get_context(); in spmd_cpu_on_finish_handler() local
72 assert(ctx != NULL); in spmd_cpu_on_finish_handler()
73 assert(ctx->state != SPMC_STATE_ON); in spmd_cpu_on_finish_handler()
92 el3_state = get_el3state_ctx(&ctx->cpu_ctx); in spmd_cpu_on_finish_handler()
99 ctx->state = SPMC_STATE_ON_PENDING; in spmd_cpu_on_finish_handler()
101 rc = spmd_spm_core_sync_entry(ctx); in spmd_cpu_on_finish_handler()
105 ctx->state = SPMC_STATE_OFF; in spmd_cpu_on_finish_handler()
109 ctx->state = SPMC_STATE_ON; in spmd_cpu_on_finish_handler()
119 spmd_spm_core_context_t *ctx = spmd_get_context(); in spmd_cpu_off_handler() local
125 assert(ctx != NULL); in spmd_cpu_off_handler()
[all …]
/rk3399_ARM-atf/drivers/amlogic/crypto/
H A Dsha_dma.c112 static void asd_compute_sha(struct asd_ctx *ctx, void *data, size_t len, in asd_compute_sha() argument
118 .dst = (uint32_t)(uintptr_t)ctx->digest, in asd_compute_sha()
123 assert((uintptr_t)ctx->digest == (uintptr_t)desc.dst); in asd_compute_sha()
130 if (ctx->started == 0) { in asd_compute_sha()
132 ctx->started = 1; in asd_compute_sha()
136 ctx->started = 0; in asd_compute_sha()
138 if (ctx->mode == ASM_SHA224) in asd_compute_sha()
150 flush_dcache_range((uintptr_t)ctx->digest, SHA256_HASHSZ); in asd_compute_sha()
153 void asd_sha_update(struct asd_ctx *ctx, void *data, size_t len) in asd_sha_update() argument
157 if (ctx->blocksz) { in asd_sha_update()
[all …]
/rk3399_ARM-atf/services/spd/trusty/
H A Dtrusty.c94 struct trusty_cpu_ctx *ctx = get_trusty_ctx(); in trusty_context_switch() local
97 assert(ctx->saved_security_state != security_state); in trusty_context_switch()
127 ctx->saved_security_state = security_state; in trusty_context_switch()
128 ret_args = trusty_context_switch_helper(&ctx->saved_sp, &args); in trusty_context_switch()
130 assert(ctx->saved_security_state == ((security_state == 0U) ? 1U : 0U)); in trusty_context_switch()
148 struct trusty_cpu_ctx *ctx = get_trusty_ctx(); in trusty_fiq_handler() local
157 if (ctx->fiq_handler_active != 0) { in trusty_fiq_handler()
162 ctx->fiq_handler_active = 1; in trusty_fiq_handler()
163 (void)memcpy(&ctx->fiq_gpregs, get_gpregs_ctx(handle), sizeof(ctx->fiq_gpregs)); in trusty_fiq_handler()
164 ctx->fiq_pc = SMC_GET_EL3(handle, CTX_ELR_EL3); in trusty_fiq_handler()
[all …]
/rk3399_ARM-atf/plat/imx/imx9/common/
H A Dimx9_sys_sleep.c52 static void gpio_save(struct gpio_ctx *ctx) in gpio_save() argument
57 ctx->port_ctrl[i] = mmio_read_32(ctx->base + gpio_ctrl_offset[i]); in gpio_save()
59 mmio_write_32(ctx->base + gpio_ctrl_offset[i], 0x0); in gpio_save()
61 ctx->port_ctrl[i] = mmio_read_32(ctx->base + gpio_ctrl_offset[i]); in gpio_save()
66 for (uint32_t i = 0U; i < ctx->pin_num; i++) { in gpio_save()
67 ctx->gpio_icr[i] = mmio_read_32(ctx->base + 0x80 + i * 4U); in gpio_save()
69 if (ctx->gpio_icr[i]) { in gpio_save()
76 mmio_write_32(ctx->base + gpio_ctrl_offset[i], ctx->port_ctrl[i]); in gpio_save()
79 static void gpio_restore(struct gpio_ctx *ctx) in gpio_restore() argument
83 mmio_write_32(ctx->base + gpio_ctrl_offset[i], 0x0); in gpio_restore()
[all …]
/rk3399_ARM-atf/lib/extensions/spe/
H A Dspe.c52 void spe_enable_ns(cpu_context_t *ctx) in spe_enable_ns() argument
54 el3_state_t *state = get_el3state_ctx(ctx); in spe_enable_ns()
67 static void spe_disable_others(cpu_context_t *ctx) in spe_disable_others() argument
69 el3_state_t *state = get_el3state_ctx(ctx); in spe_disable_others()
78 void spe_disable_secure(cpu_context_t *ctx) in spe_disable_secure() argument
80 spe_disable_others(ctx); in spe_disable_secure()
83 void spe_disable_realm(cpu_context_t *ctx) in spe_disable_realm() argument
85 spe_disable_others(ctx); in spe_disable_realm()
/rk3399_ARM-atf/lib/cpus/aarch64/
H A Dcpuamu.c32 struct cpuamu_ctx *ctx = &cpuamu_ctxs[plat_my_core_pos()]; in cpuamu_context_save() local
38 ctx->mask = cpuamu_read_cpuamcntenset_el0(); in cpuamu_context_save()
41 cpuamu_write_cpuamcntenclr_el0(ctx->mask); in cpuamu_context_save()
46 ctx->cnts[i] = cpuamu_cnt_read(i); in cpuamu_context_save()
51 struct cpuamu_ctx *ctx = &cpuamu_ctxs[plat_my_core_pos()]; in cpuamu_context_restore() local
60 cpuamu_write_cpuamcntenclr_el0(ctx->mask); in cpuamu_context_restore()
65 cpuamu_cnt_write(i, ctx->cnts[i]); in cpuamu_context_restore()
69 cpuamu_write_cpuamcntenset_el0(ctx->mask); in cpuamu_context_restore()
/rk3399_ARM-atf/include/drivers/amlogic/crypto/
H A Dsha_dma.h26 static inline void asd_sha_init(struct asd_ctx *ctx, enum ASD_MODE mode) in asd_sha_init() argument
28 ctx->started = 0; in asd_sha_init()
29 ctx->mode = mode; in asd_sha_init()
30 ctx->blocksz = 0; in asd_sha_init()
33 void asd_sha_update(struct asd_ctx *ctx, void *data, size_t len);
34 void asd_sha_finalize(struct asd_ctx *ctx);
/rk3399_ARM-atf/lib/el3_runtime/aarch32/
H A Dcontext_mgmt.c58 void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) in cm_setup_context() argument
64 assert(ctx != NULL); in cm_setup_context()
69 zeromem(ctx, sizeof(*ctx)); in cm_setup_context()
71 reg_ctx = get_regs_ctx(ctx); in cm_setup_context()
165 cpu_context_t *ctx; in cm_init_my_context() local
166 ctx = cm_get_context(GET_SECURITY_STATE(ep->h.attr)); in cm_init_my_context()
167 cm_setup_context(ctx, ep); in cm_init_my_context()
181 cpu_context_t *ctx = cm_get_context(security_state); in cm_prepare_el3_exit() local
184 assert(ctx != NULL); in cm_prepare_el3_exit()
187 scr = read_ctx_reg(get_regs_ctx(ctx), CTX_SCR); in cm_prepare_el3_exit()
[all …]
/rk3399_ARM-atf/services/std_svc/drtm/
H A Ddrtm_remediation.c17 uint64_t drtm_set_error(uint64_t x1, void *ctx) in drtm_set_error() argument
24 SMC_RET1(ctx, NOT_FOUND); in drtm_set_error()
27 SMC_RET1(ctx, SUCCESS); in drtm_set_error()
30 uint64_t drtm_get_error(void *ctx) in drtm_get_error() argument
38 SMC_RET1(ctx, NOT_FOUND); in drtm_get_error()
41 SMC_RET2(ctx, SUCCESS, error_code); in drtm_get_error()

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