Lines Matching refs:ctx
209 static int saes_start(struct stm32_saes_context *ctx) in saes_start() argument
214 if ((mmio_read_32(ctx->base + _SAES_SR) & _SAES_SR_BUSY) != _SAES_SR_BUSY) { in saes_start()
215 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_start()
217 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_start()
221 while ((mmio_read_32(ctx->base + _SAES_SR) & _SAES_SR_BUSY) == _SAES_SR_BUSY) { in saes_start()
231 static void saes_end(struct stm32_saes_context *ctx, int prev_error) in saes_end() argument
235 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_end()
237 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in saes_end()
241 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in saes_end()
244 static void saes_write_iv(struct stm32_saes_context *ctx) in saes_write_iv() argument
247 if (does_chaining_mode_need_iv(ctx->cr)) { in saes_write_iv()
252 mmio_write_32(ctx->base + _SAES_IVR0 + i * sizeof(uint32_t), ctx->iv[i]); in saes_write_iv()
258 static void saes_write_key(struct stm32_saes_context *ctx) in saes_write_key() argument
261 if ((ctx->cr & _SAES_CR_KEYSEL_MASK) == (_SAES_CR_KEYSEL_SOFT << _SAES_CR_KEYSEL_SHIFT)) { in saes_write_key()
265 mmio_write_32(ctx->base + _SAES_KEYR0 + i * sizeof(uint32_t), ctx->key[i]); in saes_write_key()
268 if ((ctx->cr & _SAES_CR_KEYSIZE) == _SAES_CR_KEYSIZE) { in saes_write_key()
270 mmio_write_32(ctx->base + _SAES_KEYR4 + i * sizeof(uint32_t), in saes_write_key()
271 ctx->key[i + 4U]); in saes_write_key()
277 static int saes_prepare_key(struct stm32_saes_context *ctx) in saes_prepare_key() argument
280 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in saes_prepare_key()
283 if ((ctx->cr & _SAES_CR_KEYSIZE) != 0U) { in saes_prepare_key()
284 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_KEYSIZE); in saes_prepare_key()
286 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_KEYSIZE); in saes_prepare_key()
289 saes_write_key(ctx); in saes_prepare_key()
292 if ((IS_CHAINING_MODE(ECB, ctx->cr) || IS_CHAINING_MODE(CBC, ctx->cr)) && in saes_prepare_key()
293 is_decrypt(ctx->cr)) { in saes_prepare_key()
297 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_MODE_MASK, in saes_prepare_key()
301 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in saes_prepare_key()
304 ret = wait_computation_completed(ctx->base); in saes_prepare_key()
309 clear_computation_completed(ctx->base); in saes_prepare_key()
312 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_MODE_MASK, in saes_prepare_key()
319 static int save_context(struct stm32_saes_context *ctx) in save_context() argument
321 if ((mmio_read_32(ctx->base + _SAES_SR) & _SAES_SR_CCF) != 0U) { in save_context()
327 ctx->cr = mmio_read_32(ctx->base + _SAES_CR); in save_context()
330 if (does_chaining_mode_need_iv(ctx->cr)) { in save_context()
335 ctx->iv[i] = mmio_read_32(ctx->base + _SAES_IVR0 + i * sizeof(uint32_t)); in save_context()
340 mmio_clrbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in save_context()
346 static int restore_context(struct stm32_saes_context *ctx) in restore_context() argument
351 if ((mmio_read_32(ctx->base + _SAES_CR) & _SAES_CR_EN) != 0U) { in restore_context()
357 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_IPRST); in restore_context()
360 mmio_write_32(ctx->base + _SAES_CR, ctx->cr); in restore_context()
363 ret = saes_prepare_key(ctx); in restore_context()
368 saes_write_iv(ctx); in restore_context()
371 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in restore_context()
417 int stm32_saes_init(struct stm32_saes_context *ctx, bool is_dec, in stm32_saes_init() argument
425 ctx->assoc_len = 0U; in stm32_saes_init()
426 ctx->load_len = 0U; in stm32_saes_init()
428 ctx->base = saes_pdata.base; in stm32_saes_init()
429 ctx->cr = _SAES_CR_RESET_VALUE; in stm32_saes_init()
440 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_MODE_MASK, in stm32_saes_init()
444 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_MODE_MASK, in stm32_saes_init()
451 SET_CHAINING_MODE(ECB, (uintptr_t)&(ctx->cr)); in stm32_saes_init()
454 SET_CHAINING_MODE(CBC, (uintptr_t)&(ctx->cr)); in stm32_saes_init()
457 SET_CHAINING_MODE(CTR, (uintptr_t)&(ctx->cr)); in stm32_saes_init()
460 SET_CHAINING_MODE(GCM, (uintptr_t)&(ctx->cr)); in stm32_saes_init()
463 SET_CHAINING_MODE(CCM, (uintptr_t)&(ctx->cr)); in stm32_saes_init()
477 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_DATATYPE_MASK, in stm32_saes_init()
483 mmio_clrbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSIZE); in stm32_saes_init()
486 mmio_setbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSIZE); in stm32_saes_init()
495 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSEL_MASK, in stm32_saes_init()
502 mmio_write_32((uintptr_t)(ctx->key + i), htobe32(key_u32[3 - i])); in stm32_saes_init()
510 mmio_write_32((uintptr_t)(ctx->key + i), htobe32(key_u32[7 - i])); in stm32_saes_init()
522 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSEL_MASK, in stm32_saes_init()
526 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSEL_MASK, in stm32_saes_init()
530 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSEL_MASK, in stm32_saes_init()
534 mmio_clrsetbits_32((uintptr_t)&(ctx->cr), _SAES_CR_KEYSEL_MASK, in stm32_saes_init()
549 mmio_write_32((uintptr_t)(ctx->iv + i), htobe32(iv_u32[3 - i])); in stm32_saes_init()
554 return saes_start(ctx); in stm32_saes_init()
566 int stm32_saes_update_assodata(struct stm32_saes_context *ctx, bool last_block, in stm32_saes_update_assodata() argument
578 ret = restore_context(ctx); in stm32_saes_update_assodata()
583 ret = wait_computation_completed(ctx->base); in stm32_saes_update_assodata()
588 clear_computation_completed(ctx->base); in stm32_saes_update_assodata()
597 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_GCMPH_MASK, in stm32_saes_update_assodata()
601 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in stm32_saes_update_assodata()
608 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 0U]); in stm32_saes_update_assodata()
609 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 1U]); in stm32_saes_update_assodata()
610 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 2U]); in stm32_saes_update_assodata()
611 mmio_write_32(ctx->base + _SAES_DINR, data_u32[w + 3U]); in stm32_saes_update_assodata()
613 ret = wait_computation_completed(ctx->base); in stm32_saes_update_assodata()
618 clear_computation_completed(ctx->base); in stm32_saes_update_assodata()
622 ctx->assoc_len += AES_BLOCK_SIZE_BIT; in stm32_saes_update_assodata()
634 saes_end(ctx, ret); in stm32_saes_update_assodata()
650 int stm32_saes_update_load(struct stm32_saes_context *ctx, bool last_block, in stm32_saes_update_load() argument
665 prev_cr = mmio_read_32(ctx->base + _SAES_CR); in stm32_saes_update_load()
673 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_GCMPH_MASK, in stm32_saes_update_load()
681 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in stm32_saes_update_load()
689 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 0U]); in stm32_saes_update_load()
690 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 1U]); in stm32_saes_update_load()
691 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 2U]); in stm32_saes_update_load()
692 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 3U]); in stm32_saes_update_load()
694 ret = wait_computation_completed(ctx->base); in stm32_saes_update_load()
700 data_out_u32[w + 0U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
701 data_out_u32[w + 1U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
702 data_out_u32[w + 2U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
703 data_out_u32[w + 3U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
705 clear_computation_completed(ctx->base); in stm32_saes_update_load()
709 ctx->load_len += AES_BLOCK_SIZE_BIT; in stm32_saes_update_load()
719 mmio_write_32(ctx->base + _SAES_DINR, block_in[0U]); in stm32_saes_update_load()
720 mmio_write_32(ctx->base + _SAES_DINR, block_in[1U]); in stm32_saes_update_load()
721 mmio_write_32(ctx->base + _SAES_DINR, block_in[2U]); in stm32_saes_update_load()
722 mmio_write_32(ctx->base + _SAES_DINR, block_in[3U]); in stm32_saes_update_load()
724 ret = wait_computation_completed(ctx->base); in stm32_saes_update_load()
731 block_out[0U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
732 block_out[1U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
733 block_out[2U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
734 block_out[3U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update_load()
736 clear_computation_completed(ctx->base); in stm32_saes_update_load()
740 ctx->load_len += (data_size - i) * UINT8_BIT; in stm32_saes_update_load()
745 saes_end(ctx, ret); in stm32_saes_update_load()
759 int stm32_saes_final(struct stm32_saes_context *ctx, uint8_t *tag, in stm32_saes_final() argument
766 prev_cr = mmio_read_32(ctx->base + _SAES_CR); in stm32_saes_final()
768 mmio_clrsetbits_32(ctx->base + _SAES_CR, _SAES_CR_GCMPH_MASK, in stm32_saes_final()
775 mmio_setbits_32(ctx->base + _SAES_CR, _SAES_CR_EN); in stm32_saes_final()
779 mmio_write_32(ctx->base + _SAES_DINR, 0); in stm32_saes_final()
780 mmio_write_32(ctx->base + _SAES_DINR, ctx->assoc_len); in stm32_saes_final()
781 mmio_write_32(ctx->base + _SAES_DINR, 0); in stm32_saes_final()
782 mmio_write_32(ctx->base + _SAES_DINR, ctx->load_len); in stm32_saes_final()
784 ret = wait_computation_completed(ctx->base); in stm32_saes_final()
790 tag_u32[0] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
791 tag_u32[1] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
792 tag_u32[2] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
793 tag_u32[3] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_final()
795 clear_computation_completed(ctx->base); in stm32_saes_final()
800 saes_end(ctx, ret); in stm32_saes_final()
815 int stm32_saes_update(struct stm32_saes_context *ctx, bool last_block, in stm32_saes_update() argument
843 if (last_block && IS_CHAINING_MODE(CBC, ctx->cr) && is_encrypt(ctx->cr) && in stm32_saes_update()
855 ret = restore_context(ctx); in stm32_saes_update()
865 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 0U]); in stm32_saes_update()
866 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 1U]); in stm32_saes_update()
867 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 2U]); in stm32_saes_update()
868 mmio_write_32(ctx->base + _SAES_DINR, data_in_u32[w + 3U]); in stm32_saes_update()
870 ret = wait_computation_completed(ctx->base); in stm32_saes_update()
876 data_out_u32[w + 0U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
877 data_out_u32[w + 1U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
878 data_out_u32[w + 2U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
879 data_out_u32[w + 3U] = mmio_read_32(ctx->base + _SAES_DOUTR); in stm32_saes_update()
881 clear_computation_completed(ctx->base); in stm32_saes_update()
895 ret = save_context(ctx); in stm32_saes_update()
901 saes_end(ctx, ret); in stm32_saes_update()