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Searched refs:NR_PMIC_WRAP_PHASE (Results 1 – 14 of 14) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_pmic_wrap.c36 } set[NR_PMIC_WRAP_PHASE];
50 .phase = NR_PMIC_WRAP_PHASE, /* invalid setting for init */
70 .phase = NR_PMIC_WRAP_PHASE, /* invalid setting for init */
115 if (phase < NR_PMIC_WRAP_PHASE) { in mt_spm_pmic_wrap_set_phase()
139 if (phase >= NR_PMIC_WRAP_PHASE) { in mt_spm_pmic_wrap_set_cmd()
160 if ((phase < NR_PMIC_WRAP_PHASE) && in mt_spm_pmic_wrap_get_cmd()
H A Dmt_spm_pmic_wrap.h15 NR_PMIC_WRAP_PHASE = 1U, enumerator
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_pmic_wrap.c49 } set[NR_PMIC_WRAP_PHASE];
53 .phase = NR_PMIC_WRAP_PHASE, /* invalid setting for init */
104 if (phase >= NR_PMIC_WRAP_PHASE) { in mt_spm_pmic_wrap_set_phase()
131 if (phase >= NR_PMIC_WRAP_PHASE) { in mt_spm_pmic_wrap_set_cmd()
150 if (phase >= NR_PMIC_WRAP_PHASE) { in mt_spm_pmic_wrap_get_cmd()
H A Dmt_spm_pmic_wrap.h15 NR_PMIC_WRAP_PHASE, enumerator
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/
H A Dmt_spm_pmic_wrap.c54 } set[NR_PMIC_WRAP_PHASE];
58 .phase = NR_PMIC_WRAP_PHASE, /* invalid setting for init */
109 if ((phase >= NR_PMIC_WRAP_PHASE) || (pw.phase == phase)) { in mt_spm_pmic_wrap_set_phase()
131 if ((phase >= NR_PMIC_WRAP_PHASE) || (idx >= pw.set[phase].nr_idx)) { in mt_spm_pmic_wrap_set_cmd()
147 if ((phase >= NR_PMIC_WRAP_PHASE) || (idx >= pw.set[phase].nr_idx)) { in mt_spm_pmic_wrap_get_cmd()
H A Dmt_spm_pmic_wrap.h16 NR_PMIC_WRAP_PHASE, enumerator
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_pmic_wrap.c49 } set[NR_PMIC_WRAP_PHASE];
53 .phase = NR_PMIC_WRAP_PHASE, /* invalid setting for init */
104 if (phase >= NR_PMIC_WRAP_PHASE) { in mt_spm_pmic_wrap_set_phase()
131 if (phase >= NR_PMIC_WRAP_PHASE) { in mt_spm_pmic_wrap_set_cmd()
150 if (phase >= NR_PMIC_WRAP_PHASE) { in mt_spm_pmic_wrap_get_cmd()
H A Dmt_spm_pmic_wrap.h15 NR_PMIC_WRAP_PHASE, enumerator
/rk3399_ARM-atf/plat/mediatek/mt8183/drivers/spm/
H A Dspm_pmic_wrap.c52 } set[NR_PMIC_WRAP_PHASE];
56 .phase = NR_PMIC_WRAP_PHASE,
119 if (phase >= NR_PMIC_WRAP_PHASE) in mt_spm_pmic_wrap_set_phase()
144 if (phase >= NR_PMIC_WRAP_PHASE) in mt_spm_pmic_wrap_set_cmd()
162 if (phase >= NR_PMIC_WRAP_PHASE) in mt_spm_pmic_wrap_get_cmd()
H A Dspm_pmic_wrap.h16 NR_PMIC_WRAP_PHASE enumerator
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_plat_spm_setting.c74 static struct pmic_wrap_phase_setting phase_table[NR_PMIC_WRAP_PHASE] = {
83 .phase_nr_idx = NR_PMIC_WRAP_PHASE,
H A Dmt_plat_spm_setting.h17 NR_PMIC_WRAP_PHASE, enumerator
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_plat_spm_setting.h18 NR_PMIC_WRAP_PHASE, enumerator
H A Dmt_plat_spm_setting.c216 static struct pmic_wrap_phase_setting phase_table[NR_PMIC_WRAP_PHASE] = {
225 .phase_nr_idx = NR_PMIC_WRAP_PHASE,