1*3c25ba44Skenny liang /* 2*3c25ba44Skenny liang * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. 3*3c25ba44Skenny liang * 4*3c25ba44Skenny liang * SPDX-License-Identifier: BSD-3-Clause 5*3c25ba44Skenny liang */ 6*3c25ba44Skenny liang 7*3c25ba44Skenny liang /**************************************************************** 8*3c25ba44Skenny liang * Auto generated by DE, please DO NOT modify this file directly. 9*3c25ba44Skenny liang *****************************************************************/ 10*3c25ba44Skenny liang 11*3c25ba44Skenny liang #ifndef SPM_PMIC_WRAP__H 12*3c25ba44Skenny liang #define SPM_PMIC_WRAP__H 13*3c25ba44Skenny liang 14*3c25ba44Skenny liang enum pmic_wrap_phase_id { 15*3c25ba44Skenny liang PMIC_WRAP_PHASE_ALLINONE, 16*3c25ba44Skenny liang NR_PMIC_WRAP_PHASE 17*3c25ba44Skenny liang }; 18*3c25ba44Skenny liang 19*3c25ba44Skenny liang /* IDX mapping */ 20*3c25ba44Skenny liang enum { 21*3c25ba44Skenny liang CMD_0, /* 0x0 *//* PMIC_WRAP_PHASE_ALLINONE */ 22*3c25ba44Skenny liang CMD_1, /* 0x1 */ 23*3c25ba44Skenny liang CMD_2, /* 0x2 */ 24*3c25ba44Skenny liang CMD_3, /* 0x3 */ 25*3c25ba44Skenny liang CMD_4, /* 0x4 */ 26*3c25ba44Skenny liang CMD_5, /* 0x5 */ 27*3c25ba44Skenny liang CMD_6, /* 0x6 */ 28*3c25ba44Skenny liang CMD_7, /* 0x7 */ 29*3c25ba44Skenny liang CMD_8, /* 0x8 */ 30*3c25ba44Skenny liang CMD_9, /* 0x9 */ 31*3c25ba44Skenny liang CMD_10, /* 0xA */ 32*3c25ba44Skenny liang CMD_11, /* 0xB */ 33*3c25ba44Skenny liang CMD_12, /* 0xC */ 34*3c25ba44Skenny liang CMD_13, /* 0xD */ 35*3c25ba44Skenny liang CMD_14, /* 0xE */ 36*3c25ba44Skenny liang CMD_15, /* 0xF */ 37*3c25ba44Skenny liang CMD_20, /* 0x14 */ 38*3c25ba44Skenny liang CMD_21, /* 0x15 */ 39*3c25ba44Skenny liang CMD_22, /* 0x16 */ 40*3c25ba44Skenny liang CMD_23, /* 0x17 */ 41*3c25ba44Skenny liang NR_IDX_ALL 42*3c25ba44Skenny liang }; 43*3c25ba44Skenny liang 44*3c25ba44Skenny liang /* APIs */ 45*3c25ba44Skenny liang void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase); 46*3c25ba44Skenny liang void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, 47*3c25ba44Skenny liang uint32_t idx, uint32_t cmd_wdata); 48*3c25ba44Skenny liang uint64_t mt_spm_pmic_wrap_get_cmd(enum pmic_wrap_phase_id phase, uint32_t idx); 49*3c25ba44Skenny liang #endif /* SPM_PMIC_WRAP__H */ 50*3c25ba44Skenny liang 51