xref: /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/mt_spm_pmic_wrap.h (revision 79c262327aa8ccc1ae5a0ee7f7ead3bf5ce8e022)
1*45d50759SJames Liao /*
2*45d50759SJames Liao  * Copyright (c) 2023, MediaTek Inc. All rights reserved.
3*45d50759SJames Liao  *
4*45d50759SJames Liao  * SPDX-License-Identifier: BSD-3-Clause
5*45d50759SJames Liao  */
6*45d50759SJames Liao 
7*45d50759SJames Liao /****************************************************************
8*45d50759SJames Liao  * Auto generated by DE, please DO NOT modify this file directly.
9*45d50759SJames Liao  *****************************************************************/
10*45d50759SJames Liao 
11*45d50759SJames Liao #ifndef MT_SPM_PMIC_WRAP_H
12*45d50759SJames Liao #define MT_SPM_PMIC_WRAP_H
13*45d50759SJames Liao 
14*45d50759SJames Liao enum pmic_wrap_phase_id {
15*45d50759SJames Liao 	PMIC_WRAP_PHASE_ALLINONE = 0,
16*45d50759SJames Liao 	NR_PMIC_WRAP_PHASE,
17*45d50759SJames Liao };
18*45d50759SJames Liao 
19*45d50759SJames Liao /* IDX mapping */
20*45d50759SJames Liao enum {
21*45d50759SJames Liao 	CMD_0 = 0,	/* PMIC_WRAP_PHASE_ALLINONE */
22*45d50759SJames Liao 	CMD_1,
23*45d50759SJames Liao 	CMD_2,
24*45d50759SJames Liao 	CMD_3,
25*45d50759SJames Liao 	CMD_4,
26*45d50759SJames Liao 	CMD_5,
27*45d50759SJames Liao 	CMD_6,
28*45d50759SJames Liao 	CMD_7,
29*45d50759SJames Liao 	CMD_8,
30*45d50759SJames Liao 	CMD_9,
31*45d50759SJames Liao 	CMD_10,
32*45d50759SJames Liao 	CMD_11,
33*45d50759SJames Liao 	CMD_12,
34*45d50759SJames Liao 	CMD_13,
35*45d50759SJames Liao 	CMD_14,
36*45d50759SJames Liao 	CMD_15,
37*45d50759SJames Liao 	NR_IDX_ALL,
38*45d50759SJames Liao };
39*45d50759SJames Liao 
40*45d50759SJames Liao /* APIs */
41*45d50759SJames Liao void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase);
42*45d50759SJames Liao void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, unsigned int idx,
43*45d50759SJames Liao 			      unsigned int cmd_wdata);
44*45d50759SJames Liao uint64_t mt_spm_pmic_wrap_get_cmd(enum pmic_wrap_phase_id phase, unsigned int idx);
45*45d50759SJames Liao void mt_spm_dump_pmic_warp_reg(void);
46*45d50759SJames Liao 
47*45d50759SJames Liao #endif /* MT_SPM_PMIC_WRAP_H */
48