| /OK3568_Linux_fs/kernel/drivers/clk/h8300/ |
| H A D | clk-h8s2678.c | 20 struct pll_clock { struct
26 #define to_pll_clock(_hw) container_of(_hw, struct pll_clock, hw) argument
31 struct pll_clock *pll_clock = to_pll_clock(hw); in pll_recalc_rate() local
32 int mul = 1 << (readb(pll_clock->pllcr) & 3); in pll_recalc_rate()
65 struct pll_clock *pll_clock = to_pll_clock(hw); in pll_set_rate() local
69 val = readb(pll_clock->sckcr); in pll_set_rate()
71 writeb(val, pll_clock->sckcr); in pll_set_rate()
72 val = readb(pll_clock->pllcr); in pll_set_rate()
75 writeb(val, pll_clock->pllcr); in pll_set_rate()
91 struct pll_clock *pll_clock; in h8s2678_pll_clk_setup() local
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| /OK3568_Linux_fs/kernel/drivers/ata/ |
| H A D | pata_pdc2027x.c | 512 static void pdc_adjust_pll(struct ata_host *host, long pll_clock, unsigned int board_idx) in pdc_adjust_pll() argument
516 long pll_clock_khz = pll_clock / 1000; in pdc_adjust_pll()
604 long pll_clock, usec_elapsed; in pdc_detect_pll_input_clock() local
632 pll_clock = ((start_count - end_count) & 0x3fffffff) / 100 * in pdc_detect_pll_input_clock()
636 PDPRINTK("PLL input clock[%ld]Hz\n", pll_clock); in pdc_detect_pll_input_clock()
638 return pll_clock; in pdc_detect_pll_input_clock()
648 long pll_clock; in pdc_hardware_init() local
656 pll_clock = pdc_detect_pll_input_clock(host); in pdc_hardware_init()
658 dev_info(host->dev, "PLL input clock %ld kHz\n", pll_clock/1000); in pdc_hardware_init()
661 pdc_adjust_pll(host, pll_clock, board_idx); in pdc_hardware_init()
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ |
| H A D | axs10x-i2s-pll-clock.txt | 14 pll_clock: pll_clock {
23 clocks = <&pll_clock>;
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| /OK3568_Linux_fs/kernel/drivers/clk/axs10x/ |
| H A D | Makefile | 3 obj-y += pll_clock.o
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/linux/ |
| H A D | rtc.h | 63 long pll_clock; /* base PLL frequency */ member
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/include/linux/ |
| H A D | rtc.h | 63 long pll_clock; /* base PLL frequency */ member
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| /OK3568_Linux_fs/kernel/include/uapi/linux/ |
| H A D | rtc.h | 66 long pll_clock; /* base PLL frequency */ member
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| /OK3568_Linux_fs/kernel/arch/m68k/q40/ |
| H A D | config.c | 274 pll->pll_clock = 125829120; in q40_get_rtc_pll()
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/vc4/ |
| H A D | vc4_dsi.c | 847 unsigned long pll_clock = pixel_clock_hz * dsi->divider; in vc4_dsi_encoder_mode_fixup() local
854 if (parent_rate / (divider + 1) < pll_clock) in vc4_dsi_encoder_mode_fixup()
861 pll_clock = parent_rate / divider; in vc4_dsi_encoder_mode_fixup()
862 pixel_clock_hz = pll_clock / dsi->divider; in vc4_dsi_encoder_mode_fixup()
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/ |
| H A D | atombios_crtc.c | 824 u32 pll_clock = mode->clock; in amdgpu_atombios_crtc_set_pll() local
854 amdgpu_pll_compute(pll, amdgpu_crtc->adjusted_clock, &pll_clock, in amdgpu_atombios_crtc_set_pll()
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/ |
| H A D | atombios_crtc.c | 1069 u32 pll_clock = mode->clock; in atombios_crtc_set_pll() local
1102 radeon_compute_pll_legacy(pll, radeon_crtc->adjusted_clock, &pll_clock, in atombios_crtc_set_pll()
1105 radeon_compute_pll_avivo(pll, radeon_crtc->adjusted_clock, &pll_clock, in atombios_crtc_set_pll()
1108 radeon_compute_pll_legacy(pll, radeon_crtc->adjusted_clock, &pll_clock, in atombios_crtc_set_pll()
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| /OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/display/ |
| H A D | intel_display.h | 585 int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
|