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Searched refs:gpio_i2c_write (Results 1 – 15 of 15) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/media/i2c/nvp6158_drv/
H A Dnvp6158_video_eq.c97 gpio_i2c_write(nvp6158_iic_addr[ps_eq_info->devnum], 0xFF, 0x00); in nvp6158_IsChAlive()
250 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch ); in __nvp6158_eq_base_set_value()
251 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x01, pbase->eq_bypass[dist] ); in __nvp6158_eq_base_set_value()
252 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x58, pbase->eq_band_sel[dist] ); in __nvp6158_eq_base_set_value()
253 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x5C, pbase->eq_gain_sel[dist] ); in __nvp6158_eq_base_set_value()
255 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xff, (ch < 2 ? 0x0a : 0x0b) ); in __nvp6158_eq_base_set_value()
256 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x3d + (ch%2 * 0x80), pbase->deq_a_on[dist] ); in __nvp6158_eq_base_set_value()
257 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x3c + (ch%2 * 0x80), pbase->deq_a_sel[dist] ); in __nvp6158_eq_base_set_value()
259 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x09 ); in __nvp6158_eq_base_set_value()
260 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x80 + (ch * 0x20), pbase->deq_b_sel[dist] ); in __nvp6158_eq_base_set_value()
[all …]
H A Dnvp6158_audio.c53 gpio_i2c_write(nvp6158_iic_addr[i], 0xFF, 0x01); in nvp6158_audio_init()
54 gpio_i2c_write(nvp6158_iic_addr[i], 0x94, 0x00); in nvp6158_audio_init()
55 gpio_i2c_write(nvp6158_iic_addr[i], 0x00, 0x02); in nvp6158_audio_init()
56 gpio_i2c_write(nvp6158_iic_addr[i], 0x08, 0x03); //I2s outputs 16ch audio in nvp6158_audio_init()
59 gpio_i2c_write(nvp6158_iic_addr[i], 0x06, 0x3A); //first stage in nvp6158_audio_init()
61 gpio_i2c_write(nvp6158_iic_addr[i], 0x06, 0x38); //middle stage in nvp6158_audio_init()
63 gpio_i2c_write(nvp6158_iic_addr[i], 0x06, 0x38); //middle stage in nvp6158_audio_init()
65 gpio_i2c_write(nvp6158_iic_addr[i], 0x06, 0x39); //last stage in nvp6158_audio_init()
68 gpio_i2c_write(nvp6158_iic_addr[i], 0x08, 0x02); //I2s outputs 8ch audio in nvp6158_audio_init()
69 gpio_i2c_write(nvp6158_iic_addr[i], 0x06, 0x3A); //first stage in nvp6158_audio_init()
[all …]
H A Dnvp6158_video.c54 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0xFF, bank ); in nvp6158_dump_reg()
82 gpio_i2c_write(nvp6158_iic_addr[ch / 4], 0xFF, 0x01); in nvp6158_video_get_adcclk()
91 gpio_i2c_write(nvp6158_iic_addr[ch / 4], 0xFF, 0x01); in nvp6158_video_set_adcclk()
92 gpio_i2c_write(nvp6158_iic_addr[ch / 4], 0x84 + ch % 4, value); in nvp6158_video_set_adcclk()
101 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0xFF, 0x00); in NVP6158_set_afe()
107 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x00+ch%4, afe_value); in NVP6158_set_afe()
117 gpio_i2c_write(nvp6158_iic_addr[chip], 0xFF, 0x01); in nvp6158_datareverse()
120 gpio_i2c_write(nvp6158_iic_addr[chip], 0xCB, tmp); in nvp6158_datareverse()
127 gpio_i2c_write(nvp6158_iic_addr[chip], 0xFF, 0x01); in nvp6158_pll_bypass()
134 gpio_i2c_write(nvp6158_iic_addr[chip], 0x81, val_1x81); in nvp6158_pll_bypass()
[all …]
H A Dnvp6158_coax_protocol.c169 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x01); // BANK 1 in nvp6158_coax_tx_init()
170 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xA8+ch, 0x08+ch); // MPP_TST_SEL1 in nvp6158_coax_tx_init()
173 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch % 4); // BANK 5 in nvp6158_coax_tx_init()
174 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x2F, 0x00); // MPP_H_INV, MPP_V_INV, MPP_F_INV in nvp6158_coax_tx_init()
175 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30, 0xE0); // MPP_H_S[7~4], MPP_H_E[3:0] in nvp6158_coax_tx_init()
176 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x31, 0x43); // MPP_H_S[7:0] in nvp6158_coax_tx_init()
177 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x32, 0xA2); // MPP_H_E[7:0] in nvp6158_coax_tx_init()
178 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7C, CoaxVal->rx_src); in nvp6158_coax_tx_init()
179 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7D, CoaxVal->rx_slice_lev); in nvp6158_coax_tx_init()
181 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03 + ((ch % 4) / 2)); in nvp6158_coax_tx_init()
[all …]
H A Dnvp6158_motion.c44 gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0xFF, 0x00); in nvp6158_motion_detection_get()
57 gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0xFF, 0x02); in nvp6158_motion_onoff_set()
61 gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x00 + (0x07 * motion_set->ch), 0x0C); in nvp6158_motion_onoff_set()
62 gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x02 + (0x07 * motion_set->ch), 0x23); in nvp6158_motion_onoff_set()
63 gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x28 + (0x06 * motion_set->ch), 0x11); in nvp6158_motion_onoff_set()
66 gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0x78); in nvp6158_motion_onoff_set()
67 gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x40); in nvp6158_motion_onoff_set()
68 gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2C + (0x06 * motion_set->ch), 0x72); in nvp6158_motion_onoff_set()
70 gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0xA2); in nvp6158_motion_onoff_set()
71 gpio_i2c_write(nvp6158_iic_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x51); in nvp6158_motion_onoff_set()
[all …]
H A Dnvp6158_video_auto_detect.c162 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x01); in _nvp6158_video_input_auto_detect_vafe_set()
165 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x7A, val_1x7A); in _nvp6158_video_input_auto_detect_vafe_set()
167 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x00); in _nvp6158_video_input_auto_detect_vafe_set()
169 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x00 + vin_auto_det->ch, in _nvp6158_video_input_auto_detect_vafe_set()
172 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x01); in _nvp6158_video_input_auto_detect_vafe_set()
173 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x84 + vin_auto_det->ch, 0x00); in _nvp6158_video_input_auto_detect_vafe_set()
178 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0xFF, 0x05 + vin_auto_det->ch); in _nvp6158_video_input_auto_detect_vafe_set()
185 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x00, val_5678x00); in _nvp6158_video_input_auto_detect_vafe_set()
189 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x01, val_5678x01 ); in _nvp6158_video_input_auto_detect_vafe_set()
193 gpio_i2c_write(nvp6158_iic_addr[vin_auto_det->devnum], 0x58, val_5678x58); in _nvp6158_video_input_auto_detect_vafe_set()
[all …]
H A Dnvp6158_drv.c113 gpio_i2c_write(dec, 0xFF, 0x00); in nvp6158_check_rev()
128 gpio_i2c_write(dec, 0xFF, 0x00); in nvp6158_check_id()
201 gpio_i2c_write(nvp6158_iic_addr[chip], 0xff, 0x01 ); in nvp6158_video_decoder_init()
202 gpio_i2c_write(nvp6158_iic_addr[chip], 0x97, 0x00); // CH_RST ON in nvp6158_video_decoder_init()
203 gpio_i2c_write(nvp6158_iic_addr[chip], 0x97, 0x0f); // CH_RST OFF in nvp6158_video_decoder_init()
204 gpio_i2c_write(nvp6158_iic_addr[chip], 0x7a, 0x0f); // Clock Auto ON in nvp6158_video_decoder_init()
205 gpio_i2c_write(nvp6158_iic_addr[chip], 0xca, 0xff); // VCLK_EN, VDO_EN in nvp6158_video_decoder_init()
208 gpio_i2c_write(nvp6158_iic_addr[chip], 0xff, 0x05 + ch); in nvp6158_video_decoder_init()
209 gpio_i2c_write(nvp6158_iic_addr[chip], 0x00, 0xd0); in nvp6158_video_decoder_init()
211 gpio_i2c_write(nvp6158_iic_addr[chip], 0x05, 0x04); in nvp6158_video_decoder_init()
[all …]
H A Dnvp6158_dev.c259 gpio_i2c_write(0x60, 0xFF, 0x01); in nvp6158_module_init()
260 gpio_i2c_write(0x60, 0xCA, 0x66); in nvp6158_module_init()
H A Dnvp6158_common.h23 #define gpio_i2c_write nvp6158_I2CWriteByte8 macro
/OK3568_Linux_fs/kernel/drivers/media/i2c/jaguar1_drv/
H A Djaguar1_mipi.c36 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0xFF, 0x20); in arb_scale_set()
42 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x01, arb_scale); in arb_scale_set()
53 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xff, 0x20); in arb_enable()
54 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x00, en_param); in arb_enable()
60 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xff, 0x20); in arb_disable()
61 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x00, 0x00); in arb_disable()
68 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xff, 0x20); in arb_init()
71 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x40, 0x01); in arb_init()
73 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x0F, arb_dtype); in arb_init()
76 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x0D, 0x00); in arb_init()
[all …]
H A Djaguar1_coax_protocol.c187 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->devnum], 0xFF, 0x13); // BANK 13 in coax_tx_init()
200 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x01); // BANK 1 in coax_tx_init()
201 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xA8, 0x00); // MPP_TST_SEL1 in coax_tx_init()
202 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xA9, 0x00); // MPP_TST_SEL2 in coax_tx_init()
203 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xAA, 0x00); // MPP_TST_SEL3 in coax_tx_init()
204 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xAB, 0x00); // MPP_TST_SEL4 in coax_tx_init()
207 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x02+((ch%4)/2)); // BANK 2, 3 in coax_tx_init()
208 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x7C+((ch%2)*0x80), CoaxVal->rx_src); in coax_tx_init()
209 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0x7D+((ch%2)*0x80), CoaxVal->rx_slice_lev); in coax_tx_init()
211 gpio_i2c_write(jaguar1_i2c_addr[coax_tx->vd_dev], 0xFF, 0x02+((ch%4)/2)); in coax_tx_init()
[all …]
H A Djaguar1_video.c114 gpio_i2c_write(jaguar1_i2c_addr[dev], addr, WriteVal); in vd_register_set()
177 gpio_i2c_write(jaguar1_i2c_addr[dev], 0xFF, 0x13); in vd_vi_manual_set_seq1()
186 gpio_i2c_write(jaguar1_i2c_addr[dev], 0x30, val_13x30); in vd_vi_manual_set_seq1()
187 gpio_i2c_write(jaguar1_i2c_addr[dev], 0x31, val_13x31); in vd_vi_manual_set_seq1()
188 gpio_i2c_write(jaguar1_i2c_addr[dev], 0x32, val_13x32); in vd_vi_manual_set_seq1()
509 gpio_i2c_write(jaguar1_i2c_addr[dev], 0xff, 0x05 + ch); in vd_vi_color_set_seq8()
510 gpio_i2c_write(jaguar1_i2c_addr[dev], 0xb5, 0x80); // HPLL Locking Ref. Range in vd_vi_color_set_seq8()
572 gpio_i2c_write(jaguar1_i2c_addr[dev], 0xFF, 0x01); in vd_vo_seq_set()
573 gpio_i2c_write(jaguar1_i2c_addr[dev], 0xc0 + (ch * 0x02), param->port_seq_ch01[ch]); in vd_vo_seq_set()
574 gpio_i2c_write(jaguar1_i2c_addr[dev], 0xc1 + (ch * 0x02), param->port_seq_ch23[ch]); in vd_vo_seq_set()
[all …]
H A Djaguar1_motion.c42 gpio_i2c_write(jaguar1_i2c_addr[motion_set->devnum], 0xFF, 0x00); in motion_detection_get()
55 gpio_i2c_write(jaguar1_i2c_addr[motion_set->devnum], 0xFF, 0x04); in motion_onoff_set()
59 gpio_i2c_write(jaguar1_i2c_addr[motion_set->devnum], 0x00 + (0x07 * motion_set->ch), 0x0C); in motion_onoff_set()
60 gpio_i2c_write(jaguar1_i2c_addr[motion_set->devnum], 0x02 + (0x07 * motion_set->ch), 0x23); in motion_onoff_set()
61 gpio_i2c_write(jaguar1_i2c_addr[motion_set->devnum], 0x28 + (0x06 * motion_set->ch), 0x11); in motion_onoff_set()
65 gpio_i2c_write(jaguar1_i2c_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0x78); in motion_onoff_set()
66 gpio_i2c_write(jaguar1_i2c_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x40); in motion_onoff_set()
67 gpio_i2c_write(jaguar1_i2c_addr[motion_set->devnum], 0x2C + (0x06 * motion_set->ch), 0x72); in motion_onoff_set()
71 gpio_i2c_write(jaguar1_i2c_addr[motion_set->devnum], 0x29 + (0x06 * motion_set->ch), 0xA2); in motion_onoff_set()
72 gpio_i2c_write(jaguar1_i2c_addr[motion_set->devnum], 0x2A + (0x06 * motion_set->ch), 0x51); in motion_onoff_set()
[all …]
H A Djaguar1_drv.c111 gpio_i2c_write(0x60, 0xFF, 0x00); in vd_pattern_enable()
112 gpio_i2c_write(0x60, 0x1C, 0x1A); in vd_pattern_enable()
113 gpio_i2c_write(0x60, 0x1D, 0x1A); in vd_pattern_enable()
114 gpio_i2c_write(0x60, 0x1E, 0x1A); in vd_pattern_enable()
115 gpio_i2c_write(0x60, 0x1F, 0x1A); in vd_pattern_enable()
117 gpio_i2c_write(0x60, 0xFF, 0x05); in vd_pattern_enable()
118 gpio_i2c_write(0x60, 0x6A, 0x80); in vd_pattern_enable()
119 gpio_i2c_write(0x60, 0xFF, 0x06); in vd_pattern_enable()
120 gpio_i2c_write(0x60, 0x6A, 0x80); in vd_pattern_enable()
121 gpio_i2c_write(0x60, 0xFF, 0x07); in vd_pattern_enable()
[all …]
H A Djaguar1_common.h22 #define gpio_i2c_write jaguar1_I2CWriteByte8 macro
40 #define JAGUAR1_BANK_CHANGE(bank) gpio_i2c_write(jaguar1_i2c_addr[0], 0xFF, bank );