1 // SPDX-License-Identifier: GPL-2.0
2 /********************************************************************************
3 *
4 * Copyright (C) 2016 NEXTCHIP Inc. All rights reserved.
5 * Module : Jaguar1 Device Driver
6 * Description : MIPI
7 * Author :
8 * Date :
9 * Version : Version 1.0
10 *
11 ********************************************************************************
12 * History :
13 *
14 *
15 ********************************************************************************/
16 #include <linux/string.h>
17 #include <linux/delay.h>
18 #include "jaguar1_common.h"
19 #include "jaguar1_mipi.h"
20 #include "jaguar1_mipi_table.h"
21
22 static unsigned char mipi_dtype, arb_dtype, en_param;
23
24
25 /*-------------------------------------------------------------------
26
27 Arbiter function
28
29 -------------------------------------------------------------------*/
30
arb_scale_set(video_input_init * dev_ch_info,unsigned char val)31 static void arb_scale_set(video_input_init *dev_ch_info, unsigned char val)
32 {
33 int devnum = dev_ch_info->ch / 4;
34 unsigned char arb_scale = 0;
35
36 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0xFF, 0x20);
37
38 arb_scale = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x01);
39 arb_scale &= ~(0x3<<(dev_ch_info->ch*2));
40 arb_scale |= val<<(dev_ch_info->ch*2);
41
42 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x01, arb_scale);
43 }
44
arb_enable(int dev_num)45 void arb_enable(int dev_num)
46 {
47 if((dev_num < 0) || (dev_num > 3))
48 {
49 printk("[DRV] %s input channel Error (%d)\n",__func__, dev_num);
50 return;
51 }
52
53 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xff, 0x20);
54 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x00, en_param);
55 printk("VDEC_ARBITER_INIT done 0x%X\n", en_param);
56 }
57
arb_disable(int dev_num)58 void arb_disable(int dev_num)
59 {
60 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xff, 0x20);
61 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x00, 0x00);
62 }
63
arb_init(int dev_num)64 void arb_init(int dev_num)
65 {
66 arb_disable(dev_num);
67
68 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xff, 0x20);
69
70 // ARB RESET High
71 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x40, 0x01);
72 // MIPI Video type Init
73 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x0F, arb_dtype);
74 // ARB 32Bit Mode
75 if(2 == jaguar1_lane)
76 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x0D, 0x00);
77 else
78 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x0D, 0x01);
79
80 // ARB RESET Low
81 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x40, 0x00);
82
83 arb_enable(dev_num);
84 }
85
86
87 /*-------------------------------------------------------------------
88
89 MIPI function
90
91 -------------------------------------------------------------------*/
92
mipi_frame_opt_set(video_input_init * dev_ch_info,unsigned char val)93 static void mipi_frame_opt_set(video_input_init *dev_ch_info, unsigned char val)
94 {
95 int devnum = dev_ch_info->ch / 4;
96 unsigned char mipi_frame_opt;
97
98 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0xFF, 0x21);
99
100 switch(dev_ch_info->ch)
101 {
102 case 0 :
103 mipi_frame_opt = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x3E);
104 mipi_frame_opt = (mipi_frame_opt & 0xF0) | val;
105 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x3E, mipi_frame_opt);
106 break;
107 case 1 :
108 mipi_frame_opt = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x3E);
109 mipi_frame_opt = (mipi_frame_opt & 0x0F) | val;
110 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x3E, mipi_frame_opt);
111 break;
112 case 2 :
113 mipi_frame_opt = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x3F);
114 mipi_frame_opt = (mipi_frame_opt & 0xF0) | val;
115 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x3F, mipi_frame_opt);
116 break;
117 case 3 :
118 mipi_frame_opt = gpio_i2c_read(jaguar1_i2c_addr[devnum], 0x3F);
119 mipi_frame_opt = (mipi_frame_opt & 0x0F) | val;
120 gpio_i2c_write(jaguar1_i2c_addr[devnum], 0x3F, mipi_frame_opt);
121 break;
122 }
123 }
124
mipi_video_format_set(video_input_init * dev_ch_info)125 void mipi_video_format_set(video_input_init *dev_ch_info)
126 {
127 mipi_vdfmt_set_s mipi_vd_fmt = (mipi_vdfmt_set_s)decoder_mipi_fmtdef[dev_ch_info->format];
128
129 if(dev_ch_info->interface != DISABLE)
130 {
131 en_param |= 0x11<<(dev_ch_info->ch);
132 }
133
134 mipi_frame_opt_set(dev_ch_info, mipi_vd_fmt.mipi_frame_opt);
135 arb_scale_set(dev_ch_info, mipi_vd_fmt.arb_scale);
136 }
137
mipi_datatype_set(unsigned char data_type)138 int mipi_datatype_set(unsigned char data_type)
139 {
140 int ret = 0;
141
142 switch(data_type)
143 {
144 case VD_DATA_TYPE_YUV422 :
145 mipi_dtype = 0x1E;
146 arb_dtype = 0x00;
147 break;
148 case VD_DATA_TYPE_YUV420 :
149 mipi_dtype = 0x18;
150 arb_dtype = 0xAA;
151 break;
152 case VD_DATA_TYPE_LEGACY420 :
153 mipi_dtype = 0x1A;
154 arb_dtype = 0x55;
155 break;
156 default :
157 printk("[DRV]%s : invalid data type [0x%X]\n", __func__, data_type);
158 ret = -1;
159 break;
160 }
161
162 return ret;
163 }
164
mipi_tx_init(int dev_num)165 void mipi_tx_init(int dev_num)
166 {
167 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xFF, 0x21);
168
169 pr_info("%s: mclk: %d\n", __func__, jaguar1_mclk);
170 switch(jaguar1_mclk)
171 {
172 case 3:
173 printk("[DRV] SET_MIPI_1242MHZ\n");
174 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x40, 0xB4);
175 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x41, 0x00);
176 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x42, 0x03);
177 break;
178 // case 3:
179 // printk("[DRV]_MIPI_252MHZ_TEST_\n");
180 // gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x40, 0xDC);
181 // gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x41, 0x20);
182 // gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x42, 0x05);
183 // break;
184 case 2:
185 printk("[DRV] SET_MIPI_378MHZ\n");
186 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x40, 0xDC);
187 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x41, 0x20);
188 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x42, 0x03);
189 break;
190 case 1:
191 printk("[DRV] SET_MIPI_594MHZ\n");
192 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x40, 0xCC);
193 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x41, 0x10);
194 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x42, 0x03);
195 break;
196 default:
197 printk("[DRV] SET_MIPI_756MHZ\n");
198 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x40, 0xDC);
199 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x41, 0x10);
200 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x42, 0x03);
201 break;
202 }
203
204 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x43, 0x43);
205
206 switch(jaguar1_mclk)
207 {
208 case 3: // 1242MHz MIPI_CLK for FHD*4ch
209 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x11, 0x08);
210 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x10, 0x13);
211 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x12, 0x0B);
212 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x13, 0x12);
213 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x17, 0x02);
214 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x18, 0x12);
215 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x15, 0x07);
216 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x14, 0x2D);
217 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x16, 0x0B);
218 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x19, 0x09);
219 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x1A, 0x15);
220 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x1B, 0x11);
221 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x1C, 0x0E);
222 break;
223 case 2: // 378MHz MIPI_CLK for low-clock test
224 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x11, 0x03);
225 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x10, 0x07);
226 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x12, 0x04);
227 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x13, 0x06);
228 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x17, 0x01);
229 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x18, 0x0B);
230 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x15, 0x02);
231 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x14, 0x0E);
232 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x16, 0x04);
233 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x19, 0x03);
234 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x1A, 0x07);
235 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x1B, 0x06);
236 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x1C, 0x05);
237 break;
238 case 1: // 594MHz MIPI_CLK for HD*4ch
239 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x11, 0x04);
240 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x10, 0x0A);
241 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x12, 0x06);
242 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x13, 0x09);
243 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x17, 0x01);
244 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x18, 0x0D);
245 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x15, 0x04);
246 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x14, 0x16);
247 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x16, 0x05);
248 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x19, 0x05);
249 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x1A, 0x0A);
250 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x1B, 0x08);
251 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x1C, 0x07);
252 break;
253 default: // 756MHz MIPI_CLK
254 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x11, 0x05);
255 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x10, 0x0C);
256 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x12, 0x07);
257 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x13, 0x0B);
258 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x17, 0x01);
259 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x18, 0x0E);
260 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x15, 0x04);
261 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x14, 0x1C);
262 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x16, 0x07);
263 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x19, 0x06);
264 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x1A, 0x0D);
265 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x1B, 0x0B);
266 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x1C, 0x09);
267 break;
268 }
269
270 // MIPI setting
271 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x44, 0x00);
272 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x49, 0xF3);
273 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x49, 0xF0);
274 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x44, 0x02);
275
276 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x08, 0x40);
277
278 // MIPI_TX_FRAME_CNT_EN
279 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x0F, 0x01);
280
281 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x38, mipi_dtype);
282 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x39, mipi_dtype);
283 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x3A, mipi_dtype);
284 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x3B, mipi_dtype);
285
286 // MIPI Enable
287 if(2 == jaguar1_lane)
288 {
289 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x07, 0x07); //two lanes test
290 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x2D, 0x00);
291 printk("NOTE >>> 2 lanes mode enabled\n");
292 }
293 else
294 {
295 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x07, 0x0F);
296 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x2D, 0x01);
297 }
298
299 printk("[DRV]VDEC_MIPI_TX_INIT done\n");
300 }
301
disable_parallel(int dev_num)302 void disable_parallel(int dev_num)
303 {
304 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xFF, 0x01);
305
306 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xC8, 0x00);
307 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xC9, 0x00);
308 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xCA, 0x00);
309 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xCB, 0x00);
310 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xCC, 0x00);
311 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xCD, 0x00);
312 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xCE, 0x00);
313 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xCF, 0x00);
314
315 printk("[DRV]Parallel block Disable\n");
316 }
317
318