1 // SPDX-License-Identifier: GPL-2.0
2 /********************************************************************************
3 *
4 * Copyright (C) 2017 NEXTCHIP Inc. All rights reserved.
5 * Module : Raptor3 Device Driver
6 * Description : coax_protocol.c
7 * Author :
8 * Date :
9 * Version : Version 1.0
10 *
11 ********************************************************************************
12 * History :
13 *
14 *
15 ********************************************************************************/
16 #include <linux/string.h>
17 #include <linux/delay.h>
18 #include <linux/unistd.h>
19 #include "nvp6158_common.h"
20 #include "nvp6158_coax_table.h"
21 #include "nvp6158_coax_protocol.h"
22 #include "nvp6158_video.h"
23 extern unsigned int nvp6158_iic_addr[4];
24
25 /*=======================================================================================================
26 ********************************************************************************************************
27 **************************** Coaxial protocol up stream function ***************************************
28 ********************************************************************************************************
29 * Coaxial protocol up stream Flow
30 * 1. Up stream initialize - nvp6158_coax_tx_init
31 * 2. Fill upstream data & Send - nvp6158_coax_tx_16bit_init
32 *
33 * Coaxial protocol up stream register(example: channel 0)
34 * (3x00) tx_baud : 1 bit duty
35 * (3x02) tx_pel_baud : 1 bit duty of pelco(SD)
36 * (3x03) tx_line_pos0 : up stream line position(low)
37 * (3x04) tx_line_pos1 : up stream line position(high)
38 * (3x05) tx_line_count : up stream output line number in 1 frame
39 * (3x07) tx_pel_line_pos0 : up stream line position of pelco(low)
40 * (3x08) tx_pel_line_pos1 : up stream line position of pelco(high)
41 * (3x0A) tx_line_count_max : up stream output total line
42 * (3x0B) tx_mode : up stream Mode set (ACP, CCP, TCP)
43 * (3x0D) tx_sync_pos0 : up stream sync start position(low)
44 * (3x0E) tx_sync_pos1 : up stream sync start position(high)
45 * (3x2F) tx_even : up stream SD..Interlace
46 * (3x0C) tx_zero_length : Only CVI 4M
47 ========================================================================================================*/
48
49 /**************************************************************************************
50 * @desc
51 * RAPTOR3's This function initializes the register associated with the UP Stream..
52 *
53 * @param_in (NC_VD_COAX_Tx_Init_STR *)coax_tx_mode UP Stream Initialize structure
54 *
55 * @return void None
56 *
57 * ioctl : IOC_VDEC_COAX_TX_INIT
58 ***************************************************************************************/
__NC_VD_ACP_Get_CommandFormat_Get(NC_COAX_CMD_DEF def)59 static NC_VD_ACP_CMDDEF_STR *__NC_VD_ACP_Get_CommandFormat_Get(NC_COAX_CMD_DEF def)
60 {
61 NC_VD_ACP_CMDDEF_STR *pRet = &nvp6158_coax_cmd_lists[def];
62 if( pRet == NULL ) {
63 printk("Not Supported format Yet!!!(%d)\n",def);
64 }
65 return pRet;
66 }
67
__NC_VD_COAX_InitFormat_Get(NC_VIVO_CH_FORMATDEF def)68 static NC_VD_COAX_Init_STR *__NC_VD_COAX_InitFormat_Get(NC_VIVO_CH_FORMATDEF def)
69 {
70 NC_VD_COAX_Init_STR *pRet = &nvp6158_coax_init_lists[def];
71 if( pRet == NULL ) {
72 printk("Not Supported format Yet!!!(%d)\n",def);
73 }
74 return pRet;
75 }
76
__NC_VD_COAX_16bit_InitFormat_Get(NC_VIVO_CH_FORMATDEF def)77 static NC_VD_COAX_Init_STR *__NC_VD_COAX_16bit_InitFormat_Get(NC_VIVO_CH_FORMATDEF def)
78 {
79 NC_VD_COAX_Init_STR *pRet = &nvp6158_coax_acp_16bit_init_lists[def];
80 if( pRet == NULL ) {
81 printk("Not Supported format Yet!!!(%d)\n",def);
82 }
83 return pRet;
84 }
85
__NC_VD_COAX_Command_Each_Copy(unsigned char * Dst,int * Src)86 static int __NC_VD_COAX_Command_Each_Copy(unsigned char *Dst, int *Src)
87 {
88 int items = 0;
89
90 while( Src[items] != EOD ) {
91 Dst[items] = Src[items];
92 items++;
93 }
94
95 return items;
96 }
97
__NC_VD_COAX_Command_Copy(NC_FORMAT_STANDARD format,NC_VIVO_CH_FORMATDEF vivofmt,unsigned char * Dst,NC_VD_ACP_CMDDEF_STR * pCMD)98 static int __NC_VD_COAX_Command_Copy(NC_FORMAT_STANDARD format, NC_VIVO_CH_FORMATDEF vivofmt,
99 unsigned char *Dst, NC_VD_ACP_CMDDEF_STR *pCMD)
100 {
101 int cmd_cnt = 0;
102
103 if( format == FMT_SD ) {
104 cmd_cnt = __NC_VD_COAX_Command_Each_Copy(Dst, pCMD->sd);
105 } else if((format == FMT_AHD20) || (format == FMT_AHD30)) {
106 if(vivofmt == AHD30_4M_30P || vivofmt == AHD30_4M_25P || vivofmt == AHD30_4M_15P ||
107 vivofmt == AHD30_5M_20P || vivofmt == AHD30_5M_12_5P || vivofmt == AHD30_5_3M_20P ||
108 vivofmt == AHD30_8M_12_5P || vivofmt == AHD30_8M_15P)
109 cmd_cnt = __NC_VD_COAX_Command_Each_Copy(Dst, pCMD->ahd_4_5m);
110 //cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->ahd_4_5m );
111 //else if( vivofmt == AHD30_4M_30P || vivofmt == AHD30_4M_25P || vivofmt == AHD30_4M_15P )
112 //cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->ahd_4_5m );
113 else
114 cmd_cnt = __NC_VD_COAX_Command_Each_Copy(Dst, pCMD->ahd_8bit);
115 } else if(format == FMT_CVI) {
116 cmd_cnt= __NC_VD_COAX_Command_Each_Copy(Dst, pCMD->cvi_cmd);
117 } else if(format == FMT_TVI) {
118 if((vivofmt == TVI_4M_30P) || (vivofmt == TVI_4M_25P) || (vivofmt == TVI_4M_15P) ||
119 (vivofmt == TVI_5M_20P) || (vivofmt == TVI_5M_12_5P) || (vivofmt == TVI_8M_12_5P) || (vivofmt == TVI_8M_15P))
120 cmd_cnt = __NC_VD_COAX_Command_Each_Copy(Dst, pCMD->tvi_v2_0);
121 else
122 cmd_cnt = __NC_VD_COAX_Command_Each_Copy(Dst, pCMD->tvi_v1_0);
123 } else {
124 printk("NC_VD_COAX_Tx_Command_Send::Command Copy Error!!\n");
125 }
126
127 return cmd_cnt;
128 }
129
__NC_VD_COAX_16bit_Command_Copy(NC_FORMAT_STANDARD format,NC_VIVO_CH_FORMATDEF vivofmt,unsigned char * Dst,NC_VD_ACP_CMDDEF_STR * pCMD)130 static int __NC_VD_COAX_16bit_Command_Copy(NC_FORMAT_STANDARD format, NC_VIVO_CH_FORMATDEF vivofmt,
131 unsigned char *Dst, NC_VD_ACP_CMDDEF_STR *pCMD)
132 {
133 int cmd_cnt = 0;
134
135 if((vivofmt == AHD20_720P_25P) || (vivofmt == AHD20_720P_30P) ||\
136 (vivofmt == AHD20_720P_25P_EX) || (vivofmt == AHD20_720P_30P_EX) ||\
137 (vivofmt == AHD20_720P_25P_EX_Btype) || (vivofmt == AHD20_720P_30P_EX_Btype)) {
138 cmd_cnt = __NC_VD_COAX_Command_Each_Copy( Dst, pCMD->ahd_16bit );
139 } else if((vivofmt == CVI_4M_25P) || (vivofmt == CVI_4M_30P) ||\
140 (vivofmt == CVI_5M_20P) || (vivofmt == CVI_8M_15P) || (vivofmt == CVI_8M_12_5P)) {
141 cmd_cnt = __NC_VD_COAX_Command_Each_Copy(Dst, pCMD->cvi_new_cmd);
142 } else {
143 printk("[drv_coax] Can not send commands!! Unsupported format!!\n");
144 return 0;
145 }
146
147 return cmd_cnt;
148 }
149
150 /**************************************************************************************
151 * @desc
152 * RAPTOR3's This function initializes the register associated with the UP Stream..
153 *
154 * @param_in (NC_VD_COAX_Tx_Init_STR *)coax_tx_mode UP Stream Initialize structure
155 *
156 * @return void None
157 *
158 * ioctl : IOC_VDEC_COAX_TX_INIT
159 ***************************************************************************************/
nvp6158_coax_tx_init(nvp6158_coax_str * ps_coax_str)160 void nvp6158_coax_tx_init(nvp6158_coax_str *ps_coax_str)
161 {
162 unsigned char ch = ps_coax_str->ch % 4;
163 unsigned char devnum = ps_coax_str->ch / 4;
164 unsigned char distance = 0;
165 NC_VD_COAX_Init_STR *CoaxVal = __NC_VD_COAX_InitFormat_Get( ps_coax_str->fmt_def);
166 printk("[drv_coax]Ch: %d Format >>>>> %s\n", ch, CoaxVal->name );
167
168 // MPP Coaxial mode select Ch1~4
169 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x01); // BANK 1
170 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xA8+ch, 0x08+ch); // MPP_TST_SEL1
171
172 // Coaxial each mode set
173 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch % 4); // BANK 5
174 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x2F, 0x00); // MPP_H_INV, MPP_V_INV, MPP_F_INV
175 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30, 0xE0); // MPP_H_S[7~4], MPP_H_E[3:0]
176 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x31, 0x43); // MPP_H_S[7:0]
177 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x32, 0xA2); // MPP_H_E[7:0]
178 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7C, CoaxVal->rx_src);
179 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7D, CoaxVal->rx_slice_lev);
180
181 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03 + ((ch % 4) / 2));
182
183 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + ((ch % 2) * 0x80), CoaxVal->tx_baud[distance]);
184 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x02 + ((ch % 2) * 0x80), CoaxVal->tx_pel_baud[distance]);
185 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x03 + ((ch % 2) * 0x80), CoaxVal->tx_line_pos0[distance]);
186 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x04 + ((ch % 2) * 0x80), CoaxVal->tx_line_pos1[distance]);
187 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05 + ((ch % 2) * 0x80), CoaxVal->tx_line_count);
188 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x07 + ((ch % 2) * 0x80), CoaxVal->tx_pel_line_pos0[distance]);
189 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x08 + ((ch % 2) * 0x80), CoaxVal->tx_pel_line_pos1[distance]);
190 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0A + ((ch % 2) * 0x80), CoaxVal->tx_line_count_max);
191 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0B + ((ch % 2) * 0x80), CoaxVal->tx_mode);
192 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0D + ((ch % 2) * 0x80), CoaxVal->tx_sync_pos0[distance]);
193 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0E + ((ch % 2) * 0x80), CoaxVal->tx_sync_pos1[distance]);
194 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x2F + ((ch % 2) * 0x80), CoaxVal->tx_even);
195 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0C + ((ch % 2) * 0x80), CoaxVal->tx_zero_length);
196
197 #if DBG_TX_INIT_PRINT
198 printk("[drv]tx_src: 5x7C>> 0x%02X\n", CoaxVal->rx_src );
199 printk("[drv]tx_slice_lev: 5x7D>> 0x%02X\n", CoaxVal->rx_slice_lev );
200 printk("[drv]tx_pel_baud: 3x02>> 0x%02X\n", CoaxVal->tx_baud[distance] );
201 printk("[drv]tx_pel_line_pos0: 3x07>> 0x%02X\n", CoaxVal->tx_pel_line_pos0[distance] );
202 printk("[drv]tx_pel_line_pos1: 3x08>> 0x%02X\n", CoaxVal->tx_pel_line_pos1[distance] );
203 printk("[drv]tx_mode: 3x0B>> 0x%02X\n", CoaxVal->tx_mode );
204 printk("[drv]tx_baud: 3x00>> 0x%02X\n", CoaxVal->tx_baud[distance]);
205 printk("[drv]tx_line_pos0: 3x03>> 0x%02X\n", CoaxVal->tx_line_pos0[distance] );
206 printk("[drv]tx_line_pos1: 3x04>> 0x%02X\n", CoaxVal->tx_line_pos1[distance] );
207 printk("[drv]tx_line_count: 3x05>> 0x%02X\n", CoaxVal->tx_line_count );
208 printk("[drv]tx_line_count_max: 3x0A>> 0x%02X\n", CoaxVal->tx_line_count_max );
209 printk("[drv]tx_sync_pos0: 3x0D>> 0x%02X\n", CoaxVal->tx_sync_pos0[distance] );
210 printk("[drv]tx_sync_pos1: 3x0E>> 0x%02X\n", CoaxVal->tx_sync_pos1[distance] );
211 printk("[drv]tx_even: 3x2F>> 0x%02X\n", CoaxVal->tx_even );
212 printk("[drv]tx_zero_length: 3x0C>> 0x%02X\n", CoaxVal->tx_zero_length);
213 #endif
214
215 }
216
217 /**************************************************************************************
218 * @desc
219 * RAPTOR3's This function initializes the register associated with the UP Stream..
220 *
221 * @param_in (NC_VD_COAX_Tx_Init_STR *)coax_tx_mode UP Stream Initialize structure
222 *
223 * @return void None
224 *
225 * ioctl : IOC_VDEC_COAX_TX_INIT
226 ***************************************************************************************/
nvp6158_coax_tx_16bit_init(nvp6158_coax_str * ps_coax_str)227 int nvp6158_coax_tx_16bit_init( nvp6158_coax_str *ps_coax_str )
228 {
229 //NC_VD_COAX_STR *coax_tx = (NC_VD_COAX_STR*)p_param;
230 NC_VD_COAX_Init_STR *CoaxVal;
231
232 unsigned char ch = ps_coax_str->ch % 4;
233 unsigned char devnum = ps_coax_str->ch / 4;
234 NC_VIVO_CH_FORMATDEF fmt_def = ps_coax_str->fmt_def;
235 //int fmt = coax_tx->vivo_fmt;
236 unsigned char distance = 0;
237
238 if((fmt_def == AHD20_720P_25P) || (fmt_def == AHD20_720P_30P) ||\
239 (fmt_def == AHD20_720P_25P_EX) || (fmt_def == AHD20_720P_30P_EX) ||\
240 (fmt_def == AHD20_720P_25P_EX_Btype) || (fmt_def == AHD20_720P_30P_EX_Btype)) {
241 printk("[drv_coax]Ch: %d ACP 16bit initialize!!!\n", ch);
242 } else if((fmt_def == CVI_4M_25P) || (fmt_def == CVI_4M_30P)) { //some fh cams may need this
243 // (fmt_def == CVI_8M_15P) || (fmt_def == CVI_8M_12_5P) )
244 printk("[drv_coax]Ch: %d CVI New Protocol initialize!!!\n", ch);
245 } else {
246 printk("[drv_coax]Ch: %d Can not initialize!! Unsupported format!!\n", ch);
247 return -1;
248 }
249
250 CoaxVal = __NC_VD_COAX_16bit_InitFormat_Get( fmt_def );
251 printk("[drv_coax]Ch: %d Format >>>>> %s\n", ch, CoaxVal->name );
252
253 // MPP Coaxial mode select Ch1~4
254 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x01); // BANK 1
255 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xA8 + ch, 0x08 + ch % 4); // MPP_TST_SEL1
256
257 // Coaxial each mode set
258 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05 + ch % 4); // BANK 5
259 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x2F, 0x00); // MPP_H_INV, MPP_V_INV, MPP_F_INV
260 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x30, 0xE0); // MPP_H_S[7~4], MPP_H_E[3:0]
261 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x31, 0x43); // MPP_H_S[7:0]
262 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x32, 0xA2); // MPP_H_E[7:0]
263 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7C, CoaxVal->rx_src);
264 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x7D, CoaxVal->rx_slice_lev);
265
266 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03 + ((ch % 4) / 2));
267
268 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x00 + ((ch%2)*0x80), CoaxVal->tx_baud[distance]);
269 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x02 + ((ch%2)*0x80), CoaxVal->tx_pel_baud[distance]);
270 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x03 + ((ch%2)*0x80), CoaxVal->tx_line_pos0[distance]);
271 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x04 + ((ch%2)*0x80), CoaxVal->tx_line_pos1[distance]);
272 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x05 + ((ch%2)*0x80), CoaxVal->tx_line_count);
273 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x07 + ((ch%2)*0x80), CoaxVal->tx_pel_line_pos0[distance]);
274 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x08 + ((ch%2)*0x80), CoaxVal->tx_pel_line_pos1[distance]);
275 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0A + ((ch%2)*0x80), CoaxVal->tx_line_count_max);
276 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0B + ((ch%2)*0x80), CoaxVal->tx_mode);
277 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0D + ((ch%2)*0x80), CoaxVal->tx_sync_pos0[distance]);
278 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0E + ((ch%2)*0x80), CoaxVal->tx_sync_pos1[distance]);
279 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x2F + ((ch%2)*0x80), CoaxVal->tx_even);
280 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0C + ((ch%2)*0x80), CoaxVal->tx_zero_length);
281
282 #if DBG_TX_INIT_PRINT
283 printk("[drv]tx_src: 5x7C>> 0x%02X\n", CoaxVal->rx_src );
284 printk("[drv]tx_slice_lev: 5x7D>> 0x%02X\n", CoaxVal->rx_slice_lev );
285 printk("[drv]tx_pel_baud: 3x02>> 0x%02X\n", CoaxVal->tx_baud[distance] );
286 printk("[drv]tx_pel_line_pos0: 3x07>> 0x%02X\n", CoaxVal->tx_pel_line_pos0[distance] );
287 printk("[drv]tx_pel_line_pos1: 3x08>> 0x%02X\n", CoaxVal->tx_pel_line_pos1[distance] );
288 printk("[drv]tx_mode: 3x0B>> 0x%02X\n", CoaxVal->tx_mode );
289 printk("[drv]tx_baud: 3x00>> 0x%02X\n", CoaxVal->tx_baud[distance]);
290 printk("[drv]tx_line_pos0: 3x03>> 0x%02X\n", CoaxVal->tx_line_pos0[distance] );
291 printk("[drv]tx_line_pos1: 3x04>> 0x%02X\n", CoaxVal->tx_line_pos1[distance] );
292 printk("[drv]tx_line_count: 3x05>> 0x%02X\n", CoaxVal->tx_line_count );
293 printk("[drv]tx_line_count_max: 3x0A>> 0x%02X\n", CoaxVal->tx_line_count_max );
294 printk("[drv]tx_sync_pos0: 3x0D>> 0x%02X\n", CoaxVal->tx_sync_pos0[distance] );
295 printk("[drv]tx_sync_pos1: 3x0E>> 0x%02X\n", CoaxVal->tx_sync_pos1[distance] );
296 printk("[drv]tx_even: 3x2F>> 0x%02X\n", CoaxVal->tx_even );
297 printk("[drv]tx_zero_length: 3x0C>> 0x%02X\n", CoaxVal->tx_zero_length);
298 #endif
299 return 0;
300 }
301
302 /**************************************************************************************
303 * @desc
304 * RAPTOR3's Send UP Stream command.
305 *
306 * @param_in (NC_VD_COAX_SET_STR *)coax_tx_mode UP Stream Command structure
307 *
308 * @return void None
309 *
310 * ioctl : IOC_VDEC_COAX_TX_CMD_SEND
311 ***************************************************************************************/
nvp6158_coax_tx_cmd_send(nvp6158_coax_str * ps_coax_str)312 void nvp6158_coax_tx_cmd_send( nvp6158_coax_str *ps_coax_str )
313 //void nvp6158_coax_tx_16bit_init( const unsigned char txch, NC_VIVO_CH_FORMATDEF fmt_def , NC_FORMAT_STANDARD vformat, NC_COAX_CMD_DEF txcmd)
314 {
315 //NC_VD_COAX_STR *coax_tx = (NC_VD_COAX_STR*)p_param;
316 int i;
317 int cmd_cnt = 0;
318 unsigned char ch = ps_coax_str->ch % 4;
319 unsigned char devnum = ps_coax_str->ch/4;
320 NC_COAX_CMD_DEF cmd = ps_coax_str->cmd;
321 NC_VIVO_CH_FORMATDEF vivofmt = ps_coax_str->fmt_def;
322 NC_FORMAT_STANDARD format = NVP6158_GetFmtStd_from_Fmtdef(vivofmt);
323
324 unsigned char tx_bank = 0x00;
325 unsigned char tx_cmd_addr = 0x00;
326 unsigned char tx_shot_addr = 0x00;
327 unsigned char command[32] = {0,};
328 unsigned char TCP_CMD_Stop_v10[10] = { 0xb5, 0x00, 0x14, 0x00, 0x80, 0x00, 0x00, 0x00, 0xc9, 0x80 };
329 //unsigned char TCP_CMD_Stop_v20[10] = { 0xb5, 0x01, 0x14, 0x00, 0x80, 0x00, 0x00, 0x00, 0xc5, 0x80 };
330
331 // UP Stream get from coax table
332 NC_VD_COAX_Init_STR *CoaxVal = __NC_VD_COAX_InitFormat_Get(vivofmt); // Get from Coax_Tx_Init Table
333 NC_VD_ACP_CMDDEF_STR *pCMD = __NC_VD_ACP_Get_CommandFormat_Get(cmd); // Get From Coax_Tx_Command Table
334 printk("[drv_coax]Ch: %d Command >>>>> %s >>> autostop = %d\n", ch, pCMD->name, pCMD->autostop);
335
336 tx_bank = CoaxVal->tx_bank;
337 tx_cmd_addr = CoaxVal->tx_cmd_addr;
338 tx_shot_addr = CoaxVal->tx_shot_addr;
339
340 // UP Stream command copy in coax command table
341 cmd_cnt = __NC_VD_COAX_Command_Copy( format, vivofmt, command, pCMD );
342
343 //printk("tx_bank[%2x], tx_cmd_addr[%2x], tx_shot_addr[%2x]\n", tx_bank, tx_cmd_addr, tx_shot_addr);
344 //for(i=0;i<cmd_cnt;i++)
345 // printk("[%2x] ", command[i]);
346 //printk("\n ");
347 // fill command + shot
348 if( format == FMT_SD ) {
349 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, tx_bank + ((ch % 4) / 2) );
350 for(i=0; i<cmd_cnt; i++) {
351 gpio_i2c_write(nvp6158_iic_addr[devnum], (tx_cmd_addr + ((ch % 2) * 0x80)) + i, 0);
352 }
353 // Shot
354 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03 + ((ch % 4) / 2) );
355 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr + ((ch % 2) * 0x80), 0x01);
356 msleep(CoaxVal->shot_delay);
357 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr + ((ch % 2) * 0x80), 0x00);
358
359 msleep(CoaxVal->reset_delay);
360
361 for(i=0; i<cmd_cnt; i++) {
362 gpio_i2c_write(nvp6158_iic_addr[devnum], (tx_cmd_addr + ((ch % 2) * 0x80)) + i, command[i]);
363 }
364 // Shot
365 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03 + ((ch % 4) / 2) );
366 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr + ((ch % 2) * 0x80), 0x01);
367 msleep(CoaxVal->shot_delay);
368 //if(cmd == COAX_CMD_STOP)
369 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr + ((ch % 2) * 0x80), 0x00);
370 } else if(format == FMT_CVI) {
371 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, tx_bank + (ch % 4));
372 for(i=0; i<cmd_cnt; i++) {
373 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_cmd_addr + i, command[i]);
374 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x10 + i, 0xff);
375 }
376
377 // Shot
378 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03 + ((ch % 4) / 2) );
379 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr + ((ch % 2) * 0x80), 0x01);
380 if((cmd == COAX_CMD_STOP) || (pCMD->autostop == 1))
381 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr +((ch % 2) * 0x80), 0x00);
382 } else if(format == FMT_TVI) {
383 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, tx_bank + ((ch % 4) / 2) );
384 for(i=0; i<cmd_cnt; i++) {
385 gpio_i2c_write(nvp6158_iic_addr[devnum], (tx_cmd_addr + ((ch % 2) * 0x80)) + i, command[i]);
386 }
387
388 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03 + ((ch % 4) / 2) );
389 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr + ((ch % 2) * 0x80), 0x08);
390 msleep(30);
391 if((cmd == COAX_CMD_STOP) || (pCMD->autostop == 1))
392 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr + ((ch % 2) * 0x80), 0x00);
393
394 if(pCMD->autostop == 1) {
395 if(vivofmt == TVI_4M_15P)
396 msleep(70);
397 else
398 msleep(30);
399 #if 0
400 if( (vivofmt == TVI_4M_30P) || (vivofmt == TVI_4M_25P) || (vivofmt == TVI_4M_15P) )
401 {
402 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, tx_bank+((ch%4)/2));
403 for(i=0;i<10;i++)
404 {
405 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_cmd_addr+((ch%2)*0x80)+i, TCP_CMD_Stop_v20[i]);
406 }
407 }
408 // shot
409 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr+((ch%2)*0x80), 0x01);
410 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr+((ch%2)*0x80), 0x00);
411 else
412 #endif
413 {
414 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, tx_bank + ((ch % 4) / 2));
415 for(i=0; i<10; i++) {
416 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_cmd_addr +
417 ((ch % 2) * 0x80) + i, TCP_CMD_Stop_v10[i]);
418 }
419 }
420
421 // shot
422 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr + ((ch % 2) * 0x80), 0x08);
423 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr + ((ch % 2) * 0x80), 0x00);
424 }
425 } else {
426 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, tx_bank+((ch % 4) / 2) );
427 for(i=0; i<cmd_cnt; i++) {
428 gpio_i2c_write(nvp6158_iic_addr[devnum], (tx_cmd_addr + ((ch % 2) * 0x80)) + i, command[i]);
429 }
430
431 // Shot
432 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03 + ((ch % 4) / 2) );
433 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr + ((ch%2) * 0x80), 0x01);
434 if((cmd == COAX_CMD_STOP) || (pCMD->autostop == 1))
435 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr + ((ch % 2) * 0x80), 0x00);
436 }
437
438 if(cmd == COAX_CMD_STOP) {//stop command sends twice in case of AF camera losses response...
439 msleep(35);
440 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03 + ((ch % 4) / 2) );
441 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr + ((ch % 2) * 0x80), 0x01);
442 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr + ((ch % 2) * 0x80), 0x00);
443 }
444 }
445
446 /**************************************************************************************
447 * @desc
448 * RAPTOR3's Send UP Stream command.
449 *
450 * @param_in (NC_VD_COAX_SET_STR *)coax_tx_mode UP Stream Command structure
451 *
452 * @return void None
453 *
454 * ioctl : IOC_VDEC_COAX_TX_CMD_SEND
455 ***************************************************************************************/
nvp6158_coax_tx_16bit_cmd_send(nvp6158_coax_str * ps_coax_str)456 void nvp6158_coax_tx_16bit_cmd_send( nvp6158_coax_str *ps_coax_str )
457 {
458 //NC_VD_COAX_STR *coax_tx = (NC_VD_COAX_STR*)p_param;
459 int i;
460 int cmd_cnt = 0;
461 unsigned char ch = ps_coax_str->ch % 4;
462 unsigned char devnum = ps_coax_str->ch / 4;
463 NC_COAX_CMD_DEF cmd = ps_coax_str->cmd;
464 NC_VIVO_CH_FORMATDEF vivofmt = ps_coax_str->fmt_def;
465 NC_FORMAT_STANDARD format = NVP6158_GetFmtStd_from_Fmtdef(vivofmt);
466
467 unsigned char tx_bank = 0x00;
468 unsigned char tx_cmd_addr = 0x00;
469 unsigned char tx_shot_addr = 0x00;
470 unsigned char command[32] ={0,};
471
472 // UP Stream get from coax table
473 NC_VD_COAX_Init_STR *CoaxVal = __NC_VD_COAX_InitFormat_Get(vivofmt); // Get from Coax_Tx_Init Table
474 NC_VD_ACP_CMDDEF_STR *pCMD = __NC_VD_ACP_Get_CommandFormat_Get(cmd); // Get From Coax_Tx_Command Table
475 printk("[drv_coax]Ch: %d Command >>>>> %s\n", ch, pCMD->name );
476
477 tx_bank = CoaxVal->tx_bank;
478 tx_cmd_addr = CoaxVal->tx_cmd_addr;
479 tx_shot_addr = CoaxVal->tx_shot_addr;
480
481 // UP Stream command copy in coax command table
482 cmd_cnt = __NC_VD_COAX_16bit_Command_Copy( format, vivofmt, command, pCMD );
483
484 // Adjust Bank
485 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03 + ((ch % 4) / 2) );
486
487 // fill Reset
488 for(i=0; i<cmd_cnt; i++) {
489 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x20 + ((ch % 2) * 0x80) + i, 0);
490 }
491
492 // Command Shot
493 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03 + ((ch % 4) / 2) );
494 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0c + ((ch % 2) * 0x80), 0x01);
495 msleep(30);
496 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0c + ((ch % 2) * 0x80), 0x00);
497
498 // fill command
499 for(i=0; i<cmd_cnt; i++) {
500 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x20 + ((ch % 2) * 0x80) + i, command[i]);
501 }
502
503 // Command Shot
504 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03 + ((ch % 4) / 2) );
505 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0c + ((ch % 2) * 0x80), 0x01);
506 msleep(30);
507 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0c + ((ch % 2) * 0x80), 0x00);
508
509 }
510
nvp6158_coax_tx_cvi_new_cmd_send(nvp6158_coax_str * ps_coax_str)511 void nvp6158_coax_tx_cvi_new_cmd_send( nvp6158_coax_str *ps_coax_str )
512 {
513 //NC_VD_COAX_STR *coax_tx = (NC_VD_COAX_STR*)p_param;
514 int i;
515 int cmd_cnt = 0;
516 unsigned char ch = ps_coax_str->ch % 4;
517 unsigned char devnum = ps_coax_str->ch / 4;
518 NC_COAX_CMD_DEF cmd = ps_coax_str->cmd;
519 NC_VIVO_CH_FORMATDEF vivofmt = ps_coax_str->fmt_def;
520 NC_FORMAT_STANDARD format = NVP6158_GetFmtStd_from_Fmtdef(vivofmt);
521
522 unsigned char tx_bank = 0x00;
523 unsigned char tx_cmd_addr = 0x00;
524 unsigned char tx_shot_addr = 0x00;
525 unsigned char command[32] ={0,};
526
527 // UP Stream get from coax table
528 NC_VD_COAX_Init_STR *CoaxVal = __NC_VD_COAX_InitFormat_Get(vivofmt); // Get from Coax_Tx_Init Table
529 NC_VD_ACP_CMDDEF_STR *pCMD = __NC_VD_ACP_Get_CommandFormat_Get(cmd); // Get From Coax_Tx_Command Table
530 printk("[drv_coax]Ch: %d Command >>>>> %s\n", ch, pCMD->name );
531
532 tx_bank = CoaxVal->tx_bank;
533 tx_cmd_addr = CoaxVal->tx_cmd_addr;
534 tx_shot_addr = CoaxVal->tx_shot_addr;
535
536 // UP Stream command copy in coax command table
537 cmd_cnt = __NC_VD_COAX_16bit_Command_Copy( format, vivofmt, command, pCMD );
538
539 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, tx_bank + (ch % 4));
540 for(i=0; i<cmd_cnt; i++) {
541 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_cmd_addr + i, command[i]);
542 }
543
544 // Shot
545 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03 + ((ch % 4) / 2) );
546 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr + ((ch % 2) * 0x80), 0x01);
547 gpio_i2c_write(nvp6158_iic_addr[devnum], tx_shot_addr + ((ch % 2) * 0x80), 0x00);
548 }
549
550 /*=======================================================================================================
551 ********************************************************************************************************
552 **************************** Coaxial protocol down stream function *************************************
553 ********************************************************************************************************
554 *
555 * Coaxial protocol down stream Flow
556 * 1. Down stream initialize - nvp6158_coax_rx_init
557 * 2. Down stream data read - nvp6158_coax_rx_data_get
558 *
559 * Coaxial protocol down stream register(example: channel 0)
560 * (3x63) rx_comm_on : Coaxial Down Stream Mode ON/OFF ( 0: OFF / 1: ON )
561 * (3x62) rx_area : Down Stream Read Line Number
562 * (3x66) rx_signal_enhance : Signal Enhance ON/OFF ( 0: OFF / 1: ON )
563 * (3x69) rx_manual_duty : 1 Bit Duty Setting ( HD@25, 30P 0x32 / HD@50, 60P, FHD@25, 30P 0x64 )
564 * (3x60) rx_head_matching : Same Header Read (EX. 0x48)
565 * (3x61) rx_data_rz : The lower 2 bits set Coax Mode.. ( 0 : A-CP ), ( 1 : C-CP ), ( 2 : T-CP )
566 * (3x68) rx_sz : Down stream size setting
567 * (3x3A) : Down stream buffer clear
568 ========================================================================================================*/
569 /**************************************************************************************
570 * @desc
571 * RAPTOR3's This function initializes the register associated with the Down Stream.
572 *
573 * @param_in (NC_VD_COAX_SET_STR *)coax_tx_mode Down Stream Initialize structure
574 *
575 * @return void None
576 *
577 * ioctl : IOC_VDEC_COAX_RX_INIT
578 ***************************************************************************************/
nvp6158_coax_rx_init(nvp6158_coax_str * ps_coax_str)579 void nvp6158_coax_rx_init( nvp6158_coax_str *ps_coax_str )
580 {
581 //NC_VD_COAX_STR *coax_rx = (NC_VD_COAX_STR*)p_param;
582 unsigned char ch = ps_coax_str->ch % 4;
583 unsigned char devnum = ps_coax_str->ch / 4;
584 //NC_VIVO_CH_FORMATDEF vivofmt = coax_rx->vivo_fmt;
585
586 NC_VD_COAX_Init_STR *coax_rx_val = __NC_VD_COAX_InitFormat_Get(ps_coax_str->fmt_def);
587
588 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03 + ((ch % 4) / 2));
589
590 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x63 + ((ch%2)*0x80), coax_rx_val->rx_comm_on);
591 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x62 + ((ch%2)*0x80), coax_rx_val->rx_area);
592 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x66 + ((ch%2)*0x80), coax_rx_val->rx_signal_enhance);
593 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x69 + ((ch%2)*0x80), coax_rx_val->rx_manual_duty);
594 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x60 + ((ch%2)*0x80), coax_rx_val->rx_head_matching);
595 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x61 + ((ch%2)*0x80), coax_rx_val->rx_data_rz);
596 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x68 + ((ch%2)*0x80), coax_rx_val->rx_sz);
597 #if DBG_RX_INIT_PRINT
598 printk("[drv]Channel %d Format >>>>> %s\n", ch, coax_rx_val->name );
599 printk("[drv]rx_head_matching: 0x60 >> 0x%02X\n", coax_rx_val->rx_head_matching);
600 printk("[drv]rx_data_rz: 0x61 >> 0x%02X\n", coax_rx_val->rx_data_rz);
601 printk("[drv]rx_area: 0x62 >> 0x%02X\n", coax_rx_val->rx_area);
602 printk("[drv]rx_comm_on: 0x63 >> 0x%02X\n", coax_rx_val->rx_comm_on );
603 printk("[drv]rx_signal_enhance: 0x66 >> 0x%02X\n", coax_rx_val->rx_signal_enhance);
604 printk("[drv]rx_sz: 0x68 >> 0x%02X\n", coax_rx_val->rx_sz);
605 printk("[drv]rx_manual_duty: 0x69 >> 0x%02X\n", coax_rx_val->rx_manual_duty);
606 #endif
607
608 }
609
610 /**************************************************************************************
611 * @desc
612 * RAPTOR3's Read down stream data.
613 *
614 * @param_in (NC_VD_COAX_SET_STR *)coax_tx_mode Down Stream read structure
615 *
616 * @return void None
617 *
618 * ioctl : IOC_VDEC_COAX_RX_DATA_READ
619 ***************************************************************************************/
nvp6158_coax_rx_data_get(nvp6158_coax_str * coax_rx)620 void nvp6158_coax_rx_data_get( nvp6158_coax_str *coax_rx )
621 {
622 //NC_VD_COAX_STR *coax_rx = (NC_VD_COAX_STR*)p_param;
623
624 int ii = 0;
625 unsigned char ch = coax_rx->ch % 4;
626 unsigned char devnum = coax_rx->ch / 4;
627 NC_FORMAT_STANDARD format = NVP6158_GetFmtStd_from_Fmtdef(coax_rx->fmt_def);
628
629 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03 + ((ch % 4) / 2));
630
631 if( (format == FMT_CVI) || (format == FMT_TVI) ) {
632 for(ii=0; ii<5; ii++) {
633 coax_rx->rx_data1[ii] = gpio_i2c_read(nvp6158_iic_addr[devnum], (0x40+((ch%2)*0x80))+ii); // ChX_Rx_Line_1 : 0x40 ~ 0x44 5byte
634 coax_rx->rx_data2[ii] = gpio_i2c_read(nvp6158_iic_addr[devnum], (0x45+((ch%2)*0x80))+ii); // ChX_Rx_Line_2 : 0x45 ~ 0x49 5byte
635 coax_rx->rx_data3[ii] = gpio_i2c_read(nvp6158_iic_addr[devnum], (0x4A+((ch%2)*0x80))+ii); // ChX_Rx_Line_3 : 0x4A ~ 0x4E 5byte
636 coax_rx->rx_data4[ii] = gpio_i2c_read(nvp6158_iic_addr[devnum], (0x6C+((ch%2)*0x80))+ii); // ChX_Rx_Line_4 : 0x6C ~ 0x70 5byte
637 coax_rx->rx_data5[ii] = gpio_i2c_read(nvp6158_iic_addr[devnum], (0x71+((ch%2)*0x80))+ii); // ChX_Rx_Line_5 : 0x71 ~ 0x75 5byte
638 coax_rx->rx_data6[ii] = gpio_i2c_read(nvp6158_iic_addr[devnum], (0x76+((ch%2)*0x80))+ii); // ChX_Rx_Line_6 : 0x76 ~ 0x7A 5byte
639 }
640 } else {// AHD
641 for(ii=0; ii<8; ii++) {
642 coax_rx->rx_pelco_data[ii] = gpio_i2c_read(nvp6158_iic_addr[devnum], (0x50+((ch%2)*0x80))+ii); // ChX_PELCO_Rx_Line_1 ~ 8 : 0x50 ~ 0x57 8byte
643 }
644 }
645 }
646
647 /**************************************************************************************
648 * @desc
649 * RAPTOR3's Down stream buffer clear.
650 *
651 * @param_in (NC_VD_COAX_SET_STR *)coax_tx_mode UP Stream Command structure
652 *
653 * @return void None
654 *
655 * ioctl : IOC_VDEC_COAX_RX_BUF_CLEAR
656 ***************************************************************************************/
nvp6158_coax_rx_buffer_clear(nvp6158_coax_str * ps_coax_str)657 void nvp6158_coax_rx_buffer_clear( nvp6158_coax_str *ps_coax_str )
658 {
659 //NC_VD_COAX_STR *coax_val = (NC_VD_COAX_STR*)p_param;
660
661 unsigned char ch = ps_coax_str->ch%4;
662 unsigned char devnum = ps_coax_str->ch/4;
663 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2));
664
665 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x3A+((ch%2)*0x80), 0x01);
666 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x3A+((ch%2)*0x80), 0x00);
667 }
668
669 /**************************************************************************************
670 * @desc
671 * RAPTOR3's Down stream mode off.
672 *
673 * @param_in (NC_VD_COAX_SET_STR *)coax_tx_mode UP Stream Command structure
674 *
675 * @return void None
676 *
677 * ioctl : IOC_VDEC_COAX_RX_DEINIT
678 ***************************************************************************************/
nvp6158_coax_rx_deinit(nvp6158_coax_str * ps_coax_str)679 void nvp6158_coax_rx_deinit( nvp6158_coax_str *ps_coax_str )
680 {
681 //NC_VD_COAX_STR *coax_val = (NC_VD_COAX_STR*)p_param;
682
683 unsigned char ch = ps_coax_str->ch%4;
684 unsigned char devnum = ps_coax_str->ch/4;
685
686 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2));
687 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x63+((ch%2)*0x80), 0);
688 }
689
690 /*=======================================================================================================
691 ********************************************************************************************************
692 ************************** Coaxial protocol firmware upgrade function **********************************
693 ********************************************************************************************************
694 *
695 * Coaxial protocol firmware upgrade Flow
696 * 1. ACP Check - Down Stream Header 0x55 - nvp6158_coax_fw_ready_header_check_from_isp_recv
697 * 2.1 FW ready send - nvp6158_coax_fw_ready_cmd_to_isp_send
698 * 2.2 FW ready ACK receive - nvp6158_coax_fw_ready_cmd_ack_from_isp_recv
699 * 3.1 FW start send - nvp6158_coax_fw_start_cmd_to_isp_send
700 * 3.2 FW start ACK receive - nvp6158_coax_fw_start_cmd_ack_from_isp_recv
701 * 4.1 FW data send - 139byte - nvp6158_coax_fw_one_packet_data_to_isp_send
702 * 4.2 FW data ACK receive - offset - nvp6158_coax_fw_one_packet_data_ack_from_isp_recv
703 * 5.1 FW end send - nvp6158_coax_fw_end_cmd_to_isp_send
704 * 5.2 FW end ACK receive - nvp6158_coax_fw_end_cmd_ack_from_isp_recv
705 ========================================================================================================*/
706
707 /**************************************************************************************
708 * @desc
709 * RAPTOR3's Down stream check header value.(AHD : 0x55)
710 *
711 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
712 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Header check result
713 *
714 * @return void None
715 *
716 * ioctl : IOC_VDEC_COAX_FW_ACP_HEADER_GET
717 ***************************************************************************************/
nvp6158_coax_fw_ready_header_check_from_isp_recv(void * p_param)718 void nvp6158_coax_fw_ready_header_check_from_isp_recv(void *p_param)
719 {
720 int ret = FW_FAILURE;
721 int ch = 0;
722 int devnum = 0;
723 unsigned char readval = 0;
724
725 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
726 ch = pstFileInfo->channel;
727 devnum = pstFileInfo->channel/4;
728
729 /* set register */
730 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2));
731 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x50+((ch%2)*0x80), 0x05 ); // PELCO Down Stream Read 1st Line
732 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x60+((ch%2)*0x80), 0x55 ); // Header Matching
733
734 /* If the header is (0x50=>0x55) and chip information is (0x51=>0x3X, 0x4X, 0x5X ), it can update firmware */
735 if( gpio_i2c_read( nvp6158_iic_addr[devnum], 0x50+((ch%2)*0x80) ) == 0x55 ) {
736 printk(">>>>> DRV[%s:%d] CH:%d, this camera can update, please, wait! = 0x%x\n",
737 __func__, __LINE__, ch, gpio_i2c_read( nvp6158_iic_addr[ch/4], 0x51+((ch%2)*0x80)));
738 ret = FW_SUCCESS;
739 } else {
740 readval= gpio_i2c_read( nvp6158_iic_addr[devnum], 0x50+((ch%2)*0x80) );
741 printk(">>>>> DRV[%s:%d] check ACP_STATUS_MODE::0x%x\n", __func__, __LINE__, readval );
742 ret = FW_FAILURE;
743 }
744
745 pstFileInfo->result = ret;
746 }
747
748 /**************************************************************************************
749 * @desc
750 * RAPTOR3's FW Ready command send to camera ( Mode change to FHD@25P )
751 *
752 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
753 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->cp_mode Camera Format
754 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Function execution result
755 *
756 * @return void None
757 *
758 * ioctl : IOC_VDEC_COAX_FW_READY_CMD_SET
759 ***************************************************************************************/
nvp6158_coax_fw_ready_cmd_to_isp_send(void * p_param)760 void nvp6158_coax_fw_ready_cmd_to_isp_send(void *p_param) // FW Ready
761 {
762 int ch = 0;
763 int devnum = 0;
764 int ret = FW_FAILURE;
765 int cp_mode = 0;
766
767 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
768 ch = pstFileInfo->channel;
769 cp_mode = pstFileInfo->cp_mode;
770 devnum = pstFileInfo->channel/4;
771
772 /* Adjust Tx */
773 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2));
774 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x0A+((ch%2)*0x80), 0x04); // Tx Line count max
775
776 /* change video mode FHD@25P Command Send */
777 if( (cp_mode == FMT_AHD20) || (cp_mode == FMT_AHD30)) {
778 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x10+((ch%2)*0x80), 0x60); // Register Write Control - 17th line
779 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x11+((ch%2)*0x80), 0xB0); // table(Mode Change Command) - 18th line
780 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x12+((ch%2)*0x80), 0x02); // Flash Update Mode(big data) - 19th line
781 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x13+((ch%2)*0x80), 0x02); // Init Value(FW Information Check Mode) - 20th line
782
783 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x09+((ch%2)*0x80), 0x08); // trigger on
784 msleep(400);
785 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x09+((ch%2)*0x80), 0x10); // reset
786 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x09+((ch%2)*0x80), 0x00); // trigger Off
787 printk(">>>>> DRV[%s:%d] CH:%d, nvp6158_coax_fw_ready_cmd_to_isp_send!!- AHD\n",
788 __func__, __LINE__, ch );
789 ret = FW_SUCCESS;
790 } else if((cp_mode == FMT_CVI) || (cp_mode == FMT_TVI)) {
791 /* change video mode FHD@25P Command Send */
792 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2) );
793 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x10+((ch%2)*0x80), 0x55); // 0x55(header) - 16th line
794 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x11+((ch%2)*0x80), 0x60); // Register Write Control - 17th line
795 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x12+((ch%2)*0x80), 0xB0); // table(Mode Change Command) - 18th line
796 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x13+((ch%2)*0x80), 0x02); // Flash Update Mode - 19th line
797 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x14+((ch%2)*0x80), 0x00); // Init Value(FW Information Check Mode) - 20th line
798
799 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x09+((ch%2)*0x80), 0x08); // trigger on
800 msleep(1000);
801 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x09+((ch%2)*0x80), 0x10); // reset
802 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x09+((ch%2)*0x80), 0x00); // trigger Off
803 printk(">>>>> DRV[%s:%d] CH:%d, nvp6158_coax_fw_ready_cmd_to_isp_send!!- AHD\n",
804 __func__, __LINE__, ch );
805 ret = FW_SUCCESS;
806 } else {
807 printk(">>>> DRV[%s:%d] CH:%d, FMT:%d > Unknown Format!!! \n", __func__, __LINE__, ch, cp_mode );
808 ret = FW_FAILURE;
809 }
810
811 pstFileInfo->result = ret;
812 }
813
814 /**************************************************************************************
815 * @desc
816 * RAPTOR3's FW Ready ACK receive from camera
817 *
818 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
819
820 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Function execution result
821 *
822 * @return void None
823 *
824 * ioctl : IOC_VDEC_COAX_FW_READY_ACK_GET
825 ***************************************************************************************/
nvp6158_coax_fw_ready_cmd_ack_from_isp_recv(void * p_param)826 void nvp6158_coax_fw_ready_cmd_ack_from_isp_recv(void *p_param)
827 {
828 int ret = FW_FAILURE;
829 int ch = 0;
830 int devnum = 0;
831 unsigned char retval = 0x00;
832 unsigned char retval2 = 0x00;
833 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
834 ch = pstFileInfo->channel;
835 devnum = pstFileInfo->channel/4;
836
837 /* Adjust Rx FHD@25P */
838 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2));
839 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x63+((ch%2)*0x80), 0x01 ); // Ch_X Rx ON
840 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x62+((ch%2)*0x80), 0x05 ); // Ch_X Rx Area
841 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x66+((ch%2)*0x80), 0x81 ); // Ch_X Rx Signal enhance
842 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x69+((ch%2)*0x80), 0x2D ); // Ch_X Rx Manual duty
843 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x60+((ch%2)*0x80), 0x55 ); // Ch_X Rx Header matching
844 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x61+((ch%2)*0x80), 0x00 ); // Ch_X Rx data_rz
845 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x68+((ch%2)*0x80), 0x80 ); // Ch_X Rx SZ
846
847 if(gpio_i2c_read( nvp6158_iic_addr[devnum], 0x57+((ch%2)*0x80) ) == 0x02) {
848 /* get status, If the status is 0x00(Camera information), 0x01(Firmware version */
849 if(gpio_i2c_read( nvp6158_iic_addr[devnum], 0x56+((ch%2)*0x80) ) == 0x00) {
850 printk(">>>>> DRV[%s:%d]CH:%d Receive ISP status : [READY]\n", __func__, __LINE__, ch );
851 ret = FW_SUCCESS;
852 }
853 } else {
854 retval = gpio_i2c_read( nvp6158_iic_addr[devnum], 0x56+((ch%2)*0x80) );
855 retval2 = gpio_i2c_read( nvp6158_iic_addr[devnum], 0x57+((ch%2)*0x80) );
856 printk(">>>>> DRV[%s:%d]CH:%d retry : Receive ISP status[READY], [0x56-true[0x00]:0x%x], [0x57-true[0x02]:0x%x]\n",
857 __func__, __LINE__, ch, retval, retval2 );
858 ret = FW_FAILURE;
859 }
860
861 /* Rx Buffer clear */
862 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2));
863 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x3A+((ch%2)*0x80), 0x01);
864 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x3A+((ch%2)*0x80), 0x00);
865
866 pstFileInfo->result = ret;
867 }
868
869 /**************************************************************************************
870 * @desc
871 * RAPTOR3's FW start command send to camera ( change to black pattern )
872 *
873 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
874 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->cp_mode Camera Format
875 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Function execution result
876 *
877 * @return void None
878 *
879 * ioctl : IOC_VDEC_COAX_FW_START_CMD_SET
880 ***************************************************************************************/
nvp6158_coax_fw_start_cmd_to_isp_send(void * p_param)881 void nvp6158_coax_fw_start_cmd_to_isp_send(void *p_param)
882 {
883 int ch = 0;
884 int devnum = 0;
885
886 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
887
888 ch = pstFileInfo->channel;
889 devnum = pstFileInfo->channel/4;
890
891 /* Adjust Tx */
892 gpio_i2c_write( nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2) );
893 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x00+((ch%2)*0x80), 0x2D); // Duty
894 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x03+((ch%2)*0x80), 0x0D); // line
895 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x05+((ch%2)*0x80), 0x03); // tx_line_count
896 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x0A+((ch%2)*0x80), 0x04); // tx_line_count_max
897
898 // Tx Command set
899 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x10+((ch%2)*0x80), 0x60); // Register Write Control - 17th line
900 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x11+((ch%2)*0x80), 0xB0); // table(Mode Change Command) - 18th line
901 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x12+((ch%2)*0x80), 0x02); // Flash Update Mode(big data) - 19th line
902 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x13+((ch%2)*0x80), 0x40); // Start firmware update - 20th line
903
904 // Tx Command Shot
905 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x09+((ch%2)*0x80), 0x08); // trigger on
906 msleep(200);
907 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x09+((ch%2)*0x80), 0x10); // reset
908 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x09+((ch%2)*0x80), 0x00); // trigger Off
909
910 printk(">>>>> DRV[%s:%d]CH:%d >> Send command[START]\n", __func__, __LINE__, ch );
911
912 }
913
914 /**************************************************************************************
915 * @desc
916 * RAPTOR3's FW Start ACK receive from camera
917 *
918 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
919 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->cp_mode Camera Format
920 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Function execution result
921 *
922 * @return void None
923 *
924 * ioctl : IOC_VDEC_COAX_FW_START_ACK_GET
925 ***************************************************************************************/
nvp6158_coax_fw_start_cmd_ack_from_isp_recv(void * p_param)926 void nvp6158_coax_fw_start_cmd_ack_from_isp_recv( void *p_param )
927 {
928 int ch = 0;
929 int devnum = 0;
930 int ret = FW_FAILURE;
931
932 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
933 ch = pstFileInfo->channel;
934 devnum = pstFileInfo->channel/4;
935
936 /* Adjust Rx FHD@25P */
937 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2));
938 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x63+((ch%2)*0x80), 0x01 ); // Ch_X Rx ON
939 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x62+((ch%2)*0x80), 0x05 ); // Ch_X Rx Area
940 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x66+((ch%2)*0x80), 0x81 ); // Ch_X Rx Signal enhance
941 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x69+((ch%2)*0x80), 0x2D ); // Ch_X Rx Manual duty
942 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x60+((ch%2)*0x80), 0x55 ); // Ch_X Rx Header matching
943 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x61+((ch%2)*0x80), 0x00 ); // Ch_X Rx data_rz
944 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x68+((ch%2)*0x80), 0x80 ); // Ch_X Rx SZ
945
946 if( gpio_i2c_read( nvp6158_iic_addr[devnum], 0x57+((ch%2)*0x80) ) == 0x02) {
947 if( gpio_i2c_read( nvp6158_iic_addr[devnum], 0x56+((ch%2)*0x80) ) == 0x00) {
948 printk(">>>>> DRV[%s:%d]CH:%d Receive ISP status : [START]\n", __func__, __LINE__, ch );
949 ret = FW_SUCCESS;
950 } else {
951 unsigned char retval1;
952 unsigned char retval2;
953 gpio_i2c_write( nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2));
954 retval1 = gpio_i2c_read( nvp6158_iic_addr[devnum], 0x56+((ch%2)*0x80) );
955 retval2 = gpio_i2c_read( nvp6158_iic_addr[devnum], 0x57+((ch%2)*0x80) );
956 ret = FW_FAILURE;
957 printk(">>>>> DRV[%s:%d]CH:%d retry : Receive ISP status[START], [0x56-true[0x02]:0x%x], [0x57-true[0x02]:0x%x]\n",
958 __func__, __LINE__, ch, retval1, retval2 );
959 }
960 }
961
962 /* Rx Buffer clear */
963 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2));
964 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x3A+((ch%2)*0x80), 0x01);
965 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x3A+((ch%2)*0x80), 0x00);
966
967 pstFileInfo->result = ret;
968 }
969
970 /**************************************************************************************
971 * @desc
972 * RAPTOR3's FW Data send to camera(One packet data size 139byte)
973 *
974 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
975 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->readsize One packet data size
976 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->currentFileOffset File offset
977 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Function execution result
978 *
979 * @return void None
980 *
981 * ioctl : IOC_VDEC_COAX_FW_SEND_DATA_SET
982 ***************************************************************************************/
nvp6158_coax_fw_one_packet_data_to_isp_send(void * p_param)983 void nvp6158_coax_fw_one_packet_data_to_isp_send( void *p_param )
984 {
985 int ch = 0;
986 int devnum = 0;
987 int ii = 0;
988 unsigned int low = 0x00;
989 unsigned int mid = 0x00;
990 unsigned int high = 0x00;
991 unsigned int readsize = 0;
992 int byteNumOfPacket = 0;
993 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
994
995 /* file information */
996 ch = pstFileInfo->channel;
997 readsize = pstFileInfo->readsize;
998 devnum = pstFileInfo->channel/4;
999
1000 /* fill packet(139bytes), end packet is filled with 0xff */
1001 gpio_i2c_write( nvp6158_iic_addr[devnum], 0xff, 0x0c+(ch%4) );
1002 for( ii = 0; ii < 139; ii++ ) {
1003 if( byteNumOfPacket < readsize) {
1004 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x00+ii, pstFileInfo->onepacketbuf[ii] );
1005 byteNumOfPacket++;
1006 } else if( byteNumOfPacket >= readsize ) {// end packet : fill 0xff
1007 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x00+ii, 0xff );
1008 byteNumOfPacket++;
1009 }
1010
1011 if( ii == 0 )
1012 low = pstFileInfo->onepacketbuf[ii];
1013 else if( ii == 1 )
1014 mid = pstFileInfo->onepacketbuf[ii];
1015 else if( ii == 2 )
1016 high = pstFileInfo->onepacketbuf[ii];
1017 }
1018
1019 /* offset */
1020 pstFileInfo->currentFileOffset = (unsigned int)((high << 16 )&(0xFF0000)) |
1021 (unsigned int)((mid << 8 )&(0xFF00)) | (unsigned char)(low);
1022
1023 /* Tx Change mode to use Big data */
1024 gpio_i2c_write( nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2) );
1025 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x0B+((ch%2)*0x80), 0x30);
1026 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x05+((ch%2)*0x80), 0x8A);
1027
1028 /* Tx Shot */
1029 gpio_i2c_write( nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2) );
1030 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x09+((ch%2)*0x80), 0x08); // trigger on
1031 }
1032
1033 /**************************************************************************************
1034 * @desc
1035 * RAPTOR3's FW Data ACK receive from camera
1036 *
1037 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
1038 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->currentFileOffset File offset
1039
1040 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Function execution result
1041 *
1042 * @return void None
1043 *
1044 * ioctl : IOC_VDEC_COAX_FW_SEND_ACK_GET
1045 ***************************************************************************************/
nvp6158_coax_fw_one_packet_data_ack_from_isp_recv(void * p_param)1046 void nvp6158_coax_fw_one_packet_data_ack_from_isp_recv( void *p_param )
1047 {
1048 int ret = FW_FAILURE;
1049 int ch = 0;
1050 int devnum = 0;
1051 unsigned int onepacketaddr = 0;
1052 unsigned int receive_addr = 0;
1053
1054 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
1055 ch = pstFileInfo->channel;
1056 onepacketaddr = pstFileInfo->currentFileOffset;
1057 devnum = pstFileInfo->channel/4;
1058
1059 /* Adjust Rx FHD@25P */
1060 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2));
1061 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x63+((ch%2)*0x80), 0x01 ); // Ch_X Rx ON
1062 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x62+((ch%2)*0x80), 0x05 ); // Ch_X Rx Area
1063 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x66+((ch%2)*0x80), 0x81 ); // Ch_X Rx Signal enhance
1064 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x69+((ch%2)*0x80), 0x2D ); // Ch_X Rx Manual duty
1065 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x60+((ch%2)*0x80), 0x55 ); // Ch_X Rx Header matching
1066 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x61+((ch%2)*0x80), 0x00 ); // Ch_X Rx data_rz
1067 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x68+((ch%2)*0x80), 0x80 ); // Ch_X Rx SZ
1068
1069 if( gpio_i2c_read( nvp6158_iic_addr[devnum], 0x57+((ch%2)*0x80) ) == 0x02 ) {
1070 /* check ISP status - only check first packet */
1071 if( pstFileInfo->currentpacketnum == 0 ) {
1072 if( gpio_i2c_read( nvp6158_iic_addr[devnum], 0x56+((ch%2)*0x80) ) == 0x03 ) {
1073 pstFileInfo->result = FW_FAILURE;
1074 printk(">>>>> DRV[%s:%d] CH:%d, Failed, error status, code=3..................\n",
1075 __func__, __LINE__, ch );
1076 return;
1077 }
1078 }
1079
1080 /* check offset */
1081 receive_addr = (( gpio_i2c_read( nvp6158_iic_addr[devnum], 0x53+((ch%2)*0x80))<<16) + \
1082 (gpio_i2c_read( nvp6158_iic_addr[devnum], 0x54+((ch%2)*0x80))<<8) +
1083 gpio_i2c_read( nvp6158_iic_addr[devnum], 0x55+((ch%2)*0x80)));
1084 if( onepacketaddr == receive_addr ) {
1085 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x09+((ch%2)*0x80), 0x10); // Reset
1086 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x09+((ch%2)*0x80), 0x00); // trigger off
1087 ret = FW_SUCCESS;
1088 pstFileInfo->receive_addr = receive_addr;
1089 pstFileInfo->result = ret;
1090 }
1091 }
1092
1093 pstFileInfo->result = ret;
1094 }
1095
1096 /**************************************************************************************
1097 * @desc
1098 * RAPTOR3's FW End command send to camera
1099 *
1100 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
1101 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->result FW Data send result
1102 *
1103 * @return void None
1104 *
1105 * ioctl : IOC_VDEC_COAX_FW_END_CMD_SET
1106 ***************************************************************************************/
nvp6158_coax_fw_end_cmd_to_isp_send(void * p_param)1107 void nvp6158_coax_fw_end_cmd_to_isp_send(void *p_param)
1108 {
1109 int ch = 0;
1110 int devnum = 0;
1111 int send_success = 0;
1112
1113 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
1114
1115 ch = pstFileInfo->channel;
1116 send_success = pstFileInfo->result;
1117 devnum = pstFileInfo->channel/4;
1118
1119 /* adjust Tx line */
1120 gpio_i2c_write( nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2) );
1121 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x00+((ch%2)*0x80), 0x2D); // Duty
1122 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x0B+((ch%2)*0x80), 0x10); // Tx_Mode
1123 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x03+((ch%2)*0x80), 0x0D); // line
1124 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x05+((ch%2)*0x80), 0x03); // Tx_Line Count 3 line number
1125 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x0A+((ch%2)*0x80), 0x03); // Tx Total Line Count 3 line number
1126
1127 /* Fill end command */
1128 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x10+((ch%2)*0x80), 0x60);
1129 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x11+((ch%2)*0x80), 0xb0);
1130 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x12+((ch%2)*0x80), 0x02);
1131 if( send_success == FW_FAILURE ) {
1132 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x13+((ch%2)*0x80), 0xE0/*0xC0*/);
1133 printk(">>>>> DRV[%s:%d] CH:%d, Camera UPDATE error signal. send Abnormal ending!\n",
1134 __func__, __LINE__, ch );
1135 } else {
1136 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x13+((ch%2)*0x80), 0x80/*0x60*/);
1137 printk(">>>>> DVR[%s:%d] CH:%d, Camera UPDATE ending signal. wait please!\n",
1138 __func__, __LINE__, ch );
1139 }
1140
1141 /* Shot */
1142 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x09+((ch%2)*0x80), 0x08);
1143 msleep(400);
1144 gpio_i2c_write( nvp6158_iic_addr[devnum], 0x09+((ch%2)*0x80), 0x00);
1145
1146 }
1147
1148 /**************************************************************************************
1149 * @desc
1150 * RAPTOR3's FW End command ACK receive from camera
1151 *
1152 * @param_in (FIRMWARE_UP_FILE_INFO *)p_param->channel FW Update channel
1153 *
1154 * @param_out (FIRMWARE_UP_FILE_INFO *)p_param->result Function execution result
1155 *
1156 * @return void None
1157 *
1158 * ioctl : IOC_VDEC_COAX_FW_END_ACK_GET
1159 ***************************************************************************************/
nvp6158_coax_fw_end_cmd_ack_from_isp_recv(void * p_param)1160 void nvp6158_coax_fw_end_cmd_ack_from_isp_recv(void *p_param)
1161 {
1162 int ch = 0;
1163 int devnum = 0;
1164
1165 unsigned char videofm = 0x00;
1166 unsigned char ack_return = 0x00;
1167 unsigned char isp_status = 0x00;
1168 FIRMWARE_UP_FILE_INFO *pstFileInfo = (FIRMWARE_UP_FILE_INFO*)p_param;
1169
1170 ch = pstFileInfo->channel;
1171 devnum = pstFileInfo->channel/4;
1172
1173 /* check video format(video loss), 0:videoloss, 1:video on */
1174 gpio_i2c_write( nvp6158_iic_addr[devnum], 0xFF, 0x05+(ch%4));
1175 videofm = gpio_i2c_read( nvp6158_iic_addr[devnum], 0xF0);
1176
1177 if( videofm == 0xFF ) {
1178 printk(">>>>> DRV[%s:%d] Final[CH:%d], No video[END]!\n", __func__, __LINE__, ch );
1179 pstFileInfo->result = FW_FAILURE;
1180 return;
1181 }
1182
1183 /* Adjust Rx FHD@25P */
1184 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2));
1185 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x63+((ch%2)*0x80), 0x01 ); // Ch_X Rx ON
1186 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x62+((ch%2)*0x80), 0x05 ); // Ch_X Rx Area
1187 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x66+((ch%2)*0x80), 0x81 ); // Ch_X Rx Signal enhance
1188 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x69+((ch%2)*0x80), 0x2D ); // Ch_X Rx Manual duty
1189 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x60+((ch%2)*0x80), 0x55 ); // Ch_X Rx Header matching
1190 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x61+((ch%2)*0x80), 0x00 ); // Ch_X Rx data_rz
1191 gpio_i2c_write(nvp6158_iic_addr[devnum], 0x68+((ch%2)*0x80), 0x80 ); // Ch_X Rx SZ
1192
1193 /* get status, If the ack_return(0x56) is 0x05(completed writing f/w file to isp's flash) */
1194 gpio_i2c_write( nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2));
1195 ack_return = gpio_i2c_read( nvp6158_iic_addr[devnum], 0x56+((ch%2)*0x80) );
1196 isp_status = gpio_i2c_read( nvp6158_iic_addr[devnum], 0x57+((ch%2)*0x80) );
1197 if( isp_status == 0x02 && ack_return == 0x05 ) {
1198 printk(">>>>> DRV[%s:%d]CH:%d Receive ISP status : [END]\n", __func__, __LINE__, ch );
1199 pstFileInfo->result = FW_SUCCESS;
1200 return;
1201 } else {
1202 printk(">>>>> DRV[%s:%d]CH:%d retry : Receive ISP status[END], [0x56-true[0x05]:0x%x], [0x57-true[0x02]:0x%x]\n",
1203 __func__, __LINE__, ch, ack_return, isp_status );
1204 pstFileInfo->result = FW_FAILURE;
1205 return;
1206 }
1207
1208 }
1209
1210 /*=======================================================================================================
1211 * Coaxial protocol Support option function
1212 *
1213 ========================================================================================================*/
1214 /**************************************************************************************
1215 * @desc
1216 * RAPTOR3's RT/NRT Mode change
1217 *
1218 * @param_in (NC_VD_COAX_Tx_Init_STR *)p_param->channel Coax read channel
1219 *
1220 * @return void None
1221 *
1222 * ioctl : IOC_VDEC_COAX_TEST_TX_INIT_DATA_READ
1223 ***************************************************************************************/
nvp6158_coax_option_rt_nrt_mode_change_set(void * p_param)1224 void nvp6158_coax_option_rt_nrt_mode_change_set(void *p_param)
1225 {
1226 NC_VD_COAX_STR *coax_val = (NC_VD_COAX_STR*)p_param;
1227
1228 unsigned char ch = coax_val->ch;
1229 unsigned char param = coax_val->param;
1230 unsigned char fmtdef = coax_val->vivo_fmt;
1231 unsigned char tx_line = 0;
1232 unsigned char tx_line_max = 0;
1233 //
1234 gpio_i2c_write(nvp6158_iic_addr[coax_val->vd_dev], 0xFF, 0x03+((ch%4)/2));
1235
1236 tx_line = gpio_i2c_read( nvp6158_iic_addr[coax_val->vd_dev], 0x05+((ch%2)*0x80) );
1237 tx_line_max = gpio_i2c_read( nvp6158_iic_addr[coax_val->vd_dev], 0x0A+((ch%2)*0x80) );
1238
1239 // Adjust Tx
1240 if( fmtdef == AHD30_3M_30P || fmtdef == AHD30_3M_25P || fmtdef == AHD30_3M_18P ||
1241 fmtdef == AHD30_4M_30P || fmtdef == AHD30_4M_25P || fmtdef == AHD30_4M_15P ||
1242 fmtdef == AHD30_5M_12_5P || fmtdef == AHD30_5M_20P) { // 3M Upper Format
1243 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x05+((ch%2)*0x80), 0x07); // Tx line set
1244 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x0A+((ch%2)*0x80), 0x08); // Tx max line set
1245 } else {// 3M Under Format
1246 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x05+((ch%2)*0x80), 0x03); // Tx line set
1247 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x0A+((ch%2)*0x80), 0x04); // Tx max line set
1248 }
1249
1250 if( param == 0 ) {// RT Mode
1251 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x10+((ch%2)*0x80), 0x60); // Register write
1252 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x11+((ch%2)*0x80), 0xb1); // Output command
1253 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x12+((ch%2)*0x80), 0x00); // RT Mode
1254 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x13+((ch%2)*0x80), 0x00);
1255 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x14+((ch%2)*0x80), 0x00);
1256 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x15+((ch%2)*0x80), 0x00);
1257 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x16+((ch%2)*0x80), 0x00);
1258 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x17+((ch%2)*0x80), 0x00);
1259 } else if( param == 1 ) {// NRT Mode
1260 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x10+((ch%2)*0x80), 0x60); // Register write
1261 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x11+((ch%2)*0x80), 0xb1); // Output command
1262 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x12+((ch%2)*0x80), 0x01); // NRT Mode
1263 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x13+((ch%2)*0x80), 0x00);
1264 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x14+((ch%2)*0x80), 0x00);
1265 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x15+((ch%2)*0x80), 0x00);
1266 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x16+((ch%2)*0x80), 0x00);
1267 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x17+((ch%2)*0x80), 0x00);
1268 } else if( param == 2 ) {// AHD 5M 20P
1269 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x10+((ch%2)*0x80), 0x60); // Register write
1270 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x11+((ch%2)*0x80), 0xb1); // Output command
1271 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x12+((ch%2)*0x80), 0x02); // Change Format
1272 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x13+((ch%2)*0x80), 0x00); // AHD 5M 20P
1273 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x14+((ch%2)*0x80), 0x00);
1274 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x15+((ch%2)*0x80), 0x00);
1275 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x16+((ch%2)*0x80), 0x00);
1276 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x17+((ch%2)*0x80), 0x00);
1277 } else if( param == 3 ) {// AHD 5M 12.5P
1278 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x10+((ch%2)*0x80), 0x60); // Register write
1279 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x11+((ch%2)*0x80), 0xb1); // Output command
1280 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x12+((ch%2)*0x80), 0x02); // Change Format
1281 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x13+((ch%2)*0x80), 0x01); // AHD 5M 12.5P
1282 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x14+((ch%2)*0x80), 0x00);
1283 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x15+((ch%2)*0x80), 0x00);
1284 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x16+((ch%2)*0x80), 0x00);
1285 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x17+((ch%2)*0x80), 0x00);
1286 } else if( param == 4 ) {// AHD 4M 30P
1287 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x10+((ch%2)*0x80), 0x60); // Register write
1288 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x11+((ch%2)*0x80), 0xb1); // Output command
1289 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x12+((ch%2)*0x80), 0x02); // Change Format
1290 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x13+((ch%2)*0x80), 0x02); // AHD 4M 30P
1291 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x14+((ch%2)*0x80), 0x00);
1292 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x15+((ch%2)*0x80), 0x00);
1293 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x16+((ch%2)*0x80), 0x00);
1294 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x17+((ch%2)*0x80), 0x00);
1295 } else if( param == 5 ) {// AHD 4M 25P
1296 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x10+((ch%2)*0x80), 0x60); // Register write
1297 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x11+((ch%2)*0x80), 0xb1); // Output command
1298 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x12+((ch%2)*0x80), 0x02); // Change Format
1299 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x13+((ch%2)*0x80), 0x03); // AHD 4M 25P
1300 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x14+((ch%2)*0x80), 0x00);
1301 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x15+((ch%2)*0x80), 0x00);
1302 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x16+((ch%2)*0x80), 0x00);
1303 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x17+((ch%2)*0x80), 0x00);
1304 } else if( param == 6 ) {// AHD 4M 15P
1305 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x10+((ch%2)*0x80), 0x60); // Register write
1306 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x11+((ch%2)*0x80), 0xb1); // Output command
1307 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x12+((ch%2)*0x80), 0x02); // Change Format
1308 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x13+((ch%2)*0x80), 0x04); // AHD 4M 15P
1309 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x14+((ch%2)*0x80), 0x00);
1310 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x15+((ch%2)*0x80), 0x00);
1311 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x16+((ch%2)*0x80), 0x00);
1312 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x17+((ch%2)*0x80), 0x00);
1313 }
1314
1315 // Tx Command Shot
1316 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x09+((ch%2)*0x80), 0x08); // trigger on
1317 msleep(300);
1318 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x09+((ch%2)*0x80), 0x10); // reset
1319 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x09+((ch%2)*0x80), 0x00); // trigger Off
1320
1321 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x05+((ch%2)*0x80), tx_line); // Tx line set
1322 gpio_i2c_write( nvp6158_iic_addr[coax_val->vd_dev], 0x0A+((ch%2)*0x80), tx_line_max); // Tx max line set
1323
1324 }
1325
1326 /*=======================================================================================================
1327 * Coaxial protocol test function
1328 *
1329 ========================================================================================================*/
1330 /**************************************************************************************
1331 * @desc
1332 * RAPTOR3's Test function. Read coax Tx initialize value
1333 *
1334 * @param_in (NC_VD_COAX_Tx_Init_STR *)p_param->channel Coax read channel
1335 *
1336 * @return void None
1337 *
1338 * ioctl : IOC_VDEC_COAX_TEST_TX_INIT_DATA_READ
1339 ***************************************************************************************/
nvp6158_coax_test_tx_init_read(NC_VD_COAX_TEST_STR * coax_tx_mode)1340 void nvp6158_coax_test_tx_init_read(NC_VD_COAX_TEST_STR *coax_tx_mode)
1341 {
1342 //int ch = coax_tx_mode->ch;
1343 //int devnum = coax_tx_mode->chip_num;
1344
1345 int ch = 0;
1346 int devnum = 0;
1347
1348 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x05+ch%4);
1349 coax_tx_mode->rx_src = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x7C);
1350 coax_tx_mode->rx_slice_lev = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x7D);
1351
1352 gpio_i2c_write(nvp6158_iic_addr[devnum], 0xFF, 0x03+((ch%4)/2));
1353 coax_tx_mode->tx_baud = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x00+((ch%2)*0x80));
1354 coax_tx_mode->tx_pel_baud = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x02+((ch%2)*0x80));
1355 coax_tx_mode->tx_line_pos0 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x03+((ch%2)*0x80));
1356 coax_tx_mode->tx_line_pos1 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x04+((ch%2)*0x80));
1357 coax_tx_mode->tx_line_count = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x05+((ch%2)*0x80));
1358 coax_tx_mode->tx_pel_line_pos0 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x07+((ch%2)*0x80));
1359 coax_tx_mode->tx_pel_line_pos1 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x08+((ch%2)*0x80));
1360 coax_tx_mode->tx_line_count_max = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x0A+((ch%2)*0x80));
1361 coax_tx_mode->tx_mode = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x0B+((ch%2)*0x80));
1362 coax_tx_mode->tx_sync_pos0 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x0D+((ch%2)*0x80));
1363 coax_tx_mode->tx_sync_pos1 = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x0E +((ch%2)*0x80));
1364 coax_tx_mode->tx_even = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x2F+((ch%2)*0x80));
1365 coax_tx_mode->tx_zero_length = gpio_i2c_read(nvp6158_iic_addr[devnum], 0x0C+((ch%2)*0x80));
1366 }
1367
1368 /**************************************************************************************
1369 * @desc
1370 * RAPTOR3's Test function. bank, address, value setting. get from application
1371 *
1372 * @param_in (NC_VD_COAX_TEST_STR *)coax_data Coax Tx setting value
1373 *
1374 * @return void None
1375 *
1376 * ioctl : IOC_VDEC_COAX_TEST_DATA_SET
1377 ***************************************************************************************/
nvp6158_coax_test_data_set(NC_VD_COAX_TEST_STR * coax_data)1378 void nvp6158_coax_test_data_set(NC_VD_COAX_TEST_STR *coax_data)
1379 {
1380 unsigned char temp_reg;
1381 printk("[DRV_Set]bank(0x%02X)/addr(0x%02X)/param(0x%02X)\n",
1382 coax_data->bank, coax_data->data_addr, coax_data->param );
1383
1384 gpio_i2c_write(nvp6158_iic_addr[coax_data->chip_num], 0xFF, coax_data->bank);
1385
1386 if(coax_data->bank == 0x01 && coax_data->data_addr == 0xED) {
1387 temp_reg = gpio_i2c_read(nvp6158_iic_addr[coax_data->chip_num], coax_data->data_addr);
1388 temp_reg = ((temp_reg & ~(0x01 << coax_data->param)) | (0x01 << coax_data->param));
1389 } else if(coax_data->bank == 0x01 && coax_data->data_addr == 0x7A) {
1390 temp_reg = gpio_i2c_read(nvp6158_iic_addr[coax_data->chip_num], coax_data->data_addr);
1391 temp_reg = (temp_reg & ~(0x01 << coax_data->param));
1392 } else if(coax_data->bank == 0x09 && coax_data->data_addr == 0x44) {
1393 temp_reg = gpio_i2c_read(nvp6158_iic_addr[coax_data->chip_num], coax_data->data_addr);
1394 temp_reg = ((temp_reg & ~(0x01 << coax_data->param)) | (0x01 << coax_data->param));
1395 }
1396 else
1397 temp_reg = coax_data->param ;
1398
1399 gpio_i2c_write(nvp6158_iic_addr[coax_data->chip_num], coax_data->data_addr, temp_reg );
1400 }
1401
1402 /**************************************************************************************
1403 * @desc
1404 * RAPTOR3's Test function. Read value bank, address, value. To application
1405 *
1406 * @param_in (NC_VD_COAX_TEST_STR *)coax_data Coax read channel
1407 *
1408 * @return void None
1409 *
1410 * ioctl : IOC_VDEC_COAX_TEST_DATA_READ
1411 ***************************************************************************************/
nvp6158_coax_test_data_get(NC_VD_COAX_TEST_STR * coax_data)1412 void nvp6158_coax_test_data_get(NC_VD_COAX_TEST_STR *coax_data)
1413 {
1414 gpio_i2c_write(nvp6158_iic_addr[coax_data->chip_num], 0xFF, coax_data->bank);
1415 coax_data->param = gpio_i2c_read(nvp6158_iic_addr[coax_data->chip_num], coax_data->data_addr);
1416 printk("[DRV_Get]bank(0x%02X), addr(0x%02X), param(0x%02X)\n",
1417 coax_data->bank, coax_data->data_addr, coax_data->param );
1418 }
1419
1420 /**************************************************************************************
1421 * @desc
1422 * RAPTOR3's Test function. Bank Dump To application
1423 *
1424 * @param_in (NC_VD_COAX_BANK_DUMP_STR *)coax_data Coax read channel
1425 *
1426 * @return void None
1427 *
1428 * ioctl : IOC_VDEC_COAX_TEST_DATA_READ
1429 ***************************************************************************************/
nvp6158_coax_test_Bank_dump_get(NC_VD_COAX_BANK_DUMP_STR * coax_data)1430 void nvp6158_coax_test_Bank_dump_get(NC_VD_COAX_BANK_DUMP_STR *coax_data)
1431 {
1432 int ii = 0;
1433
1434 gpio_i2c_write(nvp6158_iic_addr[coax_data->vd_dev], 0xFF, coax_data->bank);
1435
1436 for(ii=0; ii<256; ii++) {
1437 coax_data->rx_pelco_data[ii] = gpio_i2c_read(nvp6158_iic_addr[coax_data->vd_dev], 0x00+ii);
1438 }
1439 }
1440
1441
1442 /*******************************************************************************
1443 * Description : read acp data of ISP
1444 * Argurments : ch(channel ID), reg_addr(high[1byte]:bank, low[1byte]:register)
1445 * Return value : void
1446 * Modify :
1447 * warning :
1448 *******************************************************************************/
nvp6158_coax_acp_isp_read(unsigned char ch,unsigned int reg_addr)1449 unsigned char nvp6158_coax_acp_isp_read(unsigned char ch, unsigned int reg_addr)
1450 {
1451 unsigned int data_3x50[8];
1452 unsigned char lcnt_bak, lcntm_bak, crc_bak;
1453 unsigned char bank;
1454 unsigned char addr;
1455 int i;
1456
1457 bank = (reg_addr>>8)&0xFF;
1458 addr = reg_addr&0xFF;
1459
1460 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0xFF, 0x03+((ch%4)/2));
1461 lcnt_bak = gpio_i2c_read(nvp6158_iic_addr[ch/4], 0x05+((ch%2)*0x80));
1462 lcntm_bak = gpio_i2c_read(nvp6158_iic_addr[ch/4], 0x0A+((ch%2)*0x80));
1463 crc_bak = gpio_i2c_read(nvp6158_iic_addr[ch/4], 0x60+((ch%2)*0x80));
1464 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x05+((ch%2)*0x80), 0x03);
1465 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x0A+((ch%2)*0x80), 0x03);
1466 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x60+((ch%2)*0x80), 0x61);
1467
1468 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0xFF, 0x03+((ch%4)/2));
1469 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x10+(ch%2)*0x80, 0x61);
1470 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x10+1+(ch%2)*0x80, bank);
1471 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x10+2+(ch%2)*0x80, addr);
1472 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x10+3+(ch%2)*0x80, 0x00);
1473 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x09+(ch%2)*0x80, 0x08);
1474 msleep(100);
1475 for(i=0; i<8; i++) {
1476 data_3x50[i] = gpio_i2c_read(nvp6158_iic_addr[ch/4],0x50+i+((ch%2)*0x80));
1477 printk("acp_isp_read ch = %d, reg_addr = %x, reg_data = %x\n", ch,reg_addr, data_3x50[i]);
1478 }
1479 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x05+((ch%2)*0x80), lcnt_bak);
1480 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x0A+((ch%2)*0x80), lcntm_bak);
1481 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x60+((ch%2)*0x80), crc_bak);
1482 gpio_i2c_write( nvp6158_iic_addr[ch/4], 0x09+((ch%2)*0x80), 0x10);
1483 gpio_i2c_write( nvp6158_iic_addr[ch/4], 0x09+((ch%2)*0x80), 0x00);
1484 msleep(100);
1485 //gpio_i2c_write(nvp6158_iic_addr[ch/4], 0xFF, 0x03+((ch%4)/2));
1486 //gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x63+((ch%2)*0x80), 0);
1487
1488 return data_3x50[3];
1489 }
1490
nvp6158_coax_acp_isp_write(unsigned char ch,unsigned int reg_addr,unsigned char reg_data)1491 unsigned char nvp6158_coax_acp_isp_write(unsigned char ch, unsigned int reg_addr, unsigned char reg_data)
1492 {
1493 unsigned int data_3x50[8];
1494 unsigned char lcnt_bak, lcntm_bak, crc_bak;
1495 unsigned char bank;
1496 unsigned char addr;
1497 int i;
1498
1499 bank = (reg_addr>>8)&0xFF;
1500 addr = reg_addr&0xFF;
1501
1502 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0xFF, 0x03+((ch%4)/2));
1503 lcnt_bak = gpio_i2c_read(nvp6158_iic_addr[ch/4], 0x05+((ch%2)*0x80));
1504 lcntm_bak = gpio_i2c_read(nvp6158_iic_addr[ch/4], 0x0A+((ch%2)*0x80));
1505 crc_bak = gpio_i2c_read(nvp6158_iic_addr[ch/4], 0x60+((ch%2)*0x80));
1506 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x05+((ch%2)*0x80), 0x03);
1507 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x0A+((ch%2)*0x80), 0x03);
1508 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x60+((ch%2)*0x80), 0x60);
1509
1510 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0xFF, 0x03+((ch%4)/2));
1511 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x10+(ch%2)*0x80, 0x60);
1512 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x10+1+(ch%2)*0x80, bank);
1513 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x10+2+(ch%2)*0x80, addr);
1514 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x10+3+(ch%2)*0x80, reg_data);
1515 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x09+(ch%2)*0x80, 0x08);
1516 msleep(100);
1517 for(i=0; i<8; i++) {
1518 data_3x50[i] = gpio_i2c_read(nvp6158_iic_addr[ch/4],0x50+i+((ch%2)*0x80));
1519 printk("acp_isp_write ch = %d, reg_addr = %x, reg_data = %x\n", ch,reg_addr, data_3x50[i]);
1520 }
1521 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x05+((ch%2)*0x80), lcnt_bak);
1522 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x0A+((ch%2)*0x80), lcntm_bak);
1523 gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x60+((ch%2)*0x80), crc_bak);
1524 gpio_i2c_write( nvp6158_iic_addr[ch/4], 0x09+((ch%2)*0x80), 0x10);
1525 gpio_i2c_write( nvp6158_iic_addr[ch/4], 0x09+((ch%2)*0x80), 0x00);
1526 //msleep(100);
1527 //gpio_i2c_write(nvp6158_iic_addr[ch/4], 0xFF, 0x03+((ch%4)/2));
1528 //gpio_i2c_write(nvp6158_iic_addr[ch/4], 0x63+((ch%2)*0x80), 0);
1529
1530 return data_3x50[3];
1531 }
1532
1533
1534
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1536
1537