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/OK3568_Linux_fs/u-boot/tools/
H A Dvybridimage.c43 uint8_t bit0 = (byte & (1 << 0)) ? 1 : 0; in vybridimage_sw_ecc() local
55 res |= ((bit7 ^ bit6 ^ bit5 ^ bit1 ^ bit0) << 2); in vybridimage_sw_ecc()
56 res |= ((bit7 ^ bit4 ^ bit3 ^ bit0) << 3); in vybridimage_sw_ecc()
57 res |= ((bit6 ^ bit4 ^ bit3 ^ bit2 ^ bit1 ^ bit0) << 4); in vybridimage_sw_ecc()
/OK3568_Linux_fs/kernel/Documentation/driver-api/mtd/
H A Dnand_ecc.rst45 byte 0: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp2 rp4 ... rp14
46 byte 1: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp2 rp4 ... rp14
47 byte 2: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp3 rp4 ... rp14
48 byte 3: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp3 rp4 ... rp14
49 byte 4: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp2 rp5 ... rp14
51 byte 254: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp3 rp5 ... rp15
52 byte 255: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp3 rp5 ... rp15
63 - cp0 is the parity that belongs to all bit0, bit2, bit4, bit6.
65 so the sum of all bit0, bit2, bit4 and bit6 values + cp0 itself is even.
69 - cp2 is the parity over bit0, bit1, bit4 and bit5
[all …]
/OK3568_Linux_fs/kernel/Documentation/leds/
H A Dleds-mlxcpld.rst53 [bit3,bit2,bit1,bit0] or
98 [bit3,bit2,bit1,bit0] or
110 [bit3,bit2,bit1,bit0]:
/OK3568_Linux_fs/kernel/drivers/input/touchscreen/
H A Dwdt87xx_i2c.c611 u32 bit0; in misr() local
616 bit0 = a ^ (b & 1); in misr()
617 bit0 ^= a >> 1; in misr()
618 bit0 ^= a >> 2; in misr()
619 bit0 ^= a >> 4; in misr()
620 bit0 ^= a >> 5; in misr()
621 bit0 ^= a >> 7; in misr()
622 bit0 ^= a >> 11; in misr()
623 bit0 ^= a >> 15; in misr()
625 y = (y & ~1) | (bit0 & 1); in misr()
/OK3568_Linux_fs/u-boot/board/Seagate/nas220/
H A Dkwbimage.cfg80 # bit0: 0, OpenPage enabled
99 # bit0: 0, DDR DLL enabled
123 # bit0: 1, Window enabled
145 #bit0=1, enable DDR init upon this register write
/OK3568_Linux_fs/u-boot/board/Marvell/guruplug/
H A Dkwbimage.cfg77 # bit0: 0, OpenPage enabled
95 # bit0: 0, DDR DLL enabled
123 # bit0: 1, Window enabled
143 #bit0=1, enable DDR init upon this register write
/OK3568_Linux_fs/u-boot/board/Seagate/dockstar/
H A Dkwbimage.cfg80 # bit0: 0, OpenPage enabled
98 # bit0: 0, DDR DLL enabled
126 # bit0: 1, Window enabled
146 #bit0=1, enable DDR init upon this register write
/OK3568_Linux_fs/u-boot/board/Synology/ds109/
H A Dkwbimage.cfg81 # bit0: 0, OpenPage enabled
99 # bit0: 0, DDR DLL enabled
127 # bit0: 1, Window enabled
149 #bit0=1, enable DDR init upon this register write
/OK3568_Linux_fs/u-boot/board/Marvell/dreamplug/
H A Dkwbimage.cfg78 # bit0: 0, OpenPage enabled
96 # bit0: 0, DDR DLL enabled
124 # bit0: 1, Window enabled
144 #bit0=1, enable DDR init upon this register write
/OK3568_Linux_fs/u-boot/board/Seagate/goflexhome/
H A Dkwbimage.cfg83 # bit0: 0, OpenPage enabled
101 # bit0: 0, DDR DLL enabled
129 # bit0: 1, Window enabled
149 #bit0=1, enable DDR init upon this register write
/OK3568_Linux_fs/u-boot/board/Marvell/sheevaplug/
H A Dkwbimage.cfg77 # bit0: 0, OpenPage enabled
95 # bit0: 0, DDR DLL enabled
123 # bit0: 1, Window enabled
143 #bit0=1, enable DDR init upon this register write
/OK3568_Linux_fs/u-boot/board/iomega/iconnect/
H A Dkwbimage.cfg77 # bit0: 0, OpenPage enabled
95 # bit0: 0, DDR DLL enabled
123 # bit0: 0x1, Window enabled
148 # bit0: 0x1, enable DDR init upon this register write
/OK3568_Linux_fs/u-boot/board/keymile/km_arm/
H A Dkwbimage.cfg98 # bit0: 0, OpenPage enabled
107 # bit0: 0, DDR DLL enabled
134 # bit0: 1, Window enabled
160 # bit0=1, enable DDR init upon this register write
H A Dkwbimage-memphis.cfg101 # bit0: 0, OpenPage enabled
110 # bit0: 0, DDR DLL enabled
149 # bit0: 1, Window enabled
178 # bit0=1, enable DDR init upon this register write
/OK3568_Linux_fs/u-boot/board/Marvell/openrd/
H A Dkwbimage.cfg77 # bit0: 0, OpenPage enabled
95 # bit0: 0, DDR DLL enabled
123 # bit0: 1, Window enabled
149 #bit0=1, enable DDR init upon this register write
/OK3568_Linux_fs/u-boot/board/LaCie/net2big_v2/
H A Dkwbimage.cfg77 # bit0: 0, OpenPage enabled
95 # bit0: 0, DDR DLL enabled
123 # bit0: 1, Window enabled
148 #bit0=1, enable DDR init upon this register write
/OK3568_Linux_fs/u-boot/board/raidsonic/ib62x0/
H A Dkwbimage.cfg78 # bit0: 0, OpenPage enabled
96 # bit0: 0, DDR DLL enabled
124 # bit0: 0x1, Window enabled
149 # bit0: 0x1, enable DDR init upon this register write
/OK3568_Linux_fs/u-boot/board/LaCie/netspace_v2/
H A Dkwbimage-ns2l.cfg77 # bit0: 0, OpenPage enabled
95 # bit0: 0, DDR DLL enabled
123 # bit0: 1, Window enabled
148 #bit0=1, enable DDR init upon this register write
H A Dkwbimage-is2.cfg77 # bit0: 0, OpenPage enabled
95 # bit0: 0, DDR DLL enabled
123 # bit0: 1, Window enabled
148 #bit0=1, enable DDR init upon this register write
H A Dkwbimage.cfg77 # bit0: 0, OpenPage enabled
95 # bit0: 0, DDR DLL enabled
123 # bit0: 1, Window enabled
148 #bit0=1, enable DDR init upon this register write
/OK3568_Linux_fs/u-boot/board/cloudengines/pogo_e02/
H A Dkwbimage.cfg81 # bit0: 0, OpenPage enabled
99 # bit0: 0, DDR DLL enabled
127 # bit0: 1, Window enabled
152 #bit0=1, enable DDR init upon this register write
/OK3568_Linux_fs/u-boot/board/d-link/dns325/
H A Dkwbimage.cfg87 # bit0: 0, OPEn=OpenPage enabled
105 # bit0: 0, DRAM DLL enabled
145 # bit0: 1, Window enabled
153 # bit0: 1, Window enabled
188 # bit0: 1, enable DDR init upon this register write
/OK3568_Linux_fs/u-boot/board/buffalo/lsxl/
H A Dkwbimage-lschl.cfg93 # bit0: 0, OPEn=OpenPage enabled
114 # bit0: 0, DRAM DLL enabled
161 # bit0: 1, Window enabled
209 # bit0: 1, enable DDR init upon this register write
H A Dkwbimage-lsxhl.cfg93 # bit0: 0, OPEn=OpenPage enabled
114 # bit0: 0, DRAM DLL enabled
161 # bit0: 1, Window enabled
209 # bit0: 1, enable DDR init upon this register write
/OK3568_Linux_fs/kernel/drivers/input/touchscreen/focaltech_touch/
H A Dfocaltech_upgrade_ft8201.c64 u16 bit0: 1; member
151 …ecc.bits.bit0 = ecc_last.bits.bit8 ^ ecc_last.bits.bit9 ^ ecc_last.bits.bit10 ^ ecc_last.bits.bit11 in cal_lcdinitcode_ecc()
153 … ^ temp_byte.bits.bit0 ^ temp_byte.bits.bit1 ^ temp_byte.bits.bit2 ^ temp_byte.bits.bit3 in cal_lcdinitcode_ecc()
161 …ecc.bits.bit2 = ecc_last.bits.bit8 ^ ecc_last.bits.bit9 ^ temp_byte.bits.bit0 ^ temp_byte.bits.bit… in cal_lcdinitcode_ecc()
173 …ecc.bits.bit8 = ecc_last.bits.bit0 ^ ecc_last.bits.bit14 ^ ecc_last.bits.bit15 ^ temp_byte.bits.bi… in cal_lcdinitcode_ecc()
189 … ^ temp_byte.bits.bit0 ^ temp_byte.bits.bit1 ^ temp_byte.bits.bit2 ^ temp_byte.bits.bit3 in cal_lcdinitcode_ecc()

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