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Searched refs:PLLE_BASE (Results 1 – 9 of 9) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra30/
H A Dclock.c658 #define PLLE_BASE 0x0e8 macro
713 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
716 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
735 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
749 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
762 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
764 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra20/
H A Dclock.c629 #define PLLE_BASE 0x0e8 macro
684 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
687 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
716 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
718 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra124/
H A Dclock.c943 #define PLLE_BASE 0x0e8 macro
967 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
969 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
994 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
1001 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
1005 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
1007 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra210/
H A Dclock.c1129 #define PLLE_BASE 0x0e8 macro
1183 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
1190 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
1199 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
1201 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
/OK3568_Linux_fs/kernel/drivers/clk/tegra/
H A Dclk-tegra20.c58 #define PLLE_BASE 0xe8 macro
405 .base_reg = PLLE_BASE,
H A Dclk-tegra30.c67 #define PLLE_BASE 0xe8 macro
513 .base_reg = PLLE_BASE,
H A Dclk-tegra114.c69 #define PLLE_BASE 0xe8 macro
561 .base_reg = PLLE_BASE,
H A Dclk-tegra124.c58 #define PLLE_BASE 0xe8 macro
477 .base_reg = PLLE_BASE,
H A Dclk-tegra210.c85 #define PLLE_BASE 0xe8 macro
1920 .base_reg = PLLE_BASE,