Searched refs:MCFSIM_DMR0 (Results 1 – 12 of 12) sorted by relevance
72 mbar_writeLong(MCFSIM_DMR0, 0x01fc0001); in dram_init()
74 #define MCFSIM_DMR0 (MCF_IPSBAR + 0x4c) /* Address mask 0 */ macro84 #define MCFSIM_DMR0 (MCF_IPSBAR + 0x54) /* Address mask 0 */ macro
79 #define MCFSIM_DMR0 (MCF_MBAR + 0x10c) /* DRAM 0 Mask */ macro
56 #define MCFSIM_DMR0 (MCF_MBAR + 0x50) /* DRAM 0 Mask reg (r/w) */ macro
96 #define MCFSIM_DMR0 (MCF_MBAR + 0x10c) /* DRAM Mask 0 */ macro
65 #define MCFSIM_DMR0 (MCF_IPSBAR + 0x4c) /* Address mask 0 */ macro
65 #define MCFSIM_DMR0 (MCF_IPSBAR + 0x0000004c) /* Address mask 0 */ macro
73 #define MCFSIM_DMR0 (MCF_MBAR + 0x10c) /* DRAM 0 Mask */ macro
45 mbar_writeLong(MCFSIM_DMR0, dramsize | 1); in dram_init()
66 #define MCFSIM_DMR0 0x10c /* DRAM 0 Mask reg (r/w) */ macro
49 mbar_writeLong(MCFSIM_DMR0, temp | 1); in dram_init()
45 movel MCFSIM_DMR0,%d0 /* get mask for 1st bank */