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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/devfreq/
H A Drk3399_dmc.txt41 clocks freq is half of DRAM clock), default
58 The controller, pi, PHY and DRAM clock will
72 - rockchip,ddr3_odt_dis_freq : When the DRAM type is DDR3, this parameter defines
75 the ODT on the DRAM side and controller side are
78 - rockchip,ddr3_drv : When the DRAM type is DDR3, this parameter defines
79 the DRAM side driver strength in ohms. Default
82 - rockchip,ddr3_odt : When the DRAM type is DDR3, this parameter defines
83 the DRAM side ODT strength in ohms. Default value
86 - rockchip,phy_ddr3_ca_drv : When the DRAM type is DDR3, this parameter defines
91 - rockchip,phy_ddr3_dq_drv : When the DRAM type is DDR3, this parameter defines
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/OK3568_Linux_fs/rkbin/tools/
H A Dddrbin_tool_user_guide.txt254 phy_ddr*_dq_drv_when_odten_ohm: The PHY DQ/DQS driver strength(write direction) when DRAM odt on. u…
255 phy_ddr*_ca_drv_when_odten_ohm: The PHY CMD/ADDR driver strength when DRAM odt on. unit: ohm.
256 phy_ddr*_clk_drv_when_odten_ohm: The PHY clock driver strength when DRAM odt on. unit: ohm.
257 ddr*_dq_drv_when_odten_ohm: The DRAM DQ/DQS driver strength(read direction) when PHY odt on. unit: …
258 phy_ddr*_dq_drv_when_odtoff_ohm: The PHY DQ/DQS driver strength(write direction) when DRAM odt off.…
259 phy_ddr*_ca_drv_when_odtoff_ohm: The PHY CMD/ADDR driver strength when DRAM odt off. unit: ohm.
260 phy_ddr*_clk_drv_when_odtoff_ohm: The PHY clock driver strength when DRAM odt off. unit: ohm.
261 ddr*_dq_drv_when_odtoff_ohm: The DRAM DQ/DQS driver strength(read direction) when PHY odt off. unit…
291 The DRAM side driver strength support value as follows:
300 ddr*_odt_ohm: The DRAM ODT strength(write direction). unit: ohm.
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/OK3568_Linux_fs/u-boot/board/buffalo/lsxl/
H A Dkwbimage-lschl.cfg114 # bit0: 0, DRAM DLL enabled
115 # bit1: 1, DRAM drive strength reduced
122 # bit12: 0, DRAM output buffer enabled
181 # bit3-0: 0b0000, (read) M_ODT[0] is not asserted during read from DRAM
182 # bit7-4: 0b0000, (read) M_ODT[1] is not asserted during read from DRAM
184 # bit19-16: 0b1100, (write) M_ODT[0] is asserted during write to DRAM CS2, CS3
185 # bit23-20: 0b0011, (write) M_ODT[1] is asserted during write to DRAM CS0, CS1
196 # bit3-0: 0b1111, internal ODT is asserted during read from DRAM bank 0-3
197 # bit7-4: 0b0000, internal ODT is not asserted during write to DRAM bank 0-3
H A Dkwbimage-lsxhl.cfg114 # bit0: 0, DRAM DLL enabled
115 # bit1: 1, DRAM drive strength reduced
122 # bit12: 0, DRAM output buffer enabled
181 # bit3-0: 0b0000, (read) M_ODT[0] is not asserted during read from DRAM
182 # bit7-4: 0b0000, (read) M_ODT[1] is not asserted during read from DRAM
184 # bit19-16: 0b0001, (write) M_ODT[0] is asserted during write to DRAM CS0
185 # bit23-20: 0b0000, (write) M_ODT[1] is not asserted during write to DRAM
196 # bit3-0: 0b1111, internal ODT is asserted during read from DRAM bank 0-3
197 # bit7-4: 0b0000, internal ODT is not asserted during write to DRAM bank 0-3
/OK3568_Linux_fs/u-boot/board/tqc/tqma6/
H A DKconfig17 i.MX6 CPU type and DRAM
23 select TQMa6Q / TQMa6D with i.MX6Q/D and 1GiB DRAM
29 select TQMa6DL with i.MX6DL and 1GiB DRAM
35 select TQMa6S with i.MX6S and 512 MiB DRAM
/OK3568_Linux_fs/u-boot/board/d-link/dns325/
H A Dkwbimage.cfg105 # bit0: 0, DRAM DLL enabled
106 # bit1: 0, DRAM drive strength normal
113 # bit12: 0, DRAM output buffer enabled
163 # bit3-0: 0b0000, (read) M_ODT[0] is not asserted during read from DRAM
164 # bit7-4: 0b0000, (read) M_ODT[1] is not asserted during read from DRAM
166 # bit19-16: 0b0011, (write) M_ODT[0] is asserted during write to DRAM CS0 and CS1
167 # bit23-20: 0b0000, (write) M_ODT[1] is not asserted during write to DRAM
176 # bit3-0: 0b0011, internal ODT is asserted during read from DRAM bank 0-1
177 # bit7-4: 0b0000, internal ODT is not asserted during write to DRAM bank 0-4
/OK3568_Linux_fs/kernel/drivers/memory/tegra/
H A DKconfig16 Tegra20 chips. The EMC controls the external DRAM on the board.
26 Tegra30 chips. The EMC controls the external DRAM on the board.
36 Tegra124 chips. The EMC controls the external DRAM on the board.
50 Tegra210 chips. The EMC controls the external DRAM on the board.
/OK3568_Linux_fs/u-boot/doc/mvebu/
H A Darmada-8k-memory.txt13 0x00000000 0xEFFFFFFF DRAM
55 0x100000000 <DRAM Size>-1 DRAM
/OK3568_Linux_fs/buildroot/board/openblocks/a6/
H A Dreadme.txt28 DRAM (DDR2) CAS Latency = 5 tRP = 5 tRAS = 14 tRCD=5
29 DRAM CS[0] base 0x00000000 size 512MB
30 DRAM Total size 512MB 16bit width
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra210/
H A DKconfig10 E2220-1170 is a Tegra210 bringup board with onboard SoC, DRAM,
19 board. The combination contains SoC, DRAM, eMMC, SD card slot,
28 to a P2597 I/O board. The combination contains SoC, DRAM, eMMC, SD
/OK3568_Linux_fs/u-boot/board/Marvell/openrd/
H A Dkwbimage.cfg136 # bit3-0: 0010, (read) M_ODT[0] is asserted during read from DRAM CS1
137 # bit7-4: 0001, (read) M_ODT[1] is asserted during read from DRAM CS0
138 # bit19-16: 0010, (write) M_ODT[0] is asserted during write to DRAM CS1.
139 # bit23-20: 0001, (write) M_ODT[1] is asserted during write to DRAM CS0.
143 # bit3-0: 1111, internal ODT is asserted during read from DRAM bank 0-3
/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A DKconfig27 int "TPL select DRAM type"
31 This choose DRAM type for TPL INIT code, 0 for DDR4, 2 for DDR2,
/OK3568_Linux_fs/kernel/sound/isa/gus/
H A Dgus_dram.c28 outsb(GUSP(gus, DRAM), buffer, size1); in snd_gus_dram_poke()
64 insb(GUSP(gus, DRAM), buffer, size1); in snd_gus_dram_peek()
/OK3568_Linux_fs/u-boot/board/iomega/iconnect/
H A Dkwbimage.cfg136 # bit3-0: ODT0Rd, MODT[0] asserted during read from DRAM CS1
137 # bit7-4: ODT0Rd, MODT[0] asserted during read from DRAM CS0
138 # bit19-16:2, ODT0Wr, MODT[0] asserted during write to DRAM CS1
139 # bit23-20:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
/OK3568_Linux_fs/u-boot/board/keymile/km_arm/
H A Dkwbimage.cfg145 # bit3-0: 0, ODT0Rd, MODT[0] asserted during read from DRAM CS0
146 # bit19-16:0, ODT0Wr, MODT[0] asserted during write to DRAM CS0
154 # bit3-0: F, ODT0Rd, Internal ODT asserted during read from DRAM bank0
155 # bit7-4: 0, ODT0Wr, Internal ODT asserted during write to DRAM bank0
H A Dkwbimage-memphis.cfg160 # bit3-0: 0, ODT0Rd, MODT[0] not asserted during read from DRAM CS0
161 # bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
169 # bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
170 # bit7-4: 0, ODT0Wr, Internal ODT not asserted during write to DRAM bank0
/OK3568_Linux_fs/u-boot/board/LaCie/net2big_v2/
H A Dkwbimage.cfg134 # bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0
135 # bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
143 # bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
144 # bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0
/OK3568_Linux_fs/u-boot/board/raidsonic/ib62x0/
H A Dkwbimage.cfg137 # bit3-0: ODT0Rd, MODT[0] asserted during read from DRAM CS1
138 # bit7-4: ODT0Rd, MODT[0] asserted during read from DRAM CS0
139 # bit19-16:2, ODT0Wr, MODT[0] asserted during write to DRAM CS1
140 # bit23-20:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
/OK3568_Linux_fs/u-boot/board/LaCie/netspace_v2/
H A Dkwbimage-ns2l.cfg134 # bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0
135 # bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
143 # bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
144 # bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0
H A Dkwbimage-is2.cfg134 # bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0
135 # bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
143 # bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
144 # bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0
H A Dkwbimage.cfg134 # bit3-0: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0
135 # bit19-16:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
143 # bit3-0: 1, ODT0Rd, Internal ODT asserted during read from DRAM bank0
144 # bit7-4: 1, ODT0Wr, Internal ODT asserted during write to DRAM bank0
/OK3568_Linux_fs/u-boot/board/cloudengines/pogo_e02/
H A Dkwbimage.cfg140 # bit3-0: 2, ODT0Rd, MODT[0] asserted during read from DRAM CS1
141 # bit7-4: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0
142 # bit19-16:2, ODT0Wr, MODT[0] asserted during write to DRAM CS1
143 # bit23-20:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0
/OK3568_Linux_fs/kernel/drivers/memory/samsung/
H A DKconfig19 DMC and DRAM. It also supports changing timings of DRAM running with
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/firmware/
H A Dnvidia,tegra210-bpmp.txt6 (suspend to ram), and also offloading DRAM memory clock scaling on
23 - #clock-cells : Should be 1 for platforms where DRAM clock control is
/OK3568_Linux_fs/u-boot/doc/
H A DREADME.mips48 * Due to cache initialization issues, the DRAM on board must be
50 code is run -- that is, initialize the DRAM in lowlevel_init().

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