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Searched refs:dev_num (Results 1 – 25 of 170) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/media/i2c/jaguar1_drv/
H A Djaguar1_mipi.c45 void arb_enable(int dev_num) in arb_enable() argument
47 if((dev_num < 0) || (dev_num > 3)) in arb_enable()
49 printk("[DRV] %s input channel Error (%d)\n",__func__, dev_num); in arb_enable()
53 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xff, 0x20); in arb_enable()
54 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x00, en_param); in arb_enable()
58 void arb_disable(int dev_num) in arb_disable() argument
60 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0xff, 0x20); in arb_disable()
61 gpio_i2c_write(jaguar1_i2c_addr[dev_num], 0x00, 0x00); in arb_disable()
64 void arb_init(int dev_num) in arb_init() argument
66 arb_disable(dev_num); in arb_init()
[all …]
H A Djaguar1_mipi.h33 void arb_init(int dev_num);
34 void arb_enable(int dev_num);
35 void arb_disable(int dev_num);
37 void mipi_tx_init(int dev_num);
39 void disable_parallel(int dev_num);
/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training.c85 static int ddr3_tip_ddr3_training_main_flow(u32 dev_num);
86 static int ddr3_tip_write_odt(u32 dev_num, enum hws_access_type access_type,
88 static int ddr3_tip_ddr3_auto_tune(u32 dev_num);
89 static int is_bus_access_done(u32 dev_num, u32 if_id,
92 static int odt_test(u32 dev_num, enum hws_algo_type algo_type);
95 int adll_calibration(u32 dev_num, enum hws_access_type access_type,
97 static int ddr3_tip_set_timing(u32 dev_num, enum hws_access_type access_type,
181 static int ddr3_tip_bus_access(u32 dev_num, enum hws_access_type interface_access,
185 static int ddr3_tip_pad_inv(u32 dev_num, u32 if_id);
186 static int ddr3_tip_rank_control(u32 dev_num, u32 if_id);
[all …]
H A Dddr3_training_leveling.c28 static int ddr3_tip_dynamic_write_leveling_seq(u32 dev_num);
29 static int ddr3_tip_dynamic_read_leveling_seq(u32 dev_num);
30 static int ddr3_tip_dynamic_per_bit_read_leveling_seq(u32 dev_num);
31 static int ddr3_tip_wl_supp_align_err_shift(u32 dev_num, u32 if_id, u32 bus_id,
33 static int ddr3_tip_wl_supp_align_phase_shift(u32 dev_num, u32 if_id,
36 static int ddr3_tip_xsb_compare_test(u32 dev_num, u32 if_id, u32 bus_id,
38 static int ddr3_tip_wl_supp_one_clk_err_shift(u32 dev_num, u32 if_id,
62 int ddr3_tip_dynamic_read_leveling(u32 dev_num, u32 freq) in ddr3_tip_dynamic_read_leveling() argument
84 dev_num, ACCESS_TYPE_MULTICAST, in ddr3_tip_dynamic_read_leveling()
88 dev_num, ACCESS_TYPE_MULTICAST, in ddr3_tip_dynamic_read_leveling()
[all …]
H A Dddr3_training_ip_prv_if.h24 typedef int (*HWS_TIP_DUNIT_MUX_SELECT_FUNC_PTR)(u8 dev_num, int enable);
26 u8 dev_num, enum hws_access_type interface_access, u32 if_id,
29 u8 dev_num, enum hws_access_type interface_access, u32 if_id,
32 u8 dev_num, enum hws_ddr_freq freq,
35 u8 dev_num, struct ddr3_device_info *info_ptr);
37 u8 dev_num, u32 cs_mask, struct hws_cs_config_info *cs_info);
39 u8 dev_num, u32 if_id, enum hws_ddr_freq freq);
40 typedef int (*HWS_GET_INIT_FREQ)(u8 dev_num, enum hws_ddr_freq *freq);
42 u32 dev_num, enum hws_access_type access_type, u32 dunit_id,
45 u32 dev_num, enum hws_access_type access_type, u32 dunit_id,
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H A Dddr3_a38x.c198 static int ddr3_tip_a38x_set_divider(u8 dev_num, u32 if_id,
204 u32 ddr3_ctrl_get_junc_temp(u8 dev_num) in ddr3_ctrl_get_junc_temp() argument
232 int ddr3_tip_a38x_get_freq_config(u8 dev_num, enum hws_ddr_freq freq, in ddr3_tip_a38x_get_freq_config() argument
256 int ddr3_tip_a38x_pipe_enable(u8 dev_num, enum hws_access_type interface_access, in ddr3_tip_a38x_pipe_enable() argument
271 (dev_num, PIPE_ENABLE_ADDR, &data_value, MASK_ALL_BITS)); in ddr3_tip_a38x_pipe_enable()
273 CHECK_STATUS(ddr3_tip_reg_write(dev_num, PIPE_ENABLE_ADDR, data_value)); in ddr3_tip_a38x_pipe_enable()
285 int ddr3_tip_a38x_if_write(u8 dev_num, enum hws_access_type interface_access, in ddr3_tip_a38x_if_write() argument
293 (dev_num, ACCESS_TYPE_UNICAST, if_id, reg_addr, in ddr3_tip_a38x_if_write()
310 int ddr3_tip_a38x_if_read(u8 dev_num, enum hws_access_type interface_access, in ddr3_tip_a38x_if_read() argument
326 int ddr3_tip_a38x_select_ddr_controller(u8 dev_num, int enable) in ddr3_tip_a38x_select_ddr_controller() argument
[all …]
H A Dddr3_training_static.c68 int ddr3_tip_init_specific_reg_config(u32 dev_num, reg_data *reg_config_arr) in ddr3_tip_init_specific_reg_config() argument
70 static_init_controller_config[dev_num] = reg_config_arr; in ddr3_tip_init_specific_reg_config()
78 u32 dev_num, struct hws_tip_static_config_info *static_config_info) in ddr3_tip_init_static_config_db() argument
80 static_config[dev_num].board_trace_arr = in ddr3_tip_init_static_config_db()
82 static_config[dev_num].package_trace_arr = in ddr3_tip_init_static_config_db()
84 silicon_delay[dev_num] = static_config_info->silicon_delay; in ddr3_tip_init_static_config_db()
92 int ddr3_tip_static_round_trip_arr_build(u32 dev_num, in ddr3_tip_static_round_trip_arr_build() argument
127 static_config[dev_num].package_trace_arr; in ddr3_tip_static_round_trip_arr_build()
133 (int)silicon_delay[dev_num]); in ddr3_tip_static_round_trip_arr_build()
149 int ddr3_tip_write_leveling_static_config(u32 dev_num, u32 if_id, in ddr3_tip_write_leveling_static_config() argument
[all …]
H A Dddr3_training_ip_flow.h253 #define GET_BLOCK_ID_MAX_FREQ(dev_num, block_id) 800000 argument
284 int ddr3_tip_write_leveling_static_config(u32 dev_num, u32 if_id,
287 int ddr3_tip_read_leveling_static_config(u32 dev_num, u32 if_id,
290 int ddr3_tip_if_write(u32 dev_num, enum hws_access_type interface_access,
292 int ddr3_tip_if_polling(u32 dev_num, enum hws_access_type access_type,
295 int ddr3_tip_if_read(u32 dev_num, enum hws_access_type interface_access,
297 int ddr3_tip_bus_read_modify_write(u32 dev_num,
302 int ddr3_tip_bus_read(u32 dev_num, u32 if_id, enum hws_access_type phy_access,
305 int ddr3_tip_bus_write(u32 dev_num, enum hws_access_type e_interface_access,
309 int ddr3_tip_freq_set(u32 dev_num, enum hws_access_type e_access, u32 if_id,
[all …]
H A Dddr3_training_bist.c18 static int ddr3_tip_bist_operation(u32 dev_num,
26 int ddr3_tip_bist_activate(u32 dev_num, enum hws_pattern pattern, in ddr3_tip_bist_activate() argument
43 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_num, in ddr3_tip_bist_activate()
46 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_num, in ddr3_tip_bist_activate()
50 CHECK_STATUS(ddr3_tip_load_pattern_to_odpg(dev_num, access_type, if_num, in ddr3_tip_bist_activate()
53 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_num, in ddr3_tip_bist_activate()
61 (dev_num, access_type, if_num, direction, in ddr3_tip_bist_activate()
66 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_num, in ddr3_tip_bist_activate()
70 CHECK_STATUS(ddr3_tip_bist_operation(dev_num, access_type, in ddr3_tip_bist_activate()
73 CHECK_STATUS(ddr3_tip_bist_operation(dev_num, access_type, in ddr3_tip_bist_activate()
[all …]
H A Dddr3_training_ip_engine.c156 u32 *ddr3_tip_get_buf_ptr(u32 dev_num, enum hws_search_dir search, in ddr3_tip_get_buf_ptr() argument
174 int ddr3_tip_ip_training(u32 dev_num, enum hws_access_type access_type, in ddr3_tip_ip_training() argument
216 (dev_num, access_type, interface_num, in ddr3_tip_ip_training()
220 (dev_num, access_type, interface_num, in ddr3_tip_ip_training()
225 (dev_num, access_type, interface_num, in ddr3_tip_ip_training()
229 (dev_num, access_type, interface_num, in ddr3_tip_ip_training()
235 ddr3_tip_load_pattern_to_odpg(dev_num, access_type, interface_num, in ddr3_tip_ip_training()
243 (dev_num, access_type, interface_num, direction, in ddr3_tip_ip_training()
251 (dev_num, access_type, interface_num, in ddr3_tip_ip_training()
274 (dev_num, access_type, interface_num, in ddr3_tip_ip_training()
[all …]
H A Dddr3_debug.c98 int ddr3_tip_reg_dump(u32 dev_num) in ddr3_tip_reg_dump() argument
110 (dev_num, ACCESS_TYPE_UNICAST, in ddr3_tip_reg_dump()
128 (dev_num, if_id, in ddr3_tip_reg_dump()
139 (dev_num, if_id, in ddr3_tip_reg_dump()
155 int ddr3_tip_init_config_func(u32 dev_num, in ddr3_tip_init_config_func() argument
161 memcpy(&config_func_info[dev_num], config_func, in ddr3_tip_init_config_func()
178 int ddr3_tip_get_device_info(u32 dev_num, struct ddr3_device_info *info_ptr) in ddr3_tip_get_device_info() argument
180 if (config_func_info[dev_num].tip_get_device_info_func != NULL) { in ddr3_tip_get_device_info()
181 return config_func_info[dev_num]. in ddr3_tip_get_device_info()
182 tip_get_device_info_func((u8) dev_num, info_ptr); in ddr3_tip_get_device_info()
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H A Dddr3_training_hw_algo.c50 int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id) in ddr3_tip_write_additional_odt_setting() argument
61 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id, in ddr3_tip_write_additional_odt_setting()
64 CHECK_STATUS(ddr3_tip_if_read(dev_num, access_type, if_id, in ddr3_tip_write_additional_odt_setting()
83 (dev_num, if_id, in ddr3_tip_write_additional_odt_setting()
107 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id, in ddr3_tip_write_additional_odt_setting()
111 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id, in ddr3_tip_write_additional_odt_setting()
119 int get_valid_win_rx(u32 dev_num, u32 if_id, u8 res[4]) in get_valid_win_rx() argument
132 CHECK_STATUS(ddr3_tip_bus_read(dev_num, if_id, in get_valid_win_rx()
153 int ddr3_tip_vref(u32 dev_num) in ddr3_tip_vref() argument
176 CHECK_STATUS(ddr3_tip_special_rx(dev_num)); in ddr3_tip_vref()
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H A Dddr3_training_pbs.c40 int ddr3_tip_pbs(u32 dev_num, enum pbs_dir pbs_mode) in ddr3_tip_pbs() argument
66 (dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_pbs()
71 (dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_pbs()
83 ddr3_tip_ip_training(dev_num, ACCESS_TYPE_MULTICAST, in ddr3_tip_pbs()
108 (dev_num, ACCESS_TYPE_MULTICAST, in ddr3_tip_pbs()
195 (dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_pbs()
202 (dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_pbs()
211 ddr3_tip_ip_training(dev_num, ACCESS_TYPE_MULTICAST, in ddr3_tip_pbs()
226 (dev_num, ACCESS_TYPE_MULTICAST, in ddr3_tip_pbs()
255 (dev_num, in ddr3_tip_pbs()
[all …]
H A Dddr3_training_centralization.c32 static int ddr3_tip_centralization(u32 dev_num, u32 mode);
37 int ddr3_tip_centralization_rx(u32 dev_num) in ddr3_tip_centralization_rx() argument
39 CHECK_STATUS(ddr3_tip_special_rx(dev_num)); in ddr3_tip_centralization_rx()
40 CHECK_STATUS(ddr3_tip_centralization(dev_num, CENTRAL_RX)); in ddr3_tip_centralization_rx()
48 int ddr3_tip_centralization_tx(u32 dev_num) in ddr3_tip_centralization_tx() argument
50 CHECK_STATUS(ddr3_tip_centralization(dev_num, CENTRAL_TX)); in ddr3_tip_centralization_tx()
58 static int ddr3_tip_centralization(u32 dev_num, u32 mode) in ddr3_tip_centralization() argument
88 (dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_centralization()
92 (dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_centralization()
123 ddr3_tip_ip_training_wrapper(dev_num, ACCESS_TYPE_MULTICAST, in ddr3_tip_centralization()
[all …]
H A Dddr3_init.h301 int ddr3_tip_enable_init_sequence(u32 dev_num);
303 int ddr3_tip_init_a38x(u32 dev_num, u32 board_id);
317 int ddr3_tip_reg_write(u32 dev_num, u32 reg_addr, u32 data);
318 int ddr3_tip_reg_read(u32 dev_num, u32 reg_addr, u32 *data, u32 reg_mask);
320 int ddr3_tip_a38x_get_freq_config(u8 dev_num, enum hws_ddr_freq freq,
323 int ddr3_a38x_update_topology_map(u32 dev_num,
325 int ddr3_tip_a38x_get_init_freq(int dev_num, enum hws_ddr_freq *freq);
326 int ddr3_tip_a38x_get_medium_freq(int dev_num, enum hws_ddr_freq *freq);
327 int ddr3_tip_a38x_if_read(u8 dev_num, enum hws_access_type interface_access,
329 int ddr3_tip_a38x_if_write(u8 dev_num, enum hws_access_type interface_access,
[all …]
H A Dddr3_training_ip_bist.h36 int ddr3_tip_bist_read_result(u32 dev_num, u32 if_id,
38 int ddr3_tip_bist_activate(u32 dev_num, enum hws_pattern pattern,
45 int hws_ddr3_run_bist(u32 dev_num, enum hws_pattern pattern, u32 *result,
47 int ddr3_tip_run_sweep_test(int dev_num, u32 repeat_num, u32 direction,
49 int ddr3_tip_print_regs(u32 dev_num);
50 int ddr3_tip_reg_dump(u32 dev_num);
51 int run_xsb_test(u32 dev_num, u32 mem_addr, u32 write_type, u32 read_type,
H A Dddr3_training_ip_engine.h33 int ddr3_tip_training_ip_test(u32 dev_num, enum hws_training_result result_type,
40 int ddr3_tip_load_pattern_to_mem(u32 dev_num, enum hws_pattern pattern);
41 int ddr3_tip_load_pattern_to_mem_by_cpu(u32 dev_num, enum hws_pattern pattern,
43 int ddr3_tip_load_all_pattern_to_mem(u32 dev_num);
44 int ddr3_tip_read_training_result(u32 dev_num, u32 if_id,
54 int ddr3_tip_ip_training(u32 dev_num, enum hws_access_type access_type,
65 int ddr3_tip_ip_training_wrapper(u32 dev_num, enum hws_access_type access_type,
79 int is_odpg_access_done(u32 dev_num, u32 if_id);
H A Dddr3_training_ip_centralization.h10 int ddr3_tip_centralization_tx(u32 dev_num);
11 int ddr3_tip_centralization_rx(u32 dev_num);
12 int ddr3_tip_print_centralization_result(u32 dev_num);
13 int ddr3_tip_special_rx(u32 dev_num);
H A Dddr3_training_ip.h166 int ddr3_tip_register_dq_table(u32 dev_num, u32 *table);
167 int hws_ddr3_tip_select_ddr_controller(u32 dev_num, int enable);
168 int hws_ddr3_tip_init_controller(u32 dev_num,
170 int hws_ddr3_tip_load_topology_map(u32 dev_num,
172 int hws_ddr3_tip_run_alg(u32 dev_num, enum hws_algo_type algo_type);
173 int hws_ddr3_tip_mode_read(u32 dev_num, struct mode_info *mode_info);
H A Dddr3_training_ip_static.h24 int ddr3_tip_run_static_alg(u32 dev_num, enum hws_ddr_freq freq);
26 u32 dev_num, struct hws_tip_static_config_info *static_config_info);
27 int ddr3_tip_init_specific_reg_config(u32 dev_num,
29 int ddr3_tip_static_phy_init_controller(u32 dev_num);
/OK3568_Linux_fs/kernel/drivers/soundwire/
H A Dbus.c159 if (slave->dev_num) /* clear dev_num if assigned */ in sdw_delete_slave()
160 clear_bit(slave->dev_num, bus->assigned); in sdw_delete_slave()
247 static int sdw_reset_page(struct sdw_bus *bus, u16 dev_num) in sdw_reset_page() argument
254 resp = bus->ops->reset_page_addr(bus, dev_num); in sdw_reset_page()
271 msg->dev_num, ret); in sdw_transfer_unlocked()
274 sdw_reset_page(bus, msg->dev_num); in sdw_transfer_unlocked()
316 msg->dev_num, ret); in sdw_transfer_defer()
319 sdw_reset_page(bus, msg->dev_num); in sdw_transfer_defer()
325 u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf) in sdw_fill_msg() argument
330 msg->dev_num = dev_num; in sdw_fill_msg()
[all …]
/OK3568_Linux_fs/u-boot/include/
H A Dnetdev.h34 int bcm_sf2_eth_register(bd_t *bis, u8 dev_num);
37 int cs8900_initialize(u8 dev_num, int base_addr);
47 int ep93xx_eth_initialize(u8 dev_num, int base_addr);
49 int ethoc_initialize(u8 dev_num, int base_addr);
57 int ks8851_mll_initialize(u8 dev_num, int base_addr);
58 int lan91c96_initialize(u8 dev_num, int base_addr);
76 int smc91111_initialize(u8 dev_num, int base_addr);
77 int smc911x_initialize(u8 dev_num, int base_addr);
/OK3568_Linux_fs/external/camera_engine_rkaiq/rkisp_demo/demo/iio/include/
H A Drkiio.h31 _CAPI RK_CHAR **rkiio_dev_list_get(rkiio_sensor_type_t type, RK_S32 *dev_num);
32 _CAPI RK_CHAR **rkiio_anglvel_dev_list_get(RK_S32 *dev_num);
33 _CAPI RK_CHAR **rkiio_accel_dev_list_get(RK_S32 *dev_num);
34 _CAPI RK_CHAR **rkiio_temp_dev_list_get(RK_S32 *dev_num);
35 _CAPI RK_CHAR **rkiio_all_dev_list_get(RK_S32 *dev_num);
36 _CAPI RK_S32 rkiio_dev_list_destroy(char **dev_list, RK_S32 dev_num);
/OK3568_Linux_fs/kernel/tools/iio/
H A Diio_generic_buffer.c344 int dev_num = -1, trig_num = -1; in main() local
395 dev_num = strtoul(optarg, &dummy, 10); in main()
426 if (dev_num < 0 && !device_name) { in main()
431 } else if (dev_num >= 0 && device_name) { in main()
436 } else if (dev_num < 0) { in main()
437 dev_num = find_type_by_name(device_name, "iio:device"); in main()
438 if (dev_num < 0) { in main()
440 ret = dev_num; in main()
444 printf("iio device number being used is %d\n", dev_num); in main()
446 ret = asprintf(&dev_dir_name, "%siio:device%d", iio_dir, dev_num); in main()
[all …]
/OK3568_Linux_fs/u-boot/cmd/
H A Dandroid_cmds.c31 int dev_num; in part_get_info_by_dev_and_name() local
37 dev_num = simple_strtoul(dev_part_str, &ep, 16); in part_get_info_by_dev_and_name()
44 *dev_desc = blk_get_dev(dev_iface, dev_num); in part_get_info_by_dev_and_name()
46 printf("Could not find %s %d\n", dev_iface, dev_num); in part_get_info_by_dev_and_name()

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