1*4882a593Smuzhiyun // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2*4882a593Smuzhiyun // Copyright(c) 2015-17 Intel Corporation.
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun #include <linux/acpi.h>
5*4882a593Smuzhiyun #include <linux/delay.h>
6*4882a593Smuzhiyun #include <linux/mod_devicetable.h>
7*4882a593Smuzhiyun #include <linux/pm_runtime.h>
8*4882a593Smuzhiyun #include <linux/soundwire/sdw_registers.h>
9*4882a593Smuzhiyun #include <linux/soundwire/sdw.h>
10*4882a593Smuzhiyun #include "bus.h"
11*4882a593Smuzhiyun #include "sysfs_local.h"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun static DEFINE_IDA(sdw_ida);
14*4882a593Smuzhiyun
sdw_get_id(struct sdw_bus * bus)15*4882a593Smuzhiyun static int sdw_get_id(struct sdw_bus *bus)
16*4882a593Smuzhiyun {
17*4882a593Smuzhiyun int rc = ida_alloc(&sdw_ida, GFP_KERNEL);
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun if (rc < 0)
20*4882a593Smuzhiyun return rc;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun bus->id = rc;
23*4882a593Smuzhiyun return 0;
24*4882a593Smuzhiyun }
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /**
27*4882a593Smuzhiyun * sdw_bus_master_add() - add a bus Master instance
28*4882a593Smuzhiyun * @bus: bus instance
29*4882a593Smuzhiyun * @parent: parent device
30*4882a593Smuzhiyun * @fwnode: firmware node handle
31*4882a593Smuzhiyun *
32*4882a593Smuzhiyun * Initializes the bus instance, read properties and create child
33*4882a593Smuzhiyun * devices.
34*4882a593Smuzhiyun */
sdw_bus_master_add(struct sdw_bus * bus,struct device * parent,struct fwnode_handle * fwnode)35*4882a593Smuzhiyun int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent,
36*4882a593Smuzhiyun struct fwnode_handle *fwnode)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun struct sdw_master_prop *prop = NULL;
39*4882a593Smuzhiyun int ret;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun if (!parent) {
42*4882a593Smuzhiyun pr_err("SoundWire parent device is not set\n");
43*4882a593Smuzhiyun return -ENODEV;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun ret = sdw_get_id(bus);
47*4882a593Smuzhiyun if (ret) {
48*4882a593Smuzhiyun dev_err(parent, "Failed to get bus id\n");
49*4882a593Smuzhiyun return ret;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun ret = sdw_master_device_add(bus, parent, fwnode);
53*4882a593Smuzhiyun if (ret) {
54*4882a593Smuzhiyun dev_err(parent, "Failed to add master device at link %d\n",
55*4882a593Smuzhiyun bus->link_id);
56*4882a593Smuzhiyun return ret;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun if (!bus->ops) {
60*4882a593Smuzhiyun dev_err(bus->dev, "SoundWire Bus ops are not set\n");
61*4882a593Smuzhiyun return -EINVAL;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun if (!bus->compute_params) {
65*4882a593Smuzhiyun dev_err(bus->dev,
66*4882a593Smuzhiyun "Bandwidth allocation not configured, compute_params no set\n");
67*4882a593Smuzhiyun return -EINVAL;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun mutex_init(&bus->msg_lock);
71*4882a593Smuzhiyun mutex_init(&bus->bus_lock);
72*4882a593Smuzhiyun INIT_LIST_HEAD(&bus->slaves);
73*4882a593Smuzhiyun INIT_LIST_HEAD(&bus->m_rt_list);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /*
76*4882a593Smuzhiyun * Initialize multi_link flag
77*4882a593Smuzhiyun * TODO: populate this flag by reading property from FW node
78*4882a593Smuzhiyun */
79*4882a593Smuzhiyun bus->multi_link = false;
80*4882a593Smuzhiyun if (bus->ops->read_prop) {
81*4882a593Smuzhiyun ret = bus->ops->read_prop(bus);
82*4882a593Smuzhiyun if (ret < 0) {
83*4882a593Smuzhiyun dev_err(bus->dev,
84*4882a593Smuzhiyun "Bus read properties failed:%d\n", ret);
85*4882a593Smuzhiyun return ret;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun sdw_bus_debugfs_init(bus);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /*
92*4882a593Smuzhiyun * Device numbers in SoundWire are 0 through 15. Enumeration device
93*4882a593Smuzhiyun * number (0), Broadcast device number (15), Group numbers (12 and
94*4882a593Smuzhiyun * 13) and Master device number (14) are not used for assignment so
95*4882a593Smuzhiyun * mask these and other higher bits.
96*4882a593Smuzhiyun */
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /* Set higher order bits */
99*4882a593Smuzhiyun *bus->assigned = ~GENMASK(SDW_BROADCAST_DEV_NUM, SDW_ENUM_DEV_NUM);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun /* Set enumuration device number and broadcast device number */
102*4882a593Smuzhiyun set_bit(SDW_ENUM_DEV_NUM, bus->assigned);
103*4882a593Smuzhiyun set_bit(SDW_BROADCAST_DEV_NUM, bus->assigned);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun /* Set group device numbers and master device number */
106*4882a593Smuzhiyun set_bit(SDW_GROUP12_DEV_NUM, bus->assigned);
107*4882a593Smuzhiyun set_bit(SDW_GROUP13_DEV_NUM, bus->assigned);
108*4882a593Smuzhiyun set_bit(SDW_MASTER_DEV_NUM, bus->assigned);
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun /*
111*4882a593Smuzhiyun * SDW is an enumerable bus, but devices can be powered off. So,
112*4882a593Smuzhiyun * they won't be able to report as present.
113*4882a593Smuzhiyun *
114*4882a593Smuzhiyun * Create Slave devices based on Slaves described in
115*4882a593Smuzhiyun * the respective firmware (ACPI/DT)
116*4882a593Smuzhiyun */
117*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_ACPI) && ACPI_HANDLE(bus->dev))
118*4882a593Smuzhiyun ret = sdw_acpi_find_slaves(bus);
119*4882a593Smuzhiyun else if (IS_ENABLED(CONFIG_OF) && bus->dev->of_node)
120*4882a593Smuzhiyun ret = sdw_of_find_slaves(bus);
121*4882a593Smuzhiyun else
122*4882a593Smuzhiyun ret = -ENOTSUPP; /* No ACPI/DT so error out */
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun if (ret) {
125*4882a593Smuzhiyun dev_err(bus->dev, "Finding slaves failed:%d\n", ret);
126*4882a593Smuzhiyun return ret;
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /*
130*4882a593Smuzhiyun * Initialize clock values based on Master properties. The max
131*4882a593Smuzhiyun * frequency is read from max_clk_freq property. Current assumption
132*4882a593Smuzhiyun * is that the bus will start at highest clock frequency when
133*4882a593Smuzhiyun * powered on.
134*4882a593Smuzhiyun *
135*4882a593Smuzhiyun * Default active bank will be 0 as out of reset the Slaves have
136*4882a593Smuzhiyun * to start with bank 0 (Table 40 of Spec)
137*4882a593Smuzhiyun */
138*4882a593Smuzhiyun prop = &bus->prop;
139*4882a593Smuzhiyun bus->params.max_dr_freq = prop->max_clk_freq * SDW_DOUBLE_RATE_FACTOR;
140*4882a593Smuzhiyun bus->params.curr_dr_freq = bus->params.max_dr_freq;
141*4882a593Smuzhiyun bus->params.curr_bank = SDW_BANK0;
142*4882a593Smuzhiyun bus->params.next_bank = SDW_BANK1;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun return 0;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_bus_master_add);
147*4882a593Smuzhiyun
sdw_delete_slave(struct device * dev,void * data)148*4882a593Smuzhiyun static int sdw_delete_slave(struct device *dev, void *data)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun struct sdw_slave *slave = dev_to_sdw_dev(dev);
151*4882a593Smuzhiyun struct sdw_bus *bus = slave->bus;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun pm_runtime_disable(dev);
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun sdw_slave_debugfs_exit(slave);
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun mutex_lock(&bus->bus_lock);
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun if (slave->dev_num) /* clear dev_num if assigned */
160*4882a593Smuzhiyun clear_bit(slave->dev_num, bus->assigned);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun list_del_init(&slave->node);
163*4882a593Smuzhiyun mutex_unlock(&bus->bus_lock);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun device_unregister(dev);
166*4882a593Smuzhiyun return 0;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun /**
170*4882a593Smuzhiyun * sdw_bus_master_delete() - delete the bus master instance
171*4882a593Smuzhiyun * @bus: bus to be deleted
172*4882a593Smuzhiyun *
173*4882a593Smuzhiyun * Remove the instance, delete the child devices.
174*4882a593Smuzhiyun */
sdw_bus_master_delete(struct sdw_bus * bus)175*4882a593Smuzhiyun void sdw_bus_master_delete(struct sdw_bus *bus)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun device_for_each_child(bus->dev, NULL, sdw_delete_slave);
178*4882a593Smuzhiyun sdw_master_device_del(bus);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun sdw_bus_debugfs_exit(bus);
181*4882a593Smuzhiyun ida_free(&sdw_ida, bus->id);
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_bus_master_delete);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun /*
186*4882a593Smuzhiyun * SDW IO Calls
187*4882a593Smuzhiyun */
188*4882a593Smuzhiyun
find_response_code(enum sdw_command_response resp)189*4882a593Smuzhiyun static inline int find_response_code(enum sdw_command_response resp)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun switch (resp) {
192*4882a593Smuzhiyun case SDW_CMD_OK:
193*4882a593Smuzhiyun return 0;
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun case SDW_CMD_IGNORED:
196*4882a593Smuzhiyun return -ENODATA;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun case SDW_CMD_TIMEOUT:
199*4882a593Smuzhiyun return -ETIMEDOUT;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun default:
202*4882a593Smuzhiyun return -EIO;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
do_transfer(struct sdw_bus * bus,struct sdw_msg * msg)206*4882a593Smuzhiyun static inline int do_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
207*4882a593Smuzhiyun {
208*4882a593Smuzhiyun int retry = bus->prop.err_threshold;
209*4882a593Smuzhiyun enum sdw_command_response resp;
210*4882a593Smuzhiyun int ret = 0, i;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun for (i = 0; i <= retry; i++) {
213*4882a593Smuzhiyun resp = bus->ops->xfer_msg(bus, msg);
214*4882a593Smuzhiyun ret = find_response_code(resp);
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun /* if cmd is ok or ignored return */
217*4882a593Smuzhiyun if (ret == 0 || ret == -ENODATA)
218*4882a593Smuzhiyun return ret;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun return ret;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
do_transfer_defer(struct sdw_bus * bus,struct sdw_msg * msg,struct sdw_defer * defer)224*4882a593Smuzhiyun static inline int do_transfer_defer(struct sdw_bus *bus,
225*4882a593Smuzhiyun struct sdw_msg *msg,
226*4882a593Smuzhiyun struct sdw_defer *defer)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun int retry = bus->prop.err_threshold;
229*4882a593Smuzhiyun enum sdw_command_response resp;
230*4882a593Smuzhiyun int ret = 0, i;
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun defer->msg = msg;
233*4882a593Smuzhiyun defer->length = msg->len;
234*4882a593Smuzhiyun init_completion(&defer->complete);
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun for (i = 0; i <= retry; i++) {
237*4882a593Smuzhiyun resp = bus->ops->xfer_msg_defer(bus, msg, defer);
238*4882a593Smuzhiyun ret = find_response_code(resp);
239*4882a593Smuzhiyun /* if cmd is ok or ignored return */
240*4882a593Smuzhiyun if (ret == 0 || ret == -ENODATA)
241*4882a593Smuzhiyun return ret;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun return ret;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
sdw_reset_page(struct sdw_bus * bus,u16 dev_num)247*4882a593Smuzhiyun static int sdw_reset_page(struct sdw_bus *bus, u16 dev_num)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun int retry = bus->prop.err_threshold;
250*4882a593Smuzhiyun enum sdw_command_response resp;
251*4882a593Smuzhiyun int ret = 0, i;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun for (i = 0; i <= retry; i++) {
254*4882a593Smuzhiyun resp = bus->ops->reset_page_addr(bus, dev_num);
255*4882a593Smuzhiyun ret = find_response_code(resp);
256*4882a593Smuzhiyun /* if cmd is ok or ignored return */
257*4882a593Smuzhiyun if (ret == 0 || ret == -ENODATA)
258*4882a593Smuzhiyun return ret;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun return ret;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
sdw_transfer_unlocked(struct sdw_bus * bus,struct sdw_msg * msg)264*4882a593Smuzhiyun static int sdw_transfer_unlocked(struct sdw_bus *bus, struct sdw_msg *msg)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun int ret;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun ret = do_transfer(bus, msg);
269*4882a593Smuzhiyun if (ret != 0 && ret != -ENODATA)
270*4882a593Smuzhiyun dev_err(bus->dev, "trf on Slave %d failed:%d\n",
271*4882a593Smuzhiyun msg->dev_num, ret);
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun if (msg->page)
274*4882a593Smuzhiyun sdw_reset_page(bus, msg->dev_num);
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun return ret;
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun /**
280*4882a593Smuzhiyun * sdw_transfer() - Synchronous transfer message to a SDW Slave device
281*4882a593Smuzhiyun * @bus: SDW bus
282*4882a593Smuzhiyun * @msg: SDW message to be xfered
283*4882a593Smuzhiyun */
sdw_transfer(struct sdw_bus * bus,struct sdw_msg * msg)284*4882a593Smuzhiyun int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun int ret;
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun mutex_lock(&bus->msg_lock);
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun ret = sdw_transfer_unlocked(bus, msg);
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun mutex_unlock(&bus->msg_lock);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun return ret;
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun /**
298*4882a593Smuzhiyun * sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device
299*4882a593Smuzhiyun * @bus: SDW bus
300*4882a593Smuzhiyun * @msg: SDW message to be xfered
301*4882a593Smuzhiyun * @defer: Defer block for signal completion
302*4882a593Smuzhiyun *
303*4882a593Smuzhiyun * Caller needs to hold the msg_lock lock while calling this
304*4882a593Smuzhiyun */
sdw_transfer_defer(struct sdw_bus * bus,struct sdw_msg * msg,struct sdw_defer * defer)305*4882a593Smuzhiyun int sdw_transfer_defer(struct sdw_bus *bus, struct sdw_msg *msg,
306*4882a593Smuzhiyun struct sdw_defer *defer)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun int ret;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun if (!bus->ops->xfer_msg_defer)
311*4882a593Smuzhiyun return -ENOTSUPP;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun ret = do_transfer_defer(bus, msg, defer);
314*4882a593Smuzhiyun if (ret != 0 && ret != -ENODATA)
315*4882a593Smuzhiyun dev_err(bus->dev, "Defer trf on Slave %d failed:%d\n",
316*4882a593Smuzhiyun msg->dev_num, ret);
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun if (msg->page)
319*4882a593Smuzhiyun sdw_reset_page(bus, msg->dev_num);
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun return ret;
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun
sdw_fill_msg(struct sdw_msg * msg,struct sdw_slave * slave,u32 addr,size_t count,u16 dev_num,u8 flags,u8 * buf)324*4882a593Smuzhiyun int sdw_fill_msg(struct sdw_msg *msg, struct sdw_slave *slave,
325*4882a593Smuzhiyun u32 addr, size_t count, u16 dev_num, u8 flags, u8 *buf)
326*4882a593Smuzhiyun {
327*4882a593Smuzhiyun memset(msg, 0, sizeof(*msg));
328*4882a593Smuzhiyun msg->addr = addr; /* addr is 16 bit and truncated here */
329*4882a593Smuzhiyun msg->len = count;
330*4882a593Smuzhiyun msg->dev_num = dev_num;
331*4882a593Smuzhiyun msg->flags = flags;
332*4882a593Smuzhiyun msg->buf = buf;
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun if (addr < SDW_REG_NO_PAGE) /* no paging area */
335*4882a593Smuzhiyun return 0;
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun if (addr >= SDW_REG_MAX) { /* illegal addr */
338*4882a593Smuzhiyun pr_err("SDW: Invalid address %x passed\n", addr);
339*4882a593Smuzhiyun return -EINVAL;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun if (addr < SDW_REG_OPTIONAL_PAGE) { /* 32k but no page */
343*4882a593Smuzhiyun if (slave && !slave->prop.paging_support)
344*4882a593Smuzhiyun return 0;
345*4882a593Smuzhiyun /* no need for else as that will fall-through to paging */
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun /* paging mandatory */
349*4882a593Smuzhiyun if (dev_num == SDW_ENUM_DEV_NUM || dev_num == SDW_BROADCAST_DEV_NUM) {
350*4882a593Smuzhiyun pr_err("SDW: Invalid device for paging :%d\n", dev_num);
351*4882a593Smuzhiyun return -EINVAL;
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun if (!slave) {
355*4882a593Smuzhiyun pr_err("SDW: No slave for paging addr\n");
356*4882a593Smuzhiyun return -EINVAL;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun if (!slave->prop.paging_support) {
360*4882a593Smuzhiyun dev_err(&slave->dev,
361*4882a593Smuzhiyun "address %x needs paging but no support\n", addr);
362*4882a593Smuzhiyun return -EINVAL;
363*4882a593Smuzhiyun }
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun msg->addr_page1 = FIELD_GET(SDW_SCP_ADDRPAGE1_MASK, addr);
366*4882a593Smuzhiyun msg->addr_page2 = FIELD_GET(SDW_SCP_ADDRPAGE2_MASK, addr);
367*4882a593Smuzhiyun msg->addr |= BIT(15);
368*4882a593Smuzhiyun msg->page = true;
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun return 0;
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun /*
374*4882a593Smuzhiyun * Read/Write IO functions.
375*4882a593Smuzhiyun * no_pm versions can only be called by the bus, e.g. while enumerating or
376*4882a593Smuzhiyun * handling suspend-resume sequences.
377*4882a593Smuzhiyun * all clients need to use the pm versions
378*4882a593Smuzhiyun */
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun static int
sdw_nread_no_pm(struct sdw_slave * slave,u32 addr,size_t count,u8 * val)381*4882a593Smuzhiyun sdw_nread_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
382*4882a593Smuzhiyun {
383*4882a593Smuzhiyun struct sdw_msg msg;
384*4882a593Smuzhiyun int ret;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun ret = sdw_fill_msg(&msg, slave, addr, count,
387*4882a593Smuzhiyun slave->dev_num, SDW_MSG_FLAG_READ, val);
388*4882a593Smuzhiyun if (ret < 0)
389*4882a593Smuzhiyun return ret;
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun return sdw_transfer(slave->bus, &msg);
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun static int
sdw_nwrite_no_pm(struct sdw_slave * slave,u32 addr,size_t count,u8 * val)395*4882a593Smuzhiyun sdw_nwrite_no_pm(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun struct sdw_msg msg;
398*4882a593Smuzhiyun int ret;
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun ret = sdw_fill_msg(&msg, slave, addr, count,
401*4882a593Smuzhiyun slave->dev_num, SDW_MSG_FLAG_WRITE, val);
402*4882a593Smuzhiyun if (ret < 0)
403*4882a593Smuzhiyun return ret;
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun return sdw_transfer(slave->bus, &msg);
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun
sdw_write_no_pm(struct sdw_slave * slave,u32 addr,u8 value)408*4882a593Smuzhiyun int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun return sdw_nwrite_no_pm(slave, addr, 1, &value);
411*4882a593Smuzhiyun }
412*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_write_no_pm);
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun static int
sdw_bread_no_pm(struct sdw_bus * bus,u16 dev_num,u32 addr)415*4882a593Smuzhiyun sdw_bread_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun struct sdw_msg msg;
418*4882a593Smuzhiyun u8 buf;
419*4882a593Smuzhiyun int ret;
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
422*4882a593Smuzhiyun SDW_MSG_FLAG_READ, &buf);
423*4882a593Smuzhiyun if (ret)
424*4882a593Smuzhiyun return ret;
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun ret = sdw_transfer(bus, &msg);
427*4882a593Smuzhiyun if (ret < 0)
428*4882a593Smuzhiyun return ret;
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun return buf;
431*4882a593Smuzhiyun }
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun static int
sdw_bwrite_no_pm(struct sdw_bus * bus,u16 dev_num,u32 addr,u8 value)434*4882a593Smuzhiyun sdw_bwrite_no_pm(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
435*4882a593Smuzhiyun {
436*4882a593Smuzhiyun struct sdw_msg msg;
437*4882a593Smuzhiyun int ret;
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
440*4882a593Smuzhiyun SDW_MSG_FLAG_WRITE, &value);
441*4882a593Smuzhiyun if (ret)
442*4882a593Smuzhiyun return ret;
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun return sdw_transfer(bus, &msg);
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun
sdw_bread_no_pm_unlocked(struct sdw_bus * bus,u16 dev_num,u32 addr)447*4882a593Smuzhiyun int sdw_bread_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr)
448*4882a593Smuzhiyun {
449*4882a593Smuzhiyun struct sdw_msg msg;
450*4882a593Smuzhiyun u8 buf;
451*4882a593Smuzhiyun int ret;
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
454*4882a593Smuzhiyun SDW_MSG_FLAG_READ, &buf);
455*4882a593Smuzhiyun if (ret)
456*4882a593Smuzhiyun return ret;
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun ret = sdw_transfer_unlocked(bus, &msg);
459*4882a593Smuzhiyun if (ret < 0)
460*4882a593Smuzhiyun return ret;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun return buf;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_bread_no_pm_unlocked);
465*4882a593Smuzhiyun
sdw_bwrite_no_pm_unlocked(struct sdw_bus * bus,u16 dev_num,u32 addr,u8 value)466*4882a593Smuzhiyun int sdw_bwrite_no_pm_unlocked(struct sdw_bus *bus, u16 dev_num, u32 addr, u8 value)
467*4882a593Smuzhiyun {
468*4882a593Smuzhiyun struct sdw_msg msg;
469*4882a593Smuzhiyun int ret;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun ret = sdw_fill_msg(&msg, NULL, addr, 1, dev_num,
472*4882a593Smuzhiyun SDW_MSG_FLAG_WRITE, &value);
473*4882a593Smuzhiyun if (ret)
474*4882a593Smuzhiyun return ret;
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun return sdw_transfer_unlocked(bus, &msg);
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_bwrite_no_pm_unlocked);
479*4882a593Smuzhiyun
sdw_read_no_pm(struct sdw_slave * slave,u32 addr)480*4882a593Smuzhiyun int sdw_read_no_pm(struct sdw_slave *slave, u32 addr)
481*4882a593Smuzhiyun {
482*4882a593Smuzhiyun u8 buf;
483*4882a593Smuzhiyun int ret;
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun ret = sdw_nread_no_pm(slave, addr, 1, &buf);
486*4882a593Smuzhiyun if (ret < 0)
487*4882a593Smuzhiyun return ret;
488*4882a593Smuzhiyun else
489*4882a593Smuzhiyun return buf;
490*4882a593Smuzhiyun }
491*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_read_no_pm);
492*4882a593Smuzhiyun
sdw_update_no_pm(struct sdw_slave * slave,u32 addr,u8 mask,u8 val)493*4882a593Smuzhiyun static int sdw_update_no_pm(struct sdw_slave *slave, u32 addr, u8 mask, u8 val)
494*4882a593Smuzhiyun {
495*4882a593Smuzhiyun int tmp;
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun tmp = sdw_read_no_pm(slave, addr);
498*4882a593Smuzhiyun if (tmp < 0)
499*4882a593Smuzhiyun return tmp;
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun tmp = (tmp & ~mask) | val;
502*4882a593Smuzhiyun return sdw_write_no_pm(slave, addr, tmp);
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun /**
506*4882a593Smuzhiyun * sdw_nread() - Read "n" contiguous SDW Slave registers
507*4882a593Smuzhiyun * @slave: SDW Slave
508*4882a593Smuzhiyun * @addr: Register address
509*4882a593Smuzhiyun * @count: length
510*4882a593Smuzhiyun * @val: Buffer for values to be read
511*4882a593Smuzhiyun */
sdw_nread(struct sdw_slave * slave,u32 addr,size_t count,u8 * val)512*4882a593Smuzhiyun int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
513*4882a593Smuzhiyun {
514*4882a593Smuzhiyun int ret;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun ret = pm_runtime_get_sync(&slave->dev);
517*4882a593Smuzhiyun if (ret < 0 && ret != -EACCES) {
518*4882a593Smuzhiyun pm_runtime_put_noidle(&slave->dev);
519*4882a593Smuzhiyun return ret;
520*4882a593Smuzhiyun }
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun ret = sdw_nread_no_pm(slave, addr, count, val);
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun pm_runtime_mark_last_busy(&slave->dev);
525*4882a593Smuzhiyun pm_runtime_put(&slave->dev);
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun return ret;
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_nread);
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun /**
532*4882a593Smuzhiyun * sdw_nwrite() - Write "n" contiguous SDW Slave registers
533*4882a593Smuzhiyun * @slave: SDW Slave
534*4882a593Smuzhiyun * @addr: Register address
535*4882a593Smuzhiyun * @count: length
536*4882a593Smuzhiyun * @val: Buffer for values to be read
537*4882a593Smuzhiyun */
sdw_nwrite(struct sdw_slave * slave,u32 addr,size_t count,u8 * val)538*4882a593Smuzhiyun int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val)
539*4882a593Smuzhiyun {
540*4882a593Smuzhiyun int ret;
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun ret = pm_runtime_get_sync(&slave->dev);
543*4882a593Smuzhiyun if (ret < 0 && ret != -EACCES) {
544*4882a593Smuzhiyun pm_runtime_put_noidle(&slave->dev);
545*4882a593Smuzhiyun return ret;
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun ret = sdw_nwrite_no_pm(slave, addr, count, val);
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun pm_runtime_mark_last_busy(&slave->dev);
551*4882a593Smuzhiyun pm_runtime_put(&slave->dev);
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun return ret;
554*4882a593Smuzhiyun }
555*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_nwrite);
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun /**
558*4882a593Smuzhiyun * sdw_read() - Read a SDW Slave register
559*4882a593Smuzhiyun * @slave: SDW Slave
560*4882a593Smuzhiyun * @addr: Register address
561*4882a593Smuzhiyun */
sdw_read(struct sdw_slave * slave,u32 addr)562*4882a593Smuzhiyun int sdw_read(struct sdw_slave *slave, u32 addr)
563*4882a593Smuzhiyun {
564*4882a593Smuzhiyun u8 buf;
565*4882a593Smuzhiyun int ret;
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun ret = sdw_nread(slave, addr, 1, &buf);
568*4882a593Smuzhiyun if (ret < 0)
569*4882a593Smuzhiyun return ret;
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun return buf;
572*4882a593Smuzhiyun }
573*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_read);
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun /**
576*4882a593Smuzhiyun * sdw_write() - Write a SDW Slave register
577*4882a593Smuzhiyun * @slave: SDW Slave
578*4882a593Smuzhiyun * @addr: Register address
579*4882a593Smuzhiyun * @value: Register value
580*4882a593Smuzhiyun */
sdw_write(struct sdw_slave * slave,u32 addr,u8 value)581*4882a593Smuzhiyun int sdw_write(struct sdw_slave *slave, u32 addr, u8 value)
582*4882a593Smuzhiyun {
583*4882a593Smuzhiyun return sdw_nwrite(slave, addr, 1, &value);
584*4882a593Smuzhiyun }
585*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_write);
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun /*
588*4882a593Smuzhiyun * SDW alert handling
589*4882a593Smuzhiyun */
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun /* called with bus_lock held */
sdw_get_slave(struct sdw_bus * bus,int i)592*4882a593Smuzhiyun static struct sdw_slave *sdw_get_slave(struct sdw_bus *bus, int i)
593*4882a593Smuzhiyun {
594*4882a593Smuzhiyun struct sdw_slave *slave = NULL;
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun list_for_each_entry(slave, &bus->slaves, node) {
597*4882a593Smuzhiyun if (slave->dev_num == i)
598*4882a593Smuzhiyun return slave;
599*4882a593Smuzhiyun }
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun return NULL;
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun
sdw_compare_devid(struct sdw_slave * slave,struct sdw_slave_id id)604*4882a593Smuzhiyun static int sdw_compare_devid(struct sdw_slave *slave, struct sdw_slave_id id)
605*4882a593Smuzhiyun {
606*4882a593Smuzhiyun if (slave->id.mfg_id != id.mfg_id ||
607*4882a593Smuzhiyun slave->id.part_id != id.part_id ||
608*4882a593Smuzhiyun slave->id.class_id != id.class_id ||
609*4882a593Smuzhiyun (slave->id.unique_id != SDW_IGNORED_UNIQUE_ID &&
610*4882a593Smuzhiyun slave->id.unique_id != id.unique_id))
611*4882a593Smuzhiyun return -ENODEV;
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun return 0;
614*4882a593Smuzhiyun }
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun /* called with bus_lock held */
sdw_get_device_num(struct sdw_slave * slave)617*4882a593Smuzhiyun static int sdw_get_device_num(struct sdw_slave *slave)
618*4882a593Smuzhiyun {
619*4882a593Smuzhiyun int bit;
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun bit = find_first_zero_bit(slave->bus->assigned, SDW_MAX_DEVICES);
622*4882a593Smuzhiyun if (bit == SDW_MAX_DEVICES) {
623*4882a593Smuzhiyun bit = -ENODEV;
624*4882a593Smuzhiyun goto err;
625*4882a593Smuzhiyun }
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun /*
628*4882a593Smuzhiyun * Do not update dev_num in Slave data structure here,
629*4882a593Smuzhiyun * Update once program dev_num is successful
630*4882a593Smuzhiyun */
631*4882a593Smuzhiyun set_bit(bit, slave->bus->assigned);
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun err:
634*4882a593Smuzhiyun return bit;
635*4882a593Smuzhiyun }
636*4882a593Smuzhiyun
sdw_assign_device_num(struct sdw_slave * slave)637*4882a593Smuzhiyun static int sdw_assign_device_num(struct sdw_slave *slave)
638*4882a593Smuzhiyun {
639*4882a593Smuzhiyun int ret, dev_num;
640*4882a593Smuzhiyun bool new_device = false;
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun /* check first if device number is assigned, if so reuse that */
643*4882a593Smuzhiyun if (!slave->dev_num) {
644*4882a593Smuzhiyun if (!slave->dev_num_sticky) {
645*4882a593Smuzhiyun mutex_lock(&slave->bus->bus_lock);
646*4882a593Smuzhiyun dev_num = sdw_get_device_num(slave);
647*4882a593Smuzhiyun mutex_unlock(&slave->bus->bus_lock);
648*4882a593Smuzhiyun if (dev_num < 0) {
649*4882a593Smuzhiyun dev_err(slave->bus->dev, "Get dev_num failed: %d\n",
650*4882a593Smuzhiyun dev_num);
651*4882a593Smuzhiyun return dev_num;
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun slave->dev_num = dev_num;
654*4882a593Smuzhiyun slave->dev_num_sticky = dev_num;
655*4882a593Smuzhiyun new_device = true;
656*4882a593Smuzhiyun } else {
657*4882a593Smuzhiyun slave->dev_num = slave->dev_num_sticky;
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun if (!new_device)
662*4882a593Smuzhiyun dev_dbg(slave->bus->dev,
663*4882a593Smuzhiyun "Slave already registered, reusing dev_num:%d\n",
664*4882a593Smuzhiyun slave->dev_num);
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun /* Clear the slave->dev_num to transfer message on device 0 */
667*4882a593Smuzhiyun dev_num = slave->dev_num;
668*4882a593Smuzhiyun slave->dev_num = 0;
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun ret = sdw_write_no_pm(slave, SDW_SCP_DEVNUMBER, dev_num);
671*4882a593Smuzhiyun if (ret < 0) {
672*4882a593Smuzhiyun dev_err(&slave->dev, "Program device_num %d failed: %d\n",
673*4882a593Smuzhiyun dev_num, ret);
674*4882a593Smuzhiyun return ret;
675*4882a593Smuzhiyun }
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun /* After xfer of msg, restore dev_num */
678*4882a593Smuzhiyun slave->dev_num = slave->dev_num_sticky;
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun return 0;
681*4882a593Smuzhiyun }
682*4882a593Smuzhiyun
sdw_extract_slave_id(struct sdw_bus * bus,u64 addr,struct sdw_slave_id * id)683*4882a593Smuzhiyun void sdw_extract_slave_id(struct sdw_bus *bus,
684*4882a593Smuzhiyun u64 addr, struct sdw_slave_id *id)
685*4882a593Smuzhiyun {
686*4882a593Smuzhiyun dev_dbg(bus->dev, "SDW Slave Addr: %llx\n", addr);
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun id->sdw_version = SDW_VERSION(addr);
689*4882a593Smuzhiyun id->unique_id = SDW_UNIQUE_ID(addr);
690*4882a593Smuzhiyun id->mfg_id = SDW_MFG_ID(addr);
691*4882a593Smuzhiyun id->part_id = SDW_PART_ID(addr);
692*4882a593Smuzhiyun id->class_id = SDW_CLASS_ID(addr);
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun dev_dbg(bus->dev,
695*4882a593Smuzhiyun "SDW Slave class_id %x, part_id %x, mfg_id %x, unique_id %x, version %x\n",
696*4882a593Smuzhiyun id->class_id, id->part_id, id->mfg_id,
697*4882a593Smuzhiyun id->unique_id, id->sdw_version);
698*4882a593Smuzhiyun }
699*4882a593Smuzhiyun
sdw_program_device_num(struct sdw_bus * bus)700*4882a593Smuzhiyun static int sdw_program_device_num(struct sdw_bus *bus)
701*4882a593Smuzhiyun {
702*4882a593Smuzhiyun u8 buf[SDW_NUM_DEV_ID_REGISTERS] = {0};
703*4882a593Smuzhiyun struct sdw_slave *slave, *_s;
704*4882a593Smuzhiyun struct sdw_slave_id id;
705*4882a593Smuzhiyun struct sdw_msg msg;
706*4882a593Smuzhiyun bool found;
707*4882a593Smuzhiyun int count = 0, ret;
708*4882a593Smuzhiyun u64 addr;
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun /* No Slave, so use raw xfer api */
711*4882a593Smuzhiyun ret = sdw_fill_msg(&msg, NULL, SDW_SCP_DEVID_0,
712*4882a593Smuzhiyun SDW_NUM_DEV_ID_REGISTERS, 0, SDW_MSG_FLAG_READ, buf);
713*4882a593Smuzhiyun if (ret < 0)
714*4882a593Smuzhiyun return ret;
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun do {
717*4882a593Smuzhiyun ret = sdw_transfer(bus, &msg);
718*4882a593Smuzhiyun if (ret == -ENODATA) { /* end of device id reads */
719*4882a593Smuzhiyun dev_dbg(bus->dev, "No more devices to enumerate\n");
720*4882a593Smuzhiyun ret = 0;
721*4882a593Smuzhiyun break;
722*4882a593Smuzhiyun }
723*4882a593Smuzhiyun if (ret < 0) {
724*4882a593Smuzhiyun dev_err(bus->dev, "DEVID read fail:%d\n", ret);
725*4882a593Smuzhiyun break;
726*4882a593Smuzhiyun }
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun /*
729*4882a593Smuzhiyun * Construct the addr and extract. Cast the higher shift
730*4882a593Smuzhiyun * bits to avoid truncation due to size limit.
731*4882a593Smuzhiyun */
732*4882a593Smuzhiyun addr = buf[5] | (buf[4] << 8) | (buf[3] << 16) |
733*4882a593Smuzhiyun ((u64)buf[2] << 24) | ((u64)buf[1] << 32) |
734*4882a593Smuzhiyun ((u64)buf[0] << 40);
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun sdw_extract_slave_id(bus, addr, &id);
737*4882a593Smuzhiyun
738*4882a593Smuzhiyun found = false;
739*4882a593Smuzhiyun /* Now compare with entries */
740*4882a593Smuzhiyun list_for_each_entry_safe(slave, _s, &bus->slaves, node) {
741*4882a593Smuzhiyun if (sdw_compare_devid(slave, id) == 0) {
742*4882a593Smuzhiyun found = true;
743*4882a593Smuzhiyun
744*4882a593Smuzhiyun /*
745*4882a593Smuzhiyun * Assign a new dev_num to this Slave and
746*4882a593Smuzhiyun * not mark it present. It will be marked
747*4882a593Smuzhiyun * present after it reports ATTACHED on new
748*4882a593Smuzhiyun * dev_num
749*4882a593Smuzhiyun */
750*4882a593Smuzhiyun ret = sdw_assign_device_num(slave);
751*4882a593Smuzhiyun if (ret) {
752*4882a593Smuzhiyun dev_err(slave->bus->dev,
753*4882a593Smuzhiyun "Assign dev_num failed:%d\n",
754*4882a593Smuzhiyun ret);
755*4882a593Smuzhiyun return ret;
756*4882a593Smuzhiyun }
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun break;
759*4882a593Smuzhiyun }
760*4882a593Smuzhiyun }
761*4882a593Smuzhiyun
762*4882a593Smuzhiyun if (!found) {
763*4882a593Smuzhiyun /* TODO: Park this device in Group 13 */
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun /*
766*4882a593Smuzhiyun * add Slave device even if there is no platform
767*4882a593Smuzhiyun * firmware description. There will be no driver probe
768*4882a593Smuzhiyun * but the user/integration will be able to see the
769*4882a593Smuzhiyun * device, enumeration status and device number in sysfs
770*4882a593Smuzhiyun */
771*4882a593Smuzhiyun sdw_slave_add(bus, &id, NULL);
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun dev_err(bus->dev, "Slave Entry not found\n");
774*4882a593Smuzhiyun }
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun count++;
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun /*
779*4882a593Smuzhiyun * Check till error out or retry (count) exhausts.
780*4882a593Smuzhiyun * Device can drop off and rejoin during enumeration
781*4882a593Smuzhiyun * so count till twice the bound.
782*4882a593Smuzhiyun */
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun } while (ret == 0 && count < (SDW_MAX_DEVICES * 2));
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun return ret;
787*4882a593Smuzhiyun }
788*4882a593Smuzhiyun
sdw_modify_slave_status(struct sdw_slave * slave,enum sdw_slave_status status)789*4882a593Smuzhiyun static void sdw_modify_slave_status(struct sdw_slave *slave,
790*4882a593Smuzhiyun enum sdw_slave_status status)
791*4882a593Smuzhiyun {
792*4882a593Smuzhiyun mutex_lock(&slave->bus->bus_lock);
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun dev_vdbg(&slave->dev,
795*4882a593Smuzhiyun "%s: changing status slave %d status %d new status %d\n",
796*4882a593Smuzhiyun __func__, slave->dev_num, slave->status, status);
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun if (status == SDW_SLAVE_UNATTACHED) {
799*4882a593Smuzhiyun dev_dbg(&slave->dev,
800*4882a593Smuzhiyun "%s: initializing completion for Slave %d\n",
801*4882a593Smuzhiyun __func__, slave->dev_num);
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun init_completion(&slave->enumeration_complete);
804*4882a593Smuzhiyun init_completion(&slave->initialization_complete);
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun } else if ((status == SDW_SLAVE_ATTACHED) &&
807*4882a593Smuzhiyun (slave->status == SDW_SLAVE_UNATTACHED)) {
808*4882a593Smuzhiyun dev_dbg(&slave->dev,
809*4882a593Smuzhiyun "%s: signaling completion for Slave %d\n",
810*4882a593Smuzhiyun __func__, slave->dev_num);
811*4882a593Smuzhiyun
812*4882a593Smuzhiyun complete(&slave->enumeration_complete);
813*4882a593Smuzhiyun }
814*4882a593Smuzhiyun slave->status = status;
815*4882a593Smuzhiyun mutex_unlock(&slave->bus->bus_lock);
816*4882a593Smuzhiyun }
817*4882a593Smuzhiyun
sdw_get_clk_stop_mode(struct sdw_slave * slave)818*4882a593Smuzhiyun static enum sdw_clk_stop_mode sdw_get_clk_stop_mode(struct sdw_slave *slave)
819*4882a593Smuzhiyun {
820*4882a593Smuzhiyun enum sdw_clk_stop_mode mode;
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun /*
823*4882a593Smuzhiyun * Query for clock stop mode if Slave implements
824*4882a593Smuzhiyun * ops->get_clk_stop_mode, else read from property.
825*4882a593Smuzhiyun */
826*4882a593Smuzhiyun if (slave->ops && slave->ops->get_clk_stop_mode) {
827*4882a593Smuzhiyun mode = slave->ops->get_clk_stop_mode(slave);
828*4882a593Smuzhiyun } else {
829*4882a593Smuzhiyun if (slave->prop.clk_stop_mode1)
830*4882a593Smuzhiyun mode = SDW_CLK_STOP_MODE1;
831*4882a593Smuzhiyun else
832*4882a593Smuzhiyun mode = SDW_CLK_STOP_MODE0;
833*4882a593Smuzhiyun }
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun return mode;
836*4882a593Smuzhiyun }
837*4882a593Smuzhiyun
sdw_slave_clk_stop_callback(struct sdw_slave * slave,enum sdw_clk_stop_mode mode,enum sdw_clk_stop_type type)838*4882a593Smuzhiyun static int sdw_slave_clk_stop_callback(struct sdw_slave *slave,
839*4882a593Smuzhiyun enum sdw_clk_stop_mode mode,
840*4882a593Smuzhiyun enum sdw_clk_stop_type type)
841*4882a593Smuzhiyun {
842*4882a593Smuzhiyun int ret;
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun if (slave->ops && slave->ops->clk_stop) {
845*4882a593Smuzhiyun ret = slave->ops->clk_stop(slave, mode, type);
846*4882a593Smuzhiyun if (ret < 0) {
847*4882a593Smuzhiyun dev_err(&slave->dev,
848*4882a593Smuzhiyun "Clk Stop type =%d failed: %d\n", type, ret);
849*4882a593Smuzhiyun return ret;
850*4882a593Smuzhiyun }
851*4882a593Smuzhiyun }
852*4882a593Smuzhiyun
853*4882a593Smuzhiyun return 0;
854*4882a593Smuzhiyun }
855*4882a593Smuzhiyun
sdw_slave_clk_stop_prepare(struct sdw_slave * slave,enum sdw_clk_stop_mode mode,bool prepare)856*4882a593Smuzhiyun static int sdw_slave_clk_stop_prepare(struct sdw_slave *slave,
857*4882a593Smuzhiyun enum sdw_clk_stop_mode mode,
858*4882a593Smuzhiyun bool prepare)
859*4882a593Smuzhiyun {
860*4882a593Smuzhiyun bool wake_en;
861*4882a593Smuzhiyun u32 val = 0;
862*4882a593Smuzhiyun int ret;
863*4882a593Smuzhiyun
864*4882a593Smuzhiyun wake_en = slave->prop.wake_capable;
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun if (prepare) {
867*4882a593Smuzhiyun val = SDW_SCP_SYSTEMCTRL_CLK_STP_PREP;
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun if (mode == SDW_CLK_STOP_MODE1)
870*4882a593Smuzhiyun val |= SDW_SCP_SYSTEMCTRL_CLK_STP_MODE1;
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun if (wake_en)
873*4882a593Smuzhiyun val |= SDW_SCP_SYSTEMCTRL_WAKE_UP_EN;
874*4882a593Smuzhiyun } else {
875*4882a593Smuzhiyun val = sdw_read_no_pm(slave, SDW_SCP_SYSTEMCTRL);
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun val &= ~(SDW_SCP_SYSTEMCTRL_CLK_STP_PREP);
878*4882a593Smuzhiyun }
879*4882a593Smuzhiyun
880*4882a593Smuzhiyun ret = sdw_write_no_pm(slave, SDW_SCP_SYSTEMCTRL, val);
881*4882a593Smuzhiyun
882*4882a593Smuzhiyun if (ret != 0)
883*4882a593Smuzhiyun dev_err(&slave->dev,
884*4882a593Smuzhiyun "Clock Stop prepare failed for slave: %d", ret);
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun return ret;
887*4882a593Smuzhiyun }
888*4882a593Smuzhiyun
sdw_bus_wait_for_clk_prep_deprep(struct sdw_bus * bus,u16 dev_num)889*4882a593Smuzhiyun static int sdw_bus_wait_for_clk_prep_deprep(struct sdw_bus *bus, u16 dev_num)
890*4882a593Smuzhiyun {
891*4882a593Smuzhiyun int retry = bus->clk_stop_timeout;
892*4882a593Smuzhiyun int val;
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun do {
895*4882a593Smuzhiyun val = sdw_bread_no_pm(bus, dev_num, SDW_SCP_STAT) &
896*4882a593Smuzhiyun SDW_SCP_STAT_CLK_STP_NF;
897*4882a593Smuzhiyun if (!val) {
898*4882a593Smuzhiyun dev_info(bus->dev, "clock stop prep/de-prep done slave:%d",
899*4882a593Smuzhiyun dev_num);
900*4882a593Smuzhiyun return 0;
901*4882a593Smuzhiyun }
902*4882a593Smuzhiyun
903*4882a593Smuzhiyun usleep_range(1000, 1500);
904*4882a593Smuzhiyun retry--;
905*4882a593Smuzhiyun } while (retry);
906*4882a593Smuzhiyun
907*4882a593Smuzhiyun dev_err(bus->dev, "clock stop prep/de-prep failed slave:%d",
908*4882a593Smuzhiyun dev_num);
909*4882a593Smuzhiyun
910*4882a593Smuzhiyun return -ETIMEDOUT;
911*4882a593Smuzhiyun }
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun /**
914*4882a593Smuzhiyun * sdw_bus_prep_clk_stop: prepare Slave(s) for clock stop
915*4882a593Smuzhiyun *
916*4882a593Smuzhiyun * @bus: SDW bus instance
917*4882a593Smuzhiyun *
918*4882a593Smuzhiyun * Query Slave for clock stop mode and prepare for that mode.
919*4882a593Smuzhiyun */
sdw_bus_prep_clk_stop(struct sdw_bus * bus)920*4882a593Smuzhiyun int sdw_bus_prep_clk_stop(struct sdw_bus *bus)
921*4882a593Smuzhiyun {
922*4882a593Smuzhiyun enum sdw_clk_stop_mode slave_mode;
923*4882a593Smuzhiyun bool simple_clk_stop = true;
924*4882a593Smuzhiyun struct sdw_slave *slave;
925*4882a593Smuzhiyun bool is_slave = false;
926*4882a593Smuzhiyun int ret = 0;
927*4882a593Smuzhiyun
928*4882a593Smuzhiyun /*
929*4882a593Smuzhiyun * In order to save on transition time, prepare
930*4882a593Smuzhiyun * each Slave and then wait for all Slave(s) to be
931*4882a593Smuzhiyun * prepared for clock stop.
932*4882a593Smuzhiyun */
933*4882a593Smuzhiyun list_for_each_entry(slave, &bus->slaves, node) {
934*4882a593Smuzhiyun if (!slave->dev_num)
935*4882a593Smuzhiyun continue;
936*4882a593Smuzhiyun
937*4882a593Smuzhiyun if (slave->status != SDW_SLAVE_ATTACHED &&
938*4882a593Smuzhiyun slave->status != SDW_SLAVE_ALERT)
939*4882a593Smuzhiyun continue;
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun /* Identify if Slave(s) are available on Bus */
942*4882a593Smuzhiyun is_slave = true;
943*4882a593Smuzhiyun
944*4882a593Smuzhiyun slave_mode = sdw_get_clk_stop_mode(slave);
945*4882a593Smuzhiyun slave->curr_clk_stop_mode = slave_mode;
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun ret = sdw_slave_clk_stop_callback(slave, slave_mode,
948*4882a593Smuzhiyun SDW_CLK_PRE_PREPARE);
949*4882a593Smuzhiyun if (ret < 0) {
950*4882a593Smuzhiyun dev_err(&slave->dev,
951*4882a593Smuzhiyun "pre-prepare failed:%d", ret);
952*4882a593Smuzhiyun return ret;
953*4882a593Smuzhiyun }
954*4882a593Smuzhiyun
955*4882a593Smuzhiyun ret = sdw_slave_clk_stop_prepare(slave,
956*4882a593Smuzhiyun slave_mode, true);
957*4882a593Smuzhiyun if (ret < 0) {
958*4882a593Smuzhiyun dev_err(&slave->dev,
959*4882a593Smuzhiyun "pre-prepare failed:%d", ret);
960*4882a593Smuzhiyun return ret;
961*4882a593Smuzhiyun }
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun if (slave_mode == SDW_CLK_STOP_MODE1)
964*4882a593Smuzhiyun simple_clk_stop = false;
965*4882a593Smuzhiyun }
966*4882a593Smuzhiyun
967*4882a593Smuzhiyun if (is_slave && !simple_clk_stop) {
968*4882a593Smuzhiyun ret = sdw_bus_wait_for_clk_prep_deprep(bus,
969*4882a593Smuzhiyun SDW_BROADCAST_DEV_NUM);
970*4882a593Smuzhiyun if (ret < 0)
971*4882a593Smuzhiyun return ret;
972*4882a593Smuzhiyun }
973*4882a593Smuzhiyun
974*4882a593Smuzhiyun /* Don't need to inform slaves if there is no slave attached */
975*4882a593Smuzhiyun if (!is_slave)
976*4882a593Smuzhiyun return ret;
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun /* Inform slaves that prep is done */
979*4882a593Smuzhiyun list_for_each_entry(slave, &bus->slaves, node) {
980*4882a593Smuzhiyun if (!slave->dev_num)
981*4882a593Smuzhiyun continue;
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun if (slave->status != SDW_SLAVE_ATTACHED &&
984*4882a593Smuzhiyun slave->status != SDW_SLAVE_ALERT)
985*4882a593Smuzhiyun continue;
986*4882a593Smuzhiyun
987*4882a593Smuzhiyun slave_mode = slave->curr_clk_stop_mode;
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun if (slave_mode == SDW_CLK_STOP_MODE1) {
990*4882a593Smuzhiyun ret = sdw_slave_clk_stop_callback(slave,
991*4882a593Smuzhiyun slave_mode,
992*4882a593Smuzhiyun SDW_CLK_POST_PREPARE);
993*4882a593Smuzhiyun
994*4882a593Smuzhiyun if (ret < 0) {
995*4882a593Smuzhiyun dev_err(&slave->dev,
996*4882a593Smuzhiyun "post-prepare failed:%d", ret);
997*4882a593Smuzhiyun }
998*4882a593Smuzhiyun }
999*4882a593Smuzhiyun }
1000*4882a593Smuzhiyun
1001*4882a593Smuzhiyun return ret;
1002*4882a593Smuzhiyun }
1003*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_bus_prep_clk_stop);
1004*4882a593Smuzhiyun
1005*4882a593Smuzhiyun /**
1006*4882a593Smuzhiyun * sdw_bus_clk_stop: stop bus clock
1007*4882a593Smuzhiyun *
1008*4882a593Smuzhiyun * @bus: SDW bus instance
1009*4882a593Smuzhiyun *
1010*4882a593Smuzhiyun * After preparing the Slaves for clock stop, stop the clock by broadcasting
1011*4882a593Smuzhiyun * write to SCP_CTRL register.
1012*4882a593Smuzhiyun */
sdw_bus_clk_stop(struct sdw_bus * bus)1013*4882a593Smuzhiyun int sdw_bus_clk_stop(struct sdw_bus *bus)
1014*4882a593Smuzhiyun {
1015*4882a593Smuzhiyun int ret;
1016*4882a593Smuzhiyun
1017*4882a593Smuzhiyun /*
1018*4882a593Smuzhiyun * broadcast clock stop now, attached Slaves will ACK this,
1019*4882a593Smuzhiyun * unattached will ignore
1020*4882a593Smuzhiyun */
1021*4882a593Smuzhiyun ret = sdw_bwrite_no_pm(bus, SDW_BROADCAST_DEV_NUM,
1022*4882a593Smuzhiyun SDW_SCP_CTRL, SDW_SCP_CTRL_CLK_STP_NOW);
1023*4882a593Smuzhiyun if (ret < 0) {
1024*4882a593Smuzhiyun if (ret == -ENODATA)
1025*4882a593Smuzhiyun dev_dbg(bus->dev,
1026*4882a593Smuzhiyun "ClockStopNow Broadcast msg ignored %d", ret);
1027*4882a593Smuzhiyun else
1028*4882a593Smuzhiyun dev_err(bus->dev,
1029*4882a593Smuzhiyun "ClockStopNow Broadcast msg failed %d", ret);
1030*4882a593Smuzhiyun return ret;
1031*4882a593Smuzhiyun }
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun return 0;
1034*4882a593Smuzhiyun }
1035*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_bus_clk_stop);
1036*4882a593Smuzhiyun
1037*4882a593Smuzhiyun /**
1038*4882a593Smuzhiyun * sdw_bus_exit_clk_stop: Exit clock stop mode
1039*4882a593Smuzhiyun *
1040*4882a593Smuzhiyun * @bus: SDW bus instance
1041*4882a593Smuzhiyun *
1042*4882a593Smuzhiyun * This De-prepares the Slaves by exiting Clock Stop Mode 0. For the Slaves
1043*4882a593Smuzhiyun * exiting Clock Stop Mode 1, they will be de-prepared after they enumerate
1044*4882a593Smuzhiyun * back.
1045*4882a593Smuzhiyun */
sdw_bus_exit_clk_stop(struct sdw_bus * bus)1046*4882a593Smuzhiyun int sdw_bus_exit_clk_stop(struct sdw_bus *bus)
1047*4882a593Smuzhiyun {
1048*4882a593Smuzhiyun enum sdw_clk_stop_mode mode;
1049*4882a593Smuzhiyun bool simple_clk_stop = true;
1050*4882a593Smuzhiyun struct sdw_slave *slave;
1051*4882a593Smuzhiyun bool is_slave = false;
1052*4882a593Smuzhiyun int ret;
1053*4882a593Smuzhiyun
1054*4882a593Smuzhiyun /*
1055*4882a593Smuzhiyun * In order to save on transition time, de-prepare
1056*4882a593Smuzhiyun * each Slave and then wait for all Slave(s) to be
1057*4882a593Smuzhiyun * de-prepared after clock resume.
1058*4882a593Smuzhiyun */
1059*4882a593Smuzhiyun list_for_each_entry(slave, &bus->slaves, node) {
1060*4882a593Smuzhiyun if (!slave->dev_num)
1061*4882a593Smuzhiyun continue;
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun if (slave->status != SDW_SLAVE_ATTACHED &&
1064*4882a593Smuzhiyun slave->status != SDW_SLAVE_ALERT)
1065*4882a593Smuzhiyun continue;
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun /* Identify if Slave(s) are available on Bus */
1068*4882a593Smuzhiyun is_slave = true;
1069*4882a593Smuzhiyun
1070*4882a593Smuzhiyun mode = slave->curr_clk_stop_mode;
1071*4882a593Smuzhiyun
1072*4882a593Smuzhiyun if (mode == SDW_CLK_STOP_MODE1) {
1073*4882a593Smuzhiyun simple_clk_stop = false;
1074*4882a593Smuzhiyun continue;
1075*4882a593Smuzhiyun }
1076*4882a593Smuzhiyun
1077*4882a593Smuzhiyun ret = sdw_slave_clk_stop_callback(slave, mode,
1078*4882a593Smuzhiyun SDW_CLK_PRE_DEPREPARE);
1079*4882a593Smuzhiyun if (ret < 0)
1080*4882a593Smuzhiyun dev_warn(&slave->dev,
1081*4882a593Smuzhiyun "clk stop deprep failed:%d", ret);
1082*4882a593Smuzhiyun
1083*4882a593Smuzhiyun ret = sdw_slave_clk_stop_prepare(slave, mode,
1084*4882a593Smuzhiyun false);
1085*4882a593Smuzhiyun
1086*4882a593Smuzhiyun if (ret < 0)
1087*4882a593Smuzhiyun dev_warn(&slave->dev,
1088*4882a593Smuzhiyun "clk stop deprep failed:%d", ret);
1089*4882a593Smuzhiyun }
1090*4882a593Smuzhiyun
1091*4882a593Smuzhiyun if (is_slave && !simple_clk_stop)
1092*4882a593Smuzhiyun sdw_bus_wait_for_clk_prep_deprep(bus, SDW_BROADCAST_DEV_NUM);
1093*4882a593Smuzhiyun
1094*4882a593Smuzhiyun /*
1095*4882a593Smuzhiyun * Don't need to call slave callback function if there is no slave
1096*4882a593Smuzhiyun * attached
1097*4882a593Smuzhiyun */
1098*4882a593Smuzhiyun if (!is_slave)
1099*4882a593Smuzhiyun return 0;
1100*4882a593Smuzhiyun
1101*4882a593Smuzhiyun list_for_each_entry(slave, &bus->slaves, node) {
1102*4882a593Smuzhiyun if (!slave->dev_num)
1103*4882a593Smuzhiyun continue;
1104*4882a593Smuzhiyun
1105*4882a593Smuzhiyun if (slave->status != SDW_SLAVE_ATTACHED &&
1106*4882a593Smuzhiyun slave->status != SDW_SLAVE_ALERT)
1107*4882a593Smuzhiyun continue;
1108*4882a593Smuzhiyun
1109*4882a593Smuzhiyun mode = slave->curr_clk_stop_mode;
1110*4882a593Smuzhiyun sdw_slave_clk_stop_callback(slave, mode,
1111*4882a593Smuzhiyun SDW_CLK_POST_DEPREPARE);
1112*4882a593Smuzhiyun }
1113*4882a593Smuzhiyun
1114*4882a593Smuzhiyun return 0;
1115*4882a593Smuzhiyun }
1116*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_bus_exit_clk_stop);
1117*4882a593Smuzhiyun
sdw_configure_dpn_intr(struct sdw_slave * slave,int port,bool enable,int mask)1118*4882a593Smuzhiyun int sdw_configure_dpn_intr(struct sdw_slave *slave,
1119*4882a593Smuzhiyun int port, bool enable, int mask)
1120*4882a593Smuzhiyun {
1121*4882a593Smuzhiyun u32 addr;
1122*4882a593Smuzhiyun int ret;
1123*4882a593Smuzhiyun u8 val = 0;
1124*4882a593Smuzhiyun
1125*4882a593Smuzhiyun if (slave->bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL) {
1126*4882a593Smuzhiyun dev_dbg(&slave->dev, "TEST FAIL interrupt %s\n",
1127*4882a593Smuzhiyun enable ? "on" : "off");
1128*4882a593Smuzhiyun mask |= SDW_DPN_INT_TEST_FAIL;
1129*4882a593Smuzhiyun }
1130*4882a593Smuzhiyun
1131*4882a593Smuzhiyun addr = SDW_DPN_INTMASK(port);
1132*4882a593Smuzhiyun
1133*4882a593Smuzhiyun /* Set/Clear port ready interrupt mask */
1134*4882a593Smuzhiyun if (enable) {
1135*4882a593Smuzhiyun val |= mask;
1136*4882a593Smuzhiyun val |= SDW_DPN_INT_PORT_READY;
1137*4882a593Smuzhiyun } else {
1138*4882a593Smuzhiyun val &= ~(mask);
1139*4882a593Smuzhiyun val &= ~SDW_DPN_INT_PORT_READY;
1140*4882a593Smuzhiyun }
1141*4882a593Smuzhiyun
1142*4882a593Smuzhiyun ret = sdw_update(slave, addr, (mask | SDW_DPN_INT_PORT_READY), val);
1143*4882a593Smuzhiyun if (ret < 0)
1144*4882a593Smuzhiyun dev_err(slave->bus->dev,
1145*4882a593Smuzhiyun "SDW_DPN_INTMASK write failed:%d\n", val);
1146*4882a593Smuzhiyun
1147*4882a593Smuzhiyun return ret;
1148*4882a593Smuzhiyun }
1149*4882a593Smuzhiyun
sdw_slave_set_frequency(struct sdw_slave * slave)1150*4882a593Smuzhiyun static int sdw_slave_set_frequency(struct sdw_slave *slave)
1151*4882a593Smuzhiyun {
1152*4882a593Smuzhiyun u32 mclk_freq = slave->bus->prop.mclk_freq;
1153*4882a593Smuzhiyun u32 curr_freq = slave->bus->params.curr_dr_freq >> 1;
1154*4882a593Smuzhiyun unsigned int scale;
1155*4882a593Smuzhiyun u8 scale_index;
1156*4882a593Smuzhiyun u8 base;
1157*4882a593Smuzhiyun int ret;
1158*4882a593Smuzhiyun
1159*4882a593Smuzhiyun /*
1160*4882a593Smuzhiyun * frequency base and scale registers are required for SDCA
1161*4882a593Smuzhiyun * devices. They may also be used for 1.2+/non-SDCA devices,
1162*4882a593Smuzhiyun * but we will need a DisCo property to cover this case
1163*4882a593Smuzhiyun */
1164*4882a593Smuzhiyun if (!slave->id.class_id)
1165*4882a593Smuzhiyun return 0;
1166*4882a593Smuzhiyun
1167*4882a593Smuzhiyun if (!mclk_freq) {
1168*4882a593Smuzhiyun dev_err(&slave->dev,
1169*4882a593Smuzhiyun "no bus MCLK, cannot set SDW_SCP_BUS_CLOCK_BASE\n");
1170*4882a593Smuzhiyun return -EINVAL;
1171*4882a593Smuzhiyun }
1172*4882a593Smuzhiyun
1173*4882a593Smuzhiyun /*
1174*4882a593Smuzhiyun * map base frequency using Table 89 of SoundWire 1.2 spec.
1175*4882a593Smuzhiyun * The order of the tests just follows the specification, this
1176*4882a593Smuzhiyun * is not a selection between possible values or a search for
1177*4882a593Smuzhiyun * the best value but just a mapping. Only one case per platform
1178*4882a593Smuzhiyun * is relevant.
1179*4882a593Smuzhiyun * Some BIOS have inconsistent values for mclk_freq but a
1180*4882a593Smuzhiyun * correct root so we force the mclk_freq to avoid variations.
1181*4882a593Smuzhiyun */
1182*4882a593Smuzhiyun if (!(19200000 % mclk_freq)) {
1183*4882a593Smuzhiyun mclk_freq = 19200000;
1184*4882a593Smuzhiyun base = SDW_SCP_BASE_CLOCK_19200000_HZ;
1185*4882a593Smuzhiyun } else if (!(24000000 % mclk_freq)) {
1186*4882a593Smuzhiyun mclk_freq = 24000000;
1187*4882a593Smuzhiyun base = SDW_SCP_BASE_CLOCK_24000000_HZ;
1188*4882a593Smuzhiyun } else if (!(24576000 % mclk_freq)) {
1189*4882a593Smuzhiyun mclk_freq = 24576000;
1190*4882a593Smuzhiyun base = SDW_SCP_BASE_CLOCK_24576000_HZ;
1191*4882a593Smuzhiyun } else if (!(22579200 % mclk_freq)) {
1192*4882a593Smuzhiyun mclk_freq = 22579200;
1193*4882a593Smuzhiyun base = SDW_SCP_BASE_CLOCK_22579200_HZ;
1194*4882a593Smuzhiyun } else if (!(32000000 % mclk_freq)) {
1195*4882a593Smuzhiyun mclk_freq = 32000000;
1196*4882a593Smuzhiyun base = SDW_SCP_BASE_CLOCK_32000000_HZ;
1197*4882a593Smuzhiyun } else {
1198*4882a593Smuzhiyun dev_err(&slave->dev,
1199*4882a593Smuzhiyun "Unsupported clock base, mclk %d\n",
1200*4882a593Smuzhiyun mclk_freq);
1201*4882a593Smuzhiyun return -EINVAL;
1202*4882a593Smuzhiyun }
1203*4882a593Smuzhiyun
1204*4882a593Smuzhiyun if (mclk_freq % curr_freq) {
1205*4882a593Smuzhiyun dev_err(&slave->dev,
1206*4882a593Smuzhiyun "mclk %d is not multiple of bus curr_freq %d\n",
1207*4882a593Smuzhiyun mclk_freq, curr_freq);
1208*4882a593Smuzhiyun return -EINVAL;
1209*4882a593Smuzhiyun }
1210*4882a593Smuzhiyun
1211*4882a593Smuzhiyun scale = mclk_freq / curr_freq;
1212*4882a593Smuzhiyun
1213*4882a593Smuzhiyun /*
1214*4882a593Smuzhiyun * map scale to Table 90 of SoundWire 1.2 spec - and check
1215*4882a593Smuzhiyun * that the scale is a power of two and maximum 64
1216*4882a593Smuzhiyun */
1217*4882a593Smuzhiyun scale_index = ilog2(scale);
1218*4882a593Smuzhiyun
1219*4882a593Smuzhiyun if (BIT(scale_index) != scale || scale_index > 6) {
1220*4882a593Smuzhiyun dev_err(&slave->dev,
1221*4882a593Smuzhiyun "No match found for scale %d, bus mclk %d curr_freq %d\n",
1222*4882a593Smuzhiyun scale, mclk_freq, curr_freq);
1223*4882a593Smuzhiyun return -EINVAL;
1224*4882a593Smuzhiyun }
1225*4882a593Smuzhiyun scale_index++;
1226*4882a593Smuzhiyun
1227*4882a593Smuzhiyun ret = sdw_write_no_pm(slave, SDW_SCP_BUS_CLOCK_BASE, base);
1228*4882a593Smuzhiyun if (ret < 0) {
1229*4882a593Smuzhiyun dev_err(&slave->dev,
1230*4882a593Smuzhiyun "SDW_SCP_BUS_CLOCK_BASE write failed:%d\n", ret);
1231*4882a593Smuzhiyun return ret;
1232*4882a593Smuzhiyun }
1233*4882a593Smuzhiyun
1234*4882a593Smuzhiyun /* initialize scale for both banks */
1235*4882a593Smuzhiyun ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B0, scale_index);
1236*4882a593Smuzhiyun if (ret < 0) {
1237*4882a593Smuzhiyun dev_err(&slave->dev,
1238*4882a593Smuzhiyun "SDW_SCP_BUSCLOCK_SCALE_B0 write failed:%d\n", ret);
1239*4882a593Smuzhiyun return ret;
1240*4882a593Smuzhiyun }
1241*4882a593Smuzhiyun ret = sdw_write_no_pm(slave, SDW_SCP_BUSCLOCK_SCALE_B1, scale_index);
1242*4882a593Smuzhiyun if (ret < 0)
1243*4882a593Smuzhiyun dev_err(&slave->dev,
1244*4882a593Smuzhiyun "SDW_SCP_BUSCLOCK_SCALE_B1 write failed:%d\n", ret);
1245*4882a593Smuzhiyun
1246*4882a593Smuzhiyun dev_dbg(&slave->dev,
1247*4882a593Smuzhiyun "Configured bus base %d, scale %d, mclk %d, curr_freq %d\n",
1248*4882a593Smuzhiyun base, scale_index, mclk_freq, curr_freq);
1249*4882a593Smuzhiyun
1250*4882a593Smuzhiyun return ret;
1251*4882a593Smuzhiyun }
1252*4882a593Smuzhiyun
sdw_initialize_slave(struct sdw_slave * slave)1253*4882a593Smuzhiyun static int sdw_initialize_slave(struct sdw_slave *slave)
1254*4882a593Smuzhiyun {
1255*4882a593Smuzhiyun struct sdw_slave_prop *prop = &slave->prop;
1256*4882a593Smuzhiyun int ret;
1257*4882a593Smuzhiyun u8 val;
1258*4882a593Smuzhiyun
1259*4882a593Smuzhiyun ret = sdw_slave_set_frequency(slave);
1260*4882a593Smuzhiyun if (ret < 0)
1261*4882a593Smuzhiyun return ret;
1262*4882a593Smuzhiyun
1263*4882a593Smuzhiyun /*
1264*4882a593Smuzhiyun * Set SCP_INT1_MASK register, typically bus clash and
1265*4882a593Smuzhiyun * implementation-defined interrupt mask. The Parity detection
1266*4882a593Smuzhiyun * may not always be correct on startup so its use is
1267*4882a593Smuzhiyun * device-dependent, it might e.g. only be enabled in
1268*4882a593Smuzhiyun * steady-state after a couple of frames.
1269*4882a593Smuzhiyun */
1270*4882a593Smuzhiyun val = slave->prop.scp_int1_mask;
1271*4882a593Smuzhiyun
1272*4882a593Smuzhiyun /* Enable SCP interrupts */
1273*4882a593Smuzhiyun ret = sdw_update_no_pm(slave, SDW_SCP_INTMASK1, val, val);
1274*4882a593Smuzhiyun if (ret < 0) {
1275*4882a593Smuzhiyun dev_err(slave->bus->dev,
1276*4882a593Smuzhiyun "SDW_SCP_INTMASK1 write failed:%d\n", ret);
1277*4882a593Smuzhiyun return ret;
1278*4882a593Smuzhiyun }
1279*4882a593Smuzhiyun
1280*4882a593Smuzhiyun /* No need to continue if DP0 is not present */
1281*4882a593Smuzhiyun if (!slave->prop.dp0_prop)
1282*4882a593Smuzhiyun return 0;
1283*4882a593Smuzhiyun
1284*4882a593Smuzhiyun /* Enable DP0 interrupts */
1285*4882a593Smuzhiyun val = prop->dp0_prop->imp_def_interrupts;
1286*4882a593Smuzhiyun val |= SDW_DP0_INT_PORT_READY | SDW_DP0_INT_BRA_FAILURE;
1287*4882a593Smuzhiyun
1288*4882a593Smuzhiyun ret = sdw_update_no_pm(slave, SDW_DP0_INTMASK, val, val);
1289*4882a593Smuzhiyun if (ret < 0)
1290*4882a593Smuzhiyun dev_err(slave->bus->dev,
1291*4882a593Smuzhiyun "SDW_DP0_INTMASK read failed:%d\n", ret);
1292*4882a593Smuzhiyun return ret;
1293*4882a593Smuzhiyun }
1294*4882a593Smuzhiyun
sdw_handle_dp0_interrupt(struct sdw_slave * slave,u8 * slave_status)1295*4882a593Smuzhiyun static int sdw_handle_dp0_interrupt(struct sdw_slave *slave, u8 *slave_status)
1296*4882a593Smuzhiyun {
1297*4882a593Smuzhiyun u8 clear = 0, impl_int_mask;
1298*4882a593Smuzhiyun int status, status2, ret, count = 0;
1299*4882a593Smuzhiyun
1300*4882a593Smuzhiyun status = sdw_read(slave, SDW_DP0_INT);
1301*4882a593Smuzhiyun if (status < 0) {
1302*4882a593Smuzhiyun dev_err(slave->bus->dev,
1303*4882a593Smuzhiyun "SDW_DP0_INT read failed:%d\n", status);
1304*4882a593Smuzhiyun return status;
1305*4882a593Smuzhiyun }
1306*4882a593Smuzhiyun
1307*4882a593Smuzhiyun do {
1308*4882a593Smuzhiyun if (status & SDW_DP0_INT_TEST_FAIL) {
1309*4882a593Smuzhiyun dev_err(&slave->dev, "Test fail for port 0\n");
1310*4882a593Smuzhiyun clear |= SDW_DP0_INT_TEST_FAIL;
1311*4882a593Smuzhiyun }
1312*4882a593Smuzhiyun
1313*4882a593Smuzhiyun /*
1314*4882a593Smuzhiyun * Assumption: PORT_READY interrupt will be received only for
1315*4882a593Smuzhiyun * ports implementing Channel Prepare state machine (CP_SM)
1316*4882a593Smuzhiyun */
1317*4882a593Smuzhiyun
1318*4882a593Smuzhiyun if (status & SDW_DP0_INT_PORT_READY) {
1319*4882a593Smuzhiyun complete(&slave->port_ready[0]);
1320*4882a593Smuzhiyun clear |= SDW_DP0_INT_PORT_READY;
1321*4882a593Smuzhiyun }
1322*4882a593Smuzhiyun
1323*4882a593Smuzhiyun if (status & SDW_DP0_INT_BRA_FAILURE) {
1324*4882a593Smuzhiyun dev_err(&slave->dev, "BRA failed\n");
1325*4882a593Smuzhiyun clear |= SDW_DP0_INT_BRA_FAILURE;
1326*4882a593Smuzhiyun }
1327*4882a593Smuzhiyun
1328*4882a593Smuzhiyun impl_int_mask = SDW_DP0_INT_IMPDEF1 |
1329*4882a593Smuzhiyun SDW_DP0_INT_IMPDEF2 | SDW_DP0_INT_IMPDEF3;
1330*4882a593Smuzhiyun
1331*4882a593Smuzhiyun if (status & impl_int_mask) {
1332*4882a593Smuzhiyun clear |= impl_int_mask;
1333*4882a593Smuzhiyun *slave_status = clear;
1334*4882a593Smuzhiyun }
1335*4882a593Smuzhiyun
1336*4882a593Smuzhiyun /* clear the interrupt */
1337*4882a593Smuzhiyun ret = sdw_write(slave, SDW_DP0_INT, clear);
1338*4882a593Smuzhiyun if (ret < 0) {
1339*4882a593Smuzhiyun dev_err(slave->bus->dev,
1340*4882a593Smuzhiyun "SDW_DP0_INT write failed:%d\n", ret);
1341*4882a593Smuzhiyun return ret;
1342*4882a593Smuzhiyun }
1343*4882a593Smuzhiyun
1344*4882a593Smuzhiyun /* Read DP0 interrupt again */
1345*4882a593Smuzhiyun status2 = sdw_read(slave, SDW_DP0_INT);
1346*4882a593Smuzhiyun if (status2 < 0) {
1347*4882a593Smuzhiyun dev_err(slave->bus->dev,
1348*4882a593Smuzhiyun "SDW_DP0_INT read failed:%d\n", status2);
1349*4882a593Smuzhiyun return status2;
1350*4882a593Smuzhiyun }
1351*4882a593Smuzhiyun status &= status2;
1352*4882a593Smuzhiyun
1353*4882a593Smuzhiyun count++;
1354*4882a593Smuzhiyun
1355*4882a593Smuzhiyun /* we can get alerts while processing so keep retrying */
1356*4882a593Smuzhiyun } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
1357*4882a593Smuzhiyun
1358*4882a593Smuzhiyun if (count == SDW_READ_INTR_CLEAR_RETRY)
1359*4882a593Smuzhiyun dev_warn(slave->bus->dev, "Reached MAX_RETRY on DP0 read\n");
1360*4882a593Smuzhiyun
1361*4882a593Smuzhiyun return ret;
1362*4882a593Smuzhiyun }
1363*4882a593Smuzhiyun
sdw_handle_port_interrupt(struct sdw_slave * slave,int port,u8 * slave_status)1364*4882a593Smuzhiyun static int sdw_handle_port_interrupt(struct sdw_slave *slave,
1365*4882a593Smuzhiyun int port, u8 *slave_status)
1366*4882a593Smuzhiyun {
1367*4882a593Smuzhiyun u8 clear = 0, impl_int_mask;
1368*4882a593Smuzhiyun int status, status2, ret, count = 0;
1369*4882a593Smuzhiyun u32 addr;
1370*4882a593Smuzhiyun
1371*4882a593Smuzhiyun if (port == 0)
1372*4882a593Smuzhiyun return sdw_handle_dp0_interrupt(slave, slave_status);
1373*4882a593Smuzhiyun
1374*4882a593Smuzhiyun addr = SDW_DPN_INT(port);
1375*4882a593Smuzhiyun status = sdw_read(slave, addr);
1376*4882a593Smuzhiyun if (status < 0) {
1377*4882a593Smuzhiyun dev_err(slave->bus->dev,
1378*4882a593Smuzhiyun "SDW_DPN_INT read failed:%d\n", status);
1379*4882a593Smuzhiyun
1380*4882a593Smuzhiyun return status;
1381*4882a593Smuzhiyun }
1382*4882a593Smuzhiyun
1383*4882a593Smuzhiyun do {
1384*4882a593Smuzhiyun if (status & SDW_DPN_INT_TEST_FAIL) {
1385*4882a593Smuzhiyun dev_err(&slave->dev, "Test fail for port:%d\n", port);
1386*4882a593Smuzhiyun clear |= SDW_DPN_INT_TEST_FAIL;
1387*4882a593Smuzhiyun }
1388*4882a593Smuzhiyun
1389*4882a593Smuzhiyun /*
1390*4882a593Smuzhiyun * Assumption: PORT_READY interrupt will be received only
1391*4882a593Smuzhiyun * for ports implementing CP_SM.
1392*4882a593Smuzhiyun */
1393*4882a593Smuzhiyun if (status & SDW_DPN_INT_PORT_READY) {
1394*4882a593Smuzhiyun complete(&slave->port_ready[port]);
1395*4882a593Smuzhiyun clear |= SDW_DPN_INT_PORT_READY;
1396*4882a593Smuzhiyun }
1397*4882a593Smuzhiyun
1398*4882a593Smuzhiyun impl_int_mask = SDW_DPN_INT_IMPDEF1 |
1399*4882a593Smuzhiyun SDW_DPN_INT_IMPDEF2 | SDW_DPN_INT_IMPDEF3;
1400*4882a593Smuzhiyun
1401*4882a593Smuzhiyun if (status & impl_int_mask) {
1402*4882a593Smuzhiyun clear |= impl_int_mask;
1403*4882a593Smuzhiyun *slave_status = clear;
1404*4882a593Smuzhiyun }
1405*4882a593Smuzhiyun
1406*4882a593Smuzhiyun /* clear the interrupt */
1407*4882a593Smuzhiyun ret = sdw_write(slave, addr, clear);
1408*4882a593Smuzhiyun if (ret < 0) {
1409*4882a593Smuzhiyun dev_err(slave->bus->dev,
1410*4882a593Smuzhiyun "SDW_DPN_INT write failed:%d\n", ret);
1411*4882a593Smuzhiyun return ret;
1412*4882a593Smuzhiyun }
1413*4882a593Smuzhiyun
1414*4882a593Smuzhiyun /* Read DPN interrupt again */
1415*4882a593Smuzhiyun status2 = sdw_read(slave, addr);
1416*4882a593Smuzhiyun if (status2 < 0) {
1417*4882a593Smuzhiyun dev_err(slave->bus->dev,
1418*4882a593Smuzhiyun "SDW_DPN_INT read failed:%d\n", status2);
1419*4882a593Smuzhiyun return status2;
1420*4882a593Smuzhiyun }
1421*4882a593Smuzhiyun status &= status2;
1422*4882a593Smuzhiyun
1423*4882a593Smuzhiyun count++;
1424*4882a593Smuzhiyun
1425*4882a593Smuzhiyun /* we can get alerts while processing so keep retrying */
1426*4882a593Smuzhiyun } while (status != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
1427*4882a593Smuzhiyun
1428*4882a593Smuzhiyun if (count == SDW_READ_INTR_CLEAR_RETRY)
1429*4882a593Smuzhiyun dev_warn(slave->bus->dev, "Reached MAX_RETRY on port read");
1430*4882a593Smuzhiyun
1431*4882a593Smuzhiyun return ret;
1432*4882a593Smuzhiyun }
1433*4882a593Smuzhiyun
sdw_handle_slave_alerts(struct sdw_slave * slave)1434*4882a593Smuzhiyun static int sdw_handle_slave_alerts(struct sdw_slave *slave)
1435*4882a593Smuzhiyun {
1436*4882a593Smuzhiyun struct sdw_slave_intr_status slave_intr;
1437*4882a593Smuzhiyun u8 clear = 0, bit, port_status[15] = {0};
1438*4882a593Smuzhiyun int port_num, stat, ret, count = 0;
1439*4882a593Smuzhiyun unsigned long port;
1440*4882a593Smuzhiyun bool slave_notify = false;
1441*4882a593Smuzhiyun u8 buf, buf2[2], _buf, _buf2[2];
1442*4882a593Smuzhiyun bool parity_check;
1443*4882a593Smuzhiyun bool parity_quirk;
1444*4882a593Smuzhiyun
1445*4882a593Smuzhiyun sdw_modify_slave_status(slave, SDW_SLAVE_ALERT);
1446*4882a593Smuzhiyun
1447*4882a593Smuzhiyun ret = pm_runtime_get_sync(&slave->dev);
1448*4882a593Smuzhiyun if (ret < 0 && ret != -EACCES) {
1449*4882a593Smuzhiyun dev_err(&slave->dev, "Failed to resume device: %d\n", ret);
1450*4882a593Smuzhiyun pm_runtime_put_noidle(&slave->dev);
1451*4882a593Smuzhiyun return ret;
1452*4882a593Smuzhiyun }
1453*4882a593Smuzhiyun
1454*4882a593Smuzhiyun /* Read Intstat 1, Intstat 2 and Intstat 3 registers */
1455*4882a593Smuzhiyun ret = sdw_read(slave, SDW_SCP_INT1);
1456*4882a593Smuzhiyun if (ret < 0) {
1457*4882a593Smuzhiyun dev_err(slave->bus->dev,
1458*4882a593Smuzhiyun "SDW_SCP_INT1 read failed:%d\n", ret);
1459*4882a593Smuzhiyun goto io_err;
1460*4882a593Smuzhiyun }
1461*4882a593Smuzhiyun buf = ret;
1462*4882a593Smuzhiyun
1463*4882a593Smuzhiyun ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, buf2);
1464*4882a593Smuzhiyun if (ret < 0) {
1465*4882a593Smuzhiyun dev_err(slave->bus->dev,
1466*4882a593Smuzhiyun "SDW_SCP_INT2/3 read failed:%d\n", ret);
1467*4882a593Smuzhiyun goto io_err;
1468*4882a593Smuzhiyun }
1469*4882a593Smuzhiyun
1470*4882a593Smuzhiyun do {
1471*4882a593Smuzhiyun /*
1472*4882a593Smuzhiyun * Check parity, bus clash and Slave (impl defined)
1473*4882a593Smuzhiyun * interrupt
1474*4882a593Smuzhiyun */
1475*4882a593Smuzhiyun if (buf & SDW_SCP_INT1_PARITY) {
1476*4882a593Smuzhiyun parity_check = slave->prop.scp_int1_mask & SDW_SCP_INT1_PARITY;
1477*4882a593Smuzhiyun parity_quirk = !slave->first_interrupt_done &&
1478*4882a593Smuzhiyun (slave->prop.quirks & SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY);
1479*4882a593Smuzhiyun
1480*4882a593Smuzhiyun if (parity_check && !parity_quirk)
1481*4882a593Smuzhiyun dev_err(&slave->dev, "Parity error detected\n");
1482*4882a593Smuzhiyun clear |= SDW_SCP_INT1_PARITY;
1483*4882a593Smuzhiyun }
1484*4882a593Smuzhiyun
1485*4882a593Smuzhiyun if (buf & SDW_SCP_INT1_BUS_CLASH) {
1486*4882a593Smuzhiyun if (slave->prop.scp_int1_mask & SDW_SCP_INT1_BUS_CLASH)
1487*4882a593Smuzhiyun dev_err(&slave->dev, "Bus clash detected\n");
1488*4882a593Smuzhiyun clear |= SDW_SCP_INT1_BUS_CLASH;
1489*4882a593Smuzhiyun }
1490*4882a593Smuzhiyun
1491*4882a593Smuzhiyun /*
1492*4882a593Smuzhiyun * When bus clash or parity errors are detected, such errors
1493*4882a593Smuzhiyun * are unlikely to be recoverable errors.
1494*4882a593Smuzhiyun * TODO: In such scenario, reset bus. Make this configurable
1495*4882a593Smuzhiyun * via sysfs property with bus reset being the default.
1496*4882a593Smuzhiyun */
1497*4882a593Smuzhiyun
1498*4882a593Smuzhiyun if (buf & SDW_SCP_INT1_IMPL_DEF) {
1499*4882a593Smuzhiyun if (slave->prop.scp_int1_mask & SDW_SCP_INT1_IMPL_DEF) {
1500*4882a593Smuzhiyun dev_dbg(&slave->dev, "Slave impl defined interrupt\n");
1501*4882a593Smuzhiyun slave_notify = true;
1502*4882a593Smuzhiyun }
1503*4882a593Smuzhiyun clear |= SDW_SCP_INT1_IMPL_DEF;
1504*4882a593Smuzhiyun }
1505*4882a593Smuzhiyun
1506*4882a593Smuzhiyun /* Check port 0 - 3 interrupts */
1507*4882a593Smuzhiyun port = buf & SDW_SCP_INT1_PORT0_3;
1508*4882a593Smuzhiyun
1509*4882a593Smuzhiyun /* To get port number corresponding to bits, shift it */
1510*4882a593Smuzhiyun port = FIELD_GET(SDW_SCP_INT1_PORT0_3, port);
1511*4882a593Smuzhiyun for_each_set_bit(bit, &port, 8) {
1512*4882a593Smuzhiyun sdw_handle_port_interrupt(slave, bit,
1513*4882a593Smuzhiyun &port_status[bit]);
1514*4882a593Smuzhiyun }
1515*4882a593Smuzhiyun
1516*4882a593Smuzhiyun /* Check if cascade 2 interrupt is present */
1517*4882a593Smuzhiyun if (buf & SDW_SCP_INT1_SCP2_CASCADE) {
1518*4882a593Smuzhiyun port = buf2[0] & SDW_SCP_INTSTAT2_PORT4_10;
1519*4882a593Smuzhiyun for_each_set_bit(bit, &port, 8) {
1520*4882a593Smuzhiyun /* scp2 ports start from 4 */
1521*4882a593Smuzhiyun port_num = bit + 3;
1522*4882a593Smuzhiyun sdw_handle_port_interrupt(slave,
1523*4882a593Smuzhiyun port_num,
1524*4882a593Smuzhiyun &port_status[port_num]);
1525*4882a593Smuzhiyun }
1526*4882a593Smuzhiyun }
1527*4882a593Smuzhiyun
1528*4882a593Smuzhiyun /* now check last cascade */
1529*4882a593Smuzhiyun if (buf2[0] & SDW_SCP_INTSTAT2_SCP3_CASCADE) {
1530*4882a593Smuzhiyun port = buf2[1] & SDW_SCP_INTSTAT3_PORT11_14;
1531*4882a593Smuzhiyun for_each_set_bit(bit, &port, 8) {
1532*4882a593Smuzhiyun /* scp3 ports start from 11 */
1533*4882a593Smuzhiyun port_num = bit + 10;
1534*4882a593Smuzhiyun sdw_handle_port_interrupt(slave,
1535*4882a593Smuzhiyun port_num,
1536*4882a593Smuzhiyun &port_status[port_num]);
1537*4882a593Smuzhiyun }
1538*4882a593Smuzhiyun }
1539*4882a593Smuzhiyun
1540*4882a593Smuzhiyun /* Update the Slave driver */
1541*4882a593Smuzhiyun if (slave_notify && slave->ops &&
1542*4882a593Smuzhiyun slave->ops->interrupt_callback) {
1543*4882a593Smuzhiyun slave_intr.control_port = clear;
1544*4882a593Smuzhiyun memcpy(slave_intr.port, &port_status,
1545*4882a593Smuzhiyun sizeof(slave_intr.port));
1546*4882a593Smuzhiyun
1547*4882a593Smuzhiyun slave->ops->interrupt_callback(slave, &slave_intr);
1548*4882a593Smuzhiyun }
1549*4882a593Smuzhiyun
1550*4882a593Smuzhiyun /* Ack interrupt */
1551*4882a593Smuzhiyun ret = sdw_write(slave, SDW_SCP_INT1, clear);
1552*4882a593Smuzhiyun if (ret < 0) {
1553*4882a593Smuzhiyun dev_err(slave->bus->dev,
1554*4882a593Smuzhiyun "SDW_SCP_INT1 write failed:%d\n", ret);
1555*4882a593Smuzhiyun goto io_err;
1556*4882a593Smuzhiyun }
1557*4882a593Smuzhiyun
1558*4882a593Smuzhiyun /* at this point all initial interrupt sources were handled */
1559*4882a593Smuzhiyun slave->first_interrupt_done = true;
1560*4882a593Smuzhiyun
1561*4882a593Smuzhiyun /*
1562*4882a593Smuzhiyun * Read status again to ensure no new interrupts arrived
1563*4882a593Smuzhiyun * while servicing interrupts.
1564*4882a593Smuzhiyun */
1565*4882a593Smuzhiyun ret = sdw_read(slave, SDW_SCP_INT1);
1566*4882a593Smuzhiyun if (ret < 0) {
1567*4882a593Smuzhiyun dev_err(slave->bus->dev,
1568*4882a593Smuzhiyun "SDW_SCP_INT1 read failed:%d\n", ret);
1569*4882a593Smuzhiyun goto io_err;
1570*4882a593Smuzhiyun }
1571*4882a593Smuzhiyun _buf = ret;
1572*4882a593Smuzhiyun
1573*4882a593Smuzhiyun ret = sdw_nread(slave, SDW_SCP_INTSTAT2, 2, _buf2);
1574*4882a593Smuzhiyun if (ret < 0) {
1575*4882a593Smuzhiyun dev_err(slave->bus->dev,
1576*4882a593Smuzhiyun "SDW_SCP_INT2/3 read failed:%d\n", ret);
1577*4882a593Smuzhiyun goto io_err;
1578*4882a593Smuzhiyun }
1579*4882a593Smuzhiyun
1580*4882a593Smuzhiyun /* Make sure no interrupts are pending */
1581*4882a593Smuzhiyun buf &= _buf;
1582*4882a593Smuzhiyun buf2[0] &= _buf2[0];
1583*4882a593Smuzhiyun buf2[1] &= _buf2[1];
1584*4882a593Smuzhiyun stat = buf || buf2[0] || buf2[1];
1585*4882a593Smuzhiyun
1586*4882a593Smuzhiyun /*
1587*4882a593Smuzhiyun * Exit loop if Slave is continuously in ALERT state even
1588*4882a593Smuzhiyun * after servicing the interrupt multiple times.
1589*4882a593Smuzhiyun */
1590*4882a593Smuzhiyun count++;
1591*4882a593Smuzhiyun
1592*4882a593Smuzhiyun /* we can get alerts while processing so keep retrying */
1593*4882a593Smuzhiyun } while (stat != 0 && count < SDW_READ_INTR_CLEAR_RETRY);
1594*4882a593Smuzhiyun
1595*4882a593Smuzhiyun if (count == SDW_READ_INTR_CLEAR_RETRY)
1596*4882a593Smuzhiyun dev_warn(slave->bus->dev, "Reached MAX_RETRY on alert read\n");
1597*4882a593Smuzhiyun
1598*4882a593Smuzhiyun io_err:
1599*4882a593Smuzhiyun pm_runtime_mark_last_busy(&slave->dev);
1600*4882a593Smuzhiyun pm_runtime_put_autosuspend(&slave->dev);
1601*4882a593Smuzhiyun
1602*4882a593Smuzhiyun return ret;
1603*4882a593Smuzhiyun }
1604*4882a593Smuzhiyun
sdw_update_slave_status(struct sdw_slave * slave,enum sdw_slave_status status)1605*4882a593Smuzhiyun static int sdw_update_slave_status(struct sdw_slave *slave,
1606*4882a593Smuzhiyun enum sdw_slave_status status)
1607*4882a593Smuzhiyun {
1608*4882a593Smuzhiyun unsigned long time;
1609*4882a593Smuzhiyun
1610*4882a593Smuzhiyun if (!slave->probed) {
1611*4882a593Smuzhiyun /*
1612*4882a593Smuzhiyun * the slave status update is typically handled in an
1613*4882a593Smuzhiyun * interrupt thread, which can race with the driver
1614*4882a593Smuzhiyun * probe, e.g. when a module needs to be loaded.
1615*4882a593Smuzhiyun *
1616*4882a593Smuzhiyun * make sure the probe is complete before updating
1617*4882a593Smuzhiyun * status.
1618*4882a593Smuzhiyun */
1619*4882a593Smuzhiyun time = wait_for_completion_timeout(&slave->probe_complete,
1620*4882a593Smuzhiyun msecs_to_jiffies(DEFAULT_PROBE_TIMEOUT));
1621*4882a593Smuzhiyun if (!time) {
1622*4882a593Smuzhiyun dev_err(&slave->dev, "Probe not complete, timed out\n");
1623*4882a593Smuzhiyun return -ETIMEDOUT;
1624*4882a593Smuzhiyun }
1625*4882a593Smuzhiyun }
1626*4882a593Smuzhiyun
1627*4882a593Smuzhiyun if (!slave->ops || !slave->ops->update_status)
1628*4882a593Smuzhiyun return 0;
1629*4882a593Smuzhiyun
1630*4882a593Smuzhiyun return slave->ops->update_status(slave, status);
1631*4882a593Smuzhiyun }
1632*4882a593Smuzhiyun
1633*4882a593Smuzhiyun /**
1634*4882a593Smuzhiyun * sdw_handle_slave_status() - Handle Slave status
1635*4882a593Smuzhiyun * @bus: SDW bus instance
1636*4882a593Smuzhiyun * @status: Status for all Slave(s)
1637*4882a593Smuzhiyun */
sdw_handle_slave_status(struct sdw_bus * bus,enum sdw_slave_status status[])1638*4882a593Smuzhiyun int sdw_handle_slave_status(struct sdw_bus *bus,
1639*4882a593Smuzhiyun enum sdw_slave_status status[])
1640*4882a593Smuzhiyun {
1641*4882a593Smuzhiyun enum sdw_slave_status prev_status;
1642*4882a593Smuzhiyun struct sdw_slave *slave;
1643*4882a593Smuzhiyun bool attached_initializing;
1644*4882a593Smuzhiyun int i, ret = 0;
1645*4882a593Smuzhiyun
1646*4882a593Smuzhiyun /* first check if any Slaves fell off the bus */
1647*4882a593Smuzhiyun for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1648*4882a593Smuzhiyun mutex_lock(&bus->bus_lock);
1649*4882a593Smuzhiyun if (test_bit(i, bus->assigned) == false) {
1650*4882a593Smuzhiyun mutex_unlock(&bus->bus_lock);
1651*4882a593Smuzhiyun continue;
1652*4882a593Smuzhiyun }
1653*4882a593Smuzhiyun mutex_unlock(&bus->bus_lock);
1654*4882a593Smuzhiyun
1655*4882a593Smuzhiyun slave = sdw_get_slave(bus, i);
1656*4882a593Smuzhiyun if (!slave)
1657*4882a593Smuzhiyun continue;
1658*4882a593Smuzhiyun
1659*4882a593Smuzhiyun if (status[i] == SDW_SLAVE_UNATTACHED &&
1660*4882a593Smuzhiyun slave->status != SDW_SLAVE_UNATTACHED)
1661*4882a593Smuzhiyun sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
1662*4882a593Smuzhiyun }
1663*4882a593Smuzhiyun
1664*4882a593Smuzhiyun if (status[0] == SDW_SLAVE_ATTACHED) {
1665*4882a593Smuzhiyun dev_dbg(bus->dev, "Slave attached, programming device number\n");
1666*4882a593Smuzhiyun ret = sdw_program_device_num(bus);
1667*4882a593Smuzhiyun if (ret)
1668*4882a593Smuzhiyun dev_err(bus->dev, "Slave attach failed: %d\n", ret);
1669*4882a593Smuzhiyun /*
1670*4882a593Smuzhiyun * programming a device number will have side effects,
1671*4882a593Smuzhiyun * so we deal with other devices at a later time
1672*4882a593Smuzhiyun */
1673*4882a593Smuzhiyun return ret;
1674*4882a593Smuzhiyun }
1675*4882a593Smuzhiyun
1676*4882a593Smuzhiyun /* Continue to check other slave statuses */
1677*4882a593Smuzhiyun for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1678*4882a593Smuzhiyun mutex_lock(&bus->bus_lock);
1679*4882a593Smuzhiyun if (test_bit(i, bus->assigned) == false) {
1680*4882a593Smuzhiyun mutex_unlock(&bus->bus_lock);
1681*4882a593Smuzhiyun continue;
1682*4882a593Smuzhiyun }
1683*4882a593Smuzhiyun mutex_unlock(&bus->bus_lock);
1684*4882a593Smuzhiyun
1685*4882a593Smuzhiyun slave = sdw_get_slave(bus, i);
1686*4882a593Smuzhiyun if (!slave)
1687*4882a593Smuzhiyun continue;
1688*4882a593Smuzhiyun
1689*4882a593Smuzhiyun attached_initializing = false;
1690*4882a593Smuzhiyun
1691*4882a593Smuzhiyun switch (status[i]) {
1692*4882a593Smuzhiyun case SDW_SLAVE_UNATTACHED:
1693*4882a593Smuzhiyun if (slave->status == SDW_SLAVE_UNATTACHED)
1694*4882a593Smuzhiyun break;
1695*4882a593Smuzhiyun
1696*4882a593Smuzhiyun sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
1697*4882a593Smuzhiyun break;
1698*4882a593Smuzhiyun
1699*4882a593Smuzhiyun case SDW_SLAVE_ALERT:
1700*4882a593Smuzhiyun ret = sdw_handle_slave_alerts(slave);
1701*4882a593Smuzhiyun if (ret)
1702*4882a593Smuzhiyun dev_err(bus->dev,
1703*4882a593Smuzhiyun "Slave %d alert handling failed: %d\n",
1704*4882a593Smuzhiyun i, ret);
1705*4882a593Smuzhiyun break;
1706*4882a593Smuzhiyun
1707*4882a593Smuzhiyun case SDW_SLAVE_ATTACHED:
1708*4882a593Smuzhiyun if (slave->status == SDW_SLAVE_ATTACHED)
1709*4882a593Smuzhiyun break;
1710*4882a593Smuzhiyun
1711*4882a593Smuzhiyun prev_status = slave->status;
1712*4882a593Smuzhiyun sdw_modify_slave_status(slave, SDW_SLAVE_ATTACHED);
1713*4882a593Smuzhiyun
1714*4882a593Smuzhiyun if (prev_status == SDW_SLAVE_ALERT)
1715*4882a593Smuzhiyun break;
1716*4882a593Smuzhiyun
1717*4882a593Smuzhiyun attached_initializing = true;
1718*4882a593Smuzhiyun
1719*4882a593Smuzhiyun ret = sdw_initialize_slave(slave);
1720*4882a593Smuzhiyun if (ret)
1721*4882a593Smuzhiyun dev_err(bus->dev,
1722*4882a593Smuzhiyun "Slave %d initialization failed: %d\n",
1723*4882a593Smuzhiyun i, ret);
1724*4882a593Smuzhiyun
1725*4882a593Smuzhiyun break;
1726*4882a593Smuzhiyun
1727*4882a593Smuzhiyun default:
1728*4882a593Smuzhiyun dev_err(bus->dev, "Invalid slave %d status:%d\n",
1729*4882a593Smuzhiyun i, status[i]);
1730*4882a593Smuzhiyun break;
1731*4882a593Smuzhiyun }
1732*4882a593Smuzhiyun
1733*4882a593Smuzhiyun ret = sdw_update_slave_status(slave, status[i]);
1734*4882a593Smuzhiyun if (ret)
1735*4882a593Smuzhiyun dev_err(slave->bus->dev,
1736*4882a593Smuzhiyun "Update Slave status failed:%d\n", ret);
1737*4882a593Smuzhiyun if (attached_initializing)
1738*4882a593Smuzhiyun complete(&slave->initialization_complete);
1739*4882a593Smuzhiyun }
1740*4882a593Smuzhiyun
1741*4882a593Smuzhiyun return ret;
1742*4882a593Smuzhiyun }
1743*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_handle_slave_status);
1744*4882a593Smuzhiyun
sdw_clear_slave_status(struct sdw_bus * bus,u32 request)1745*4882a593Smuzhiyun void sdw_clear_slave_status(struct sdw_bus *bus, u32 request)
1746*4882a593Smuzhiyun {
1747*4882a593Smuzhiyun struct sdw_slave *slave;
1748*4882a593Smuzhiyun int i;
1749*4882a593Smuzhiyun
1750*4882a593Smuzhiyun /* Check all non-zero devices */
1751*4882a593Smuzhiyun for (i = 1; i <= SDW_MAX_DEVICES; i++) {
1752*4882a593Smuzhiyun mutex_lock(&bus->bus_lock);
1753*4882a593Smuzhiyun if (test_bit(i, bus->assigned) == false) {
1754*4882a593Smuzhiyun mutex_unlock(&bus->bus_lock);
1755*4882a593Smuzhiyun continue;
1756*4882a593Smuzhiyun }
1757*4882a593Smuzhiyun mutex_unlock(&bus->bus_lock);
1758*4882a593Smuzhiyun
1759*4882a593Smuzhiyun slave = sdw_get_slave(bus, i);
1760*4882a593Smuzhiyun if (!slave)
1761*4882a593Smuzhiyun continue;
1762*4882a593Smuzhiyun
1763*4882a593Smuzhiyun if (slave->status != SDW_SLAVE_UNATTACHED) {
1764*4882a593Smuzhiyun sdw_modify_slave_status(slave, SDW_SLAVE_UNATTACHED);
1765*4882a593Smuzhiyun slave->first_interrupt_done = false;
1766*4882a593Smuzhiyun }
1767*4882a593Smuzhiyun
1768*4882a593Smuzhiyun /* keep track of request, used in pm_runtime resume */
1769*4882a593Smuzhiyun slave->unattach_request = request;
1770*4882a593Smuzhiyun }
1771*4882a593Smuzhiyun }
1772*4882a593Smuzhiyun EXPORT_SYMBOL(sdw_clear_slave_status);
1773