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Searched refs:CTL (Results 1 – 25 of 32) sorted by relevance

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/OK3568_Linux_fs/debian/overlay-firmware/usr/share/alsa/init/
H A Drt56514 CTL{reset}="mixer"
5 CTL{name}="DAC MIXL INF1 Switch", CTL{value}="on"
6 CTL{name}="DAC MIXR INF1 Switch", CTL{value}="on"
7 CTL{name}="Stereo DAC MIXL DAC L1 Switch", CTL{value}="on"
8 CTL{name}="Stereo DAC MIXR DAC R1 Switch", CTL{value}="on"
9 CTL{name}="OUT MIXL DAC L1 Switch", CTL{value}="on"
10 CTL{name}="OUT MIXR DAC R1 Switch", CTL{value}="on"
11 CTL{name}="HPOVOL L Switch", CTL{value}="on"
12 CTL{name}="HPOVOL R Switch", CTL{value}="on"
13 CTL{name}="HPO MIX HPVOL Switch", CTL{value}="on"
[all …]
H A Drt56164 CTL{reset}="mixer"
5 CTL{name}="DAI select", CTL{value}="0"
6 CTL{name}="DAC MIXL INF1 Switch", CTL{value}="on"
7 CTL{name}="DAC MIXR INF1 Switch", CTL{value}="on"
8 CTL{name}="Stereo DAC MIXL DAC L1 Switch", CTL{value}="on"
9 CTL{name}="Stereo DAC MIXR DAC R1 Switch", CTL{value}="on"
10 CTL{name}="SPK MIXL DAC L1 Switch", CTL{value}="on"
11 CTL{name}="SPK MIXR DAC R1 Switch", CTL{value}="on"
12 CTL{name}="SPOL MIX SPKVOL L Switch", CTL{value}="on"
13 CTL{name}="SPOR MIX SPKVOL R Switch", CTL{value}="on"
[all …]
H A Drt56404 CTL{reset}="mixer"
5 CTL{name}="DAI select", CTL{value}="0"
6 CTL{name}="DAC MIXL INF1 Switch", CTL{value}="on"
7 CTL{name}="DAC MIXR INF1 Switch", CTL{value}="on"
8 CTL{name}="Stereo DAC MIXL DAC L1 Switch", CTL{value}="on"
9 CTL{name}="Stereo DAC MIXR DAC R1 Switch", CTL{value}="on"
10 CTL{name}="SPK MIXL DAC L1 Switch", CTL{value}="on"
11 CTL{name}="SPK MIXR DAC R1 Switch", CTL{value}="on"
12 CTL{name}="SPOL MIX SPKVOL L Switch", CTL{value}="on"
13 CTL{name}="SPOR MIX SPKVOL R Switch", CTL{value}="on"
[all …]
H A Drk8094 CTL{reset}="mixer"
5 CTL{name}="Playback Path", CTL{value}="SPK_HP"
8 CTL{name}="Capture MIC Path", CTL{value}="Main Mic"
/OK3568_Linux_fs/external/alsa-config/alsa/init/
H A Drt56514 CTL{reset}="mixer"
5 CTL{name}="DAC MIXL INF1 Switch", CTL{value}="on"
6 CTL{name}="DAC MIXR INF1 Switch", CTL{value}="on"
7 CTL{name}="Stereo DAC MIXL DAC L1 Switch", CTL{value}="on"
8 CTL{name}="Stereo DAC MIXR DAC R1 Switch", CTL{value}="on"
9 CTL{name}="OUT MIXL DAC L1 Switch", CTL{value}="on"
10 CTL{name}="OUT MIXR DAC R1 Switch", CTL{value}="on"
11 CTL{name}="HPOVOL L Switch", CTL{value}="on"
12 CTL{name}="HPOVOL R Switch", CTL{value}="on"
13 CTL{name}="HPO MIX HPVOL Switch", CTL{value}="on"
[all …]
H A Drt56164 CTL{reset}="mixer"
5 CTL{name}="DAI select", CTL{value}="0"
6 CTL{name}="DAC MIXL INF1 Switch", CTL{value}="on"
7 CTL{name}="DAC MIXR INF1 Switch", CTL{value}="on"
8 CTL{name}="Stereo DAC MIXL DAC L1 Switch", CTL{value}="on"
9 CTL{name}="Stereo DAC MIXR DAC R1 Switch", CTL{value}="on"
10 CTL{name}="SPK MIXL DAC L1 Switch", CTL{value}="on"
11 CTL{name}="SPK MIXR DAC R1 Switch", CTL{value}="on"
12 CTL{name}="SPOL MIX SPKVOL L Switch", CTL{value}="on"
13 CTL{name}="SPOR MIX SPKVOL R Switch", CTL{value}="on"
[all …]
H A Drt56404 CTL{reset}="mixer"
5 CTL{name}="DAI select", CTL{value}="0"
6 CTL{name}="DAC MIXL INF1 Switch", CTL{value}="on"
7 CTL{name}="DAC MIXR INF1 Switch", CTL{value}="on"
8 CTL{name}="Stereo DAC MIXL DAC L1 Switch", CTL{value}="on"
9 CTL{name}="Stereo DAC MIXR DAC R1 Switch", CTL{value}="on"
10 CTL{name}="SPK MIXL DAC L1 Switch", CTL{value}="on"
11 CTL{name}="SPK MIXR DAC R1 Switch", CTL{value}="on"
12 CTL{name}="SPOL MIX SPKVOL L Switch", CTL{value}="on"
13 CTL{name}="SPOR MIX SPKVOL R Switch", CTL{value}="on"
[all …]
H A Drk8094 CTL{reset}="mixer"
5 CTL{name}="Playback Path", CTL{value}="SPK_HP"
8 CTL{name}="Capture MIC Path", CTL{value}="Main Mic"
11 CTL{name}="Resume Path", CTL{value}="ON"
/OK3568_Linux_fs/kernel/drivers/net/wireless/ath/ath9k/
H A Dar9003_eeprom.c39 #define CTL(_tpower, _flag) ((_tpower) | ((_flag) << 6)) macro
284 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
285 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
286 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
288 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0) } },
289 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
290 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
292 { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
293 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
294 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
[all …]
/OK3568_Linux_fs/buildroot/package/ejabberd/
H A DS50ejabberd6 CTL=/usr/sbin/ejabberdctl
23 "$CTL" start
25 if "$CTL" started; then
33 "$CTL" stop > /dev/null
34 if [ $? -eq 3 ] || "$CTL" stopped; then
41 "$CTL" status
49 "$CTL" live
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dmicrel-ksz90x1.txt49 - rxdv-skew-ps : Skew control of RX CTL pad
51 - txen-skew-ps : Skew control of TX CTL pad
77 - rxdv-skew-ps : Skew control of RX CTL pad
78 - txen-skew-ps : Skew control of TX CTL pad
110 - rxdv-skew-psec : Skew control of RX CTL pad
111 - txen-skew-psec : Skew control of TX CTL pad
/OK3568_Linux_fs/kernel/sound/pci/lola/
H A Dlola_pcm.c64 lola_dsd_write(chip, str->dsd, CTL, in lola_stream_start()
75 lola_dsd_write(chip, str->dsd, CTL, in lola_stream_stop()
88 val = lola_dsd_read(chip, str->dsd, CTL); in wait_for_srst_clear()
163 lola_dsd_write(chip, str->dsd, CTL, LOLA_DSD_CTL_SRUN | in lola_sync_pause()
175 lola_dsd_write(chip, str->dsd, CTL, in lola_stream_reset()
179 lola_dsd_write(chip, str->dsd, CTL, LOLA_DSD_CTL_SRST); in lola_stream_reset()
443 lola_dsd_write(chip, str->dsd, CTL, in lola_setup_controller()
H A Dlola_proc.c186 lola_dsd_read(chip, i, CTL)); in lola_proc_regs_read()
/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/net/
H A Dmicrel-ksz90x1.txt20 - rxdv-skew-ps : Skew control of RX CTL pad
22 - txen-skew-ps : Skew control of TX CTL pad
112 - rxdv-skew-ps : Skew control of RX CTL pad
113 - txen-skew-ps : Skew control of TX CTL pad
/OK3568_Linux_fs/kernel/drivers/char/xilinx_hwicap/
H A Dxilinx_hwicap.c126 .CTL = 5,
151 .CTL = 5,
176 .CTL = 5,
201 .CTL = 5,
H A Dxilinx_hwicap.h130 u32 CTL; member
/OK3568_Linux_fs/kernel/drivers/net/wan/
H A Dc101.c193 sca_out(0, MSCI1_OFFSET + CTL, port); /* RTS uses ch#2 output */ in c101_open()
216 sca_out(CTL_NORTS, MSCI1_OFFSET + CTL, port); in c101_close()
H A Dhd64570.h63 #define CTL 0x11 /* Control */ macro
H A Dhd64572.h64 #define CTL 0x130 /* Control reg */ macro
/OK3568_Linux_fs/kernel/sound/soc/qcom/
H A Dlpass-lpaif-reg.h142 #define LPAIF_DMACTL_REG(v, chan, dir, dai_id) __LPAIF_DMA_REG(v, chan, dir, CTL, dai_id)
/OK3568_Linux_fs/kernel/Documentation/ABI/testing/
H A Dsysfs-bus-coresight-devices-etb1066 is read directly from HW register CTL, 0x020.
H A Dsysfs-bus-coresight-devices-tmc54 is read directly from HW register CTL, 0x020.
/OK3568_Linux_fs/u-boot/drivers/usb/gadget/
H A Datmel_usba_udc.c850 epctrl = usba_ep_readl(ep, CTL); in usba_control_irq()
1031 epctrl = usba_ep_readl(ep, CTL); in usba_ep_irq()
1058 epctrl = usba_ep_readl(ep, CTL); in usba_ep_irq()
/OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/
H A Dbcm3510_priv.h29 u8 CTL :8; member
/OK3568_Linux_fs/kernel/drivers/tty/
H A Dsynclinkmp.c326 #define CTL 0x31 macro
1510 RegValue = read_reg(info, CTL); in set_break()
1515 write_reg(info, CTL, RegValue); in set_break()
4478 write_reg(info, CTL, RegValue); in async_mode()
4683 write_reg(info, CTL, RegValue); in hdlc_mode()
4753 RegValue = read_reg(info, CTL); in set_signals()
4758 write_reg(info, CTL, RegValue); in set_signals()

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