| /rk3399_rockchip-uboot/board/freescale/ls2080aqds/ |
| H A D | ddr.h | e04f9d0c2f5dec275eb550317c6bad2d8bbfb209 Wed May 04 02:20:22 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> board/freescale: Update ddr clk_adjust
This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
| /rk3399_rockchip-uboot/board/freescale/t4rdb/ |
| H A D | ddr.h | e04f9d0c2f5dec275eb550317c6bad2d8bbfb209 Wed May 04 02:20:22 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> board/freescale: Update ddr clk_adjust
This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
| /rk3399_rockchip-uboot/board/freescale/ls2080ardb/ |
| H A D | ddr.h | e04f9d0c2f5dec275eb550317c6bad2d8bbfb209 Wed May 04 02:20:22 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> board/freescale: Update ddr clk_adjust
This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
| /rk3399_rockchip-uboot/board/freescale/ls1021aqds/ |
| H A D | ddr.h | e04f9d0c2f5dec275eb550317c6bad2d8bbfb209 Wed May 04 02:20:22 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> board/freescale: Update ddr clk_adjust
This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
| /rk3399_rockchip-uboot/board/freescale/ls1043aqds/ |
| H A D | ddr.h | e04f9d0c2f5dec275eb550317c6bad2d8bbfb209 Wed May 04 02:20:22 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> board/freescale: Update ddr clk_adjust
This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
| /rk3399_rockchip-uboot/board/freescale/ls1043ardb/ |
| H A D | ddr.h | e04f9d0c2f5dec275eb550317c6bad2d8bbfb209 Wed May 04 02:20:22 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> board/freescale: Update ddr clk_adjust
This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
| /rk3399_rockchip-uboot/board/freescale/t4qds/ |
| H A D | ddr.h | e04f9d0c2f5dec275eb550317c6bad2d8bbfb209 Wed May 04 02:20:22 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> board/freescale: Update ddr clk_adjust
This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
| /rk3399_rockchip-uboot/board/freescale/t208xrdb/ |
| H A D | ddr.h | e04f9d0c2f5dec275eb550317c6bad2d8bbfb209 Wed May 04 02:20:22 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> board/freescale: Update ddr clk_adjust
This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
| /rk3399_rockchip-uboot/board/freescale/t208xqds/ |
| H A D | ddr.h | e04f9d0c2f5dec275eb550317c6bad2d8bbfb209 Wed May 04 02:20:22 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> board/freescale: Update ddr clk_adjust
This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
| /rk3399_rockchip-uboot/board/freescale/t1040qds/ |
| H A D | ddr.h | e04f9d0c2f5dec275eb550317c6bad2d8bbfb209 Wed May 04 02:20:22 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> board/freescale: Update ddr clk_adjust
This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
| /rk3399_rockchip-uboot/board/freescale/t102xqds/ |
| H A D | ddr.c | e04f9d0c2f5dec275eb550317c6bad2d8bbfb209 Wed May 04 02:20:22 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> board/freescale: Update ddr clk_adjust
This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
| /rk3399_rockchip-uboot/board/freescale/t104xrdb/ |
| H A D | ddr.h | e04f9d0c2f5dec275eb550317c6bad2d8bbfb209 Wed May 04 02:20:22 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> board/freescale: Update ddr clk_adjust
This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
| /rk3399_rockchip-uboot/board/freescale/t102xrdb/ |
| H A D | ddr.c | e04f9d0c2f5dec275eb550317c6bad2d8bbfb209 Wed May 04 02:20:22 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> board/freescale: Update ddr clk_adjust
This patch updates clk_adjust to actual value for boards with
T-series and LS-series SoCs to match the setting of clk_adjust
in latest ddr driver.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|