xref: /rk3399_rockchip-uboot/board/freescale/t208xrdb/ddr.h (revision dc557e9a1fe00ca9d884bd88feef5bebf23fede4)
18d67c368SShengzhou Liu /*
28d67c368SShengzhou Liu  * Copyright 2014 Freescale Semiconductor, Inc.
38d67c368SShengzhou Liu  *
48d67c368SShengzhou Liu  * SPDX-License-Identifier:     GPL-2.0+
58d67c368SShengzhou Liu  */
68d67c368SShengzhou Liu 
78d67c368SShengzhou Liu #ifndef __DDR_H__
88d67c368SShengzhou Liu #define __DDR_H__
98d67c368SShengzhou Liu struct board_specific_parameters {
108d67c368SShengzhou Liu 	u32 n_ranks;
118d67c368SShengzhou Liu 	u32 datarate_mhz_high;
128d67c368SShengzhou Liu 	u32 rank_gb;
138d67c368SShengzhou Liu 	u32 clk_adjust;
148d67c368SShengzhou Liu 	u32 wrlvl_start;
158d67c368SShengzhou Liu 	u32 wrlvl_ctl_2;
168d67c368SShengzhou Liu 	u32 wrlvl_ctl_3;
178d67c368SShengzhou Liu };
188d67c368SShengzhou Liu 
198d67c368SShengzhou Liu /*
208d67c368SShengzhou Liu  * These tables contain all valid speeds we want to override with board
218d67c368SShengzhou Liu  * specific parameters. datarate_mhz_high values need to be in ascending order
228d67c368SShengzhou Liu  * for each n_ranks group.
238d67c368SShengzhou Liu  */
248d67c368SShengzhou Liu 
258d67c368SShengzhou Liu static const struct board_specific_parameters udimm0[] = {
268d67c368SShengzhou Liu 	/*
278d67c368SShengzhou Liu 	 * memory controller 0
288d67c368SShengzhou Liu 	 *   num|  hi| rank|  clk| wrlvl |   wrlvl   |  wrlvl |
298d67c368SShengzhou Liu 	 * ranks| mhz| GB  |adjst| start |   ctl2    |  ctl3  |
308d67c368SShengzhou Liu 	 */
31*e04f9d0cSShengzhou Liu 	{2,  1200, 2, 10,     7, 0x0808090a, 0x0b0c0c0a},
32*e04f9d0cSShengzhou Liu 	{2,  1500, 2, 10,     6, 0x07070809, 0x0a0b0b09},
33*e04f9d0cSShengzhou Liu 	{2,  1600, 2, 10,     8, 0x0808070b, 0x0c0d0e0a},
34*e04f9d0cSShengzhou Liu 	{2,  1700, 2,  8,     7, 0x080a0a0c, 0x0c0d0e0a},
35*e04f9d0cSShengzhou Liu 	{2,  1900, 0, 10,     7, 0x0808080c, 0x0b0c0c09},
36*e04f9d0cSShengzhou Liu 	{1,  1200, 2, 10,     7, 0x0808090a, 0x0b0c0c0a},
37*e04f9d0cSShengzhou Liu 	{1,  1500, 2, 10,     6, 0x07070809, 0x0a0b0b09},
38*e04f9d0cSShengzhou Liu 	{1,  1600, 2, 10,     8, 0x0808070b, 0x0c0d0e0a},
39*e04f9d0cSShengzhou Liu 	{1,  1700, 2,  8,     7, 0x080a0a0c, 0x0c0d0e0a},
40*e04f9d0cSShengzhou Liu 	{1,  1900, 0, 10,     7, 0x0808080c, 0x0b0c0c09},
418d67c368SShengzhou Liu 	{}
428d67c368SShengzhou Liu };
438d67c368SShengzhou Liu 
448d67c368SShengzhou Liu static const struct board_specific_parameters *udimms[] = {
458d67c368SShengzhou Liu 	udimm0,
468d67c368SShengzhou Liu };
478d67c368SShengzhou Liu #endif
48