| /rk3399_ARM-atf/include/services/ |
| H A D | arm_arch_svc.h | cc2523bb21cc254642bd70a6812c5c0d69ed4225 Thu Aug 14 15:28:53 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_AIE support
Implement support for FEAT_AIE, which introduces the AMAIR2_ELx and
MAIR2_ELx system registers, extending the memory attributes described
by {A}MAIR_ELx.
Those system registers are trapped by the SCR_EL3.AIEn bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_AIE build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: Iba2011719013a89f9cb3a4317bde18254f45cd25
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| /rk3399_ARM-atf/make_helpers/ |
| H A D | arch_features.mk | cc2523bb21cc254642bd70a6812c5c0d69ed4225 Thu Aug 14 15:28:53 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_AIE support
Implement support for FEAT_AIE, which introduces the AMAIR2_ELx and
MAIR2_ELx system registers, extending the memory attributes described
by {A}MAIR_ELx.
Those system registers are trapped by the SCR_EL3.AIEn bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_AIE build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: Iba2011719013a89f9cb3a4317bde18254f45cd25
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| /rk3399_ARM-atf/common/ |
| H A D | feat_detect.c | cc2523bb21cc254642bd70a6812c5c0d69ed4225 Thu Aug 14 15:28:53 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_AIE support
Implement support for FEAT_AIE, which introduces the AMAIR2_ELx and
MAIR2_ELx system registers, extending the memory attributes described
by {A}MAIR_ELx.
Those system registers are trapped by the SCR_EL3.AIEn bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_AIE build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: Iba2011719013a89f9cb3a4317bde18254f45cd25
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| /rk3399_ARM-atf/include/arch/aarch64/ |
| H A D | arch_features.h | cc2523bb21cc254642bd70a6812c5c0d69ed4225 Thu Aug 14 15:28:53 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_AIE support
Implement support for FEAT_AIE, which introduces the AMAIR2_ELx and
MAIR2_ELx system registers, extending the memory attributes described
by {A}MAIR_ELx.
Those system registers are trapped by the SCR_EL3.AIEn bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_AIE build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: Iba2011719013a89f9cb3a4317bde18254f45cd25
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| H A D | arch.h | cc2523bb21cc254642bd70a6812c5c0d69ed4225 Thu Aug 14 15:28:53 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_AIE support
Implement support for FEAT_AIE, which introduces the AMAIR2_ELx and
MAIR2_ELx system registers, extending the memory attributes described
by {A}MAIR_ELx.
Those system registers are trapped by the SCR_EL3.AIEn bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_AIE build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: Iba2011719013a89f9cb3a4317bde18254f45cd25
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| /rk3399_ARM-atf/lib/el3_runtime/aarch64/ |
| H A D | context_mgmt.c | cc2523bb21cc254642bd70a6812c5c0d69ed4225 Thu Aug 14 15:28:53 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_AIE support
Implement support for FEAT_AIE, which introduces the AMAIR2_ELx and
MAIR2_ELx system registers, extending the memory attributes described
by {A}MAIR_ELx.
Those system registers are trapped by the SCR_EL3.AIEn bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_AIE build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: Iba2011719013a89f9cb3a4317bde18254f45cd25
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| /rk3399_ARM-atf/docs/getting_started/ |
| H A D | build-options.rst | cc2523bb21cc254642bd70a6812c5c0d69ed4225 Thu Aug 14 15:28:53 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_AIE support
Implement support for FEAT_AIE, which introduces the AMAIR2_ELx and
MAIR2_ELx system registers, extending the memory attributes described
by {A}MAIR_ELx.
Those system registers are trapped by the SCR_EL3.AIEn bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_AIE build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: Iba2011719013a89f9cb3a4317bde18254f45cd25
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| /rk3399_ARM-atf/plat/arm/board/fvp/ |
| H A D | platform.mk | cc2523bb21cc254642bd70a6812c5c0d69ed4225 Thu Aug 14 15:28:53 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_AIE support
Implement support for FEAT_AIE, which introduces the AMAIR2_ELx and
MAIR2_ELx system registers, extending the memory attributes described
by {A}MAIR_ELx.
Those system registers are trapped by the SCR_EL3.AIEn bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_AIE build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: Iba2011719013a89f9cb3a4317bde18254f45cd25
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|
| /rk3399_ARM-atf/ |
| H A D | Makefile | cc2523bb21cc254642bd70a6812c5c0d69ed4225 Thu Aug 14 15:28:53 UTC 2025 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): enable FEAT_AIE support
Implement support for FEAT_AIE, which introduces the AMAIR2_ELx and
MAIR2_ELx system registers, extending the memory attributes described
by {A}MAIR_ELx.
Those system registers are trapped by the SCR_EL3.AIEn bit, so set the
bit for the non-secure world context to allow OSes to use the feature.
This is controlled by the ENABLE_FEAT_AIE build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.
Change-Id: Iba2011719013a89f9cb3a4317bde18254f45cd25
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
|