1 /*
2 * Copyright (c) 2022-2025, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <arch_features.h>
8 #include <common/debug.h>
9 #include <common/feat_detect.h>
10 #include <plat/common/platform.h>
11
12 static bool detection_done[PLATFORM_CORE_COUNT] = { false };
13
14 /*******************************************************************************
15 * Function : check_feature
16 * Check for a valid combination of build time flags (ENABLE_FEAT_xxx) and
17 * feature availability on the hardware. <min> is the smallest feature
18 * ID field value that is required for that feature.
19 * Triggers a panic later if a feature is forcefully enabled, but not
20 * available on the PE. Also will panic if the hardware feature ID field
21 * is larger than the maximum known and supported number, specified by <max>.
22 *
23 * We force inlining here to let the compiler optimise away the whole check
24 * if the feature is disabled at build time (FEAT_STATE_DISABLED).
25 ******************************************************************************/
26 static inline bool __attribute((__always_inline__))
check_feature(int state,unsigned long field,const char * feat_name,unsigned int min,unsigned int max)27 check_feature(int state, unsigned long field, const char *feat_name,
28 unsigned int min, unsigned int max)
29 {
30 if (state == FEAT_STATE_ALWAYS && field < min) {
31 ERROR("FEAT_%s not supported by the PE\n", feat_name);
32 return true;
33 }
34 if (state >= FEAT_STATE_ALWAYS && field > max) {
35 ERROR("FEAT_%s is version %ld, but is only known up to version %d\n",
36 feat_name, field, max);
37 return true;
38 }
39
40 return false;
41 }
42
read_feat_rng_trap_id_field(void)43 static unsigned int read_feat_rng_trap_id_field(void)
44 {
45 return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT,
46 ID_AA64PFR1_EL1_RNDR_TRAP_MASK);
47 }
48
read_feat_bti_id_field(void)49 static unsigned int read_feat_bti_id_field(void)
50 {
51 return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_BT_SHIFT,
52 ID_AA64PFR1_EL1_BT_MASK);
53 }
54
read_feat_sb_id_field(void)55 static unsigned int read_feat_sb_id_field(void)
56 {
57 return ISOLATE_FIELD(read_id_aa64isar1_el1(), ID_AA64ISAR1_SB_SHIFT,
58 ID_AA64ISAR1_SB_MASK);
59 }
60
read_feat_csv2_id_field(void)61 static unsigned int read_feat_csv2_id_field(void)
62 {
63 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_CSV2_SHIFT,
64 ID_AA64PFR0_CSV2_MASK);
65 }
66
read_feat_debugv8p9_id_field(void)67 static unsigned int read_feat_debugv8p9_id_field(void)
68 {
69 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_DEBUGVER_SHIFT,
70 ID_AA64DFR0_DEBUGVER_MASK);
71 }
72
read_feat_pmuv3_id_field(void)73 static unsigned int read_feat_pmuv3_id_field(void)
74 {
75 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_PMUVER_SHIFT,
76 ID_AA64DFR0_PMUVER_MASK);
77 }
78
read_feat_vhe_id_field(void)79 static unsigned int read_feat_vhe_id_field(void)
80 {
81 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_VHE_SHIFT,
82 ID_AA64MMFR1_EL1_VHE_MASK);
83 }
84
read_feat_sve_id_field(void)85 static unsigned int read_feat_sve_id_field(void)
86 {
87 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SVE_SHIFT,
88 ID_AA64PFR0_SVE_MASK);
89 }
90
read_feat_ras_id_field(void)91 static unsigned int read_feat_ras_id_field(void)
92 {
93 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_RAS_SHIFT,
94 ID_AA64PFR0_RAS_MASK);
95 }
96
read_feat_dit_id_field(void)97 static unsigned int read_feat_dit_id_field(void)
98 {
99 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_DIT_SHIFT,
100 ID_AA64PFR0_DIT_MASK);
101 }
102
read_feat_amu_id_field(void)103 static unsigned int read_feat_amu_id_field(void)
104 {
105 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_AMU_SHIFT,
106 ID_AA64PFR0_AMU_MASK);
107 }
108
read_feat_mpam_version(void)109 static unsigned int read_feat_mpam_version(void)
110 {
111 return (unsigned int)((((read_id_aa64pfr0_el1() >>
112 ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) |
113 ((read_id_aa64pfr1_el1() >>
114 ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK));
115 }
116
read_feat_nv_id_field(void)117 static unsigned int read_feat_nv_id_field(void)
118 {
119 return ISOLATE_FIELD(read_id_aa64mmfr2_el1(), ID_AA64MMFR2_EL1_NV_SHIFT,
120 ID_AA64MMFR2_EL1_NV_MASK);
121 }
122
read_feat_sel2_id_field(void)123 static unsigned int read_feat_sel2_id_field(void)
124 {
125 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SEL2_SHIFT,
126 ID_AA64PFR0_SEL2_MASK);
127 }
128
read_feat_trf_id_field(void)129 static unsigned int read_feat_trf_id_field(void)
130 {
131 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEFILT_SHIFT,
132 ID_AA64DFR0_TRACEFILT_MASK);
133 }
get_armv8_5_mte_support(void)134 static unsigned int get_armv8_5_mte_support(void)
135 {
136 return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_MTE_SHIFT,
137 ID_AA64PFR1_EL1_MTE_MASK);
138 }
read_feat_rng_id_field(void)139 static unsigned int read_feat_rng_id_field(void)
140 {
141 return ISOLATE_FIELD(read_id_aa64isar0_el1(), ID_AA64ISAR0_RNDR_SHIFT,
142 ID_AA64ISAR0_RNDR_MASK);
143 }
read_feat_fgt_id_field(void)144 static unsigned int read_feat_fgt_id_field(void)
145 {
146 return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_FGT_SHIFT,
147 ID_AA64MMFR0_EL1_FGT_MASK);
148 }
read_feat_ecv_id_field(void)149 static unsigned int read_feat_ecv_id_field(void)
150 {
151 return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_ECV_SHIFT,
152 ID_AA64MMFR0_EL1_ECV_MASK);
153 }
read_feat_twed_id_field(void)154 static unsigned int read_feat_twed_id_field(void)
155 {
156 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_TWED_SHIFT,
157 ID_AA64MMFR1_EL1_TWED_MASK);
158 }
159
read_feat_hcx_id_field(void)160 static unsigned int read_feat_hcx_id_field(void)
161 {
162 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_HCX_SHIFT,
163 ID_AA64MMFR1_EL1_HCX_MASK);
164 }
read_feat_ls64_id_field(void)165 static unsigned int read_feat_ls64_id_field(void)
166 {
167 return ISOLATE_FIELD(read_id_aa64isar1_el1(), ID_AA64ISAR1_LS64_SHIFT,
168 ID_AA64ISAR1_LS64_MASK);
169 }
read_feat_aie_id_field(void)170 static unsigned int read_feat_aie_id_field(void)
171 {
172 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_AIE_SHIFT,
173 ID_AA64MMFR3_EL1_AIE_MASK);
174 }
read_feat_pfar_id_field(void)175 static unsigned int read_feat_pfar_id_field(void)
176 {
177 return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_PFAR_SHIFT,
178 ID_AA64PFR1_EL1_PFAR_MASK);
179 }
read_feat_tcr2_id_field(void)180 static unsigned int read_feat_tcr2_id_field(void)
181 {
182 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_TCRX_SHIFT,
183 ID_AA64MMFR3_EL1_TCRX_MASK);
184 }
read_feat_s2pie_id_field(void)185 static unsigned int read_feat_s2pie_id_field(void)
186 {
187 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S2PIE_SHIFT,
188 ID_AA64MMFR3_EL1_S2PIE_MASK);
189 }
read_feat_s1pie_id_field(void)190 static unsigned int read_feat_s1pie_id_field(void)
191 {
192 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S1PIE_SHIFT,
193 ID_AA64MMFR3_EL1_S1PIE_MASK);
194 }
read_feat_s2poe_id_field(void)195 static unsigned int read_feat_s2poe_id_field(void)
196 {
197 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S2POE_SHIFT,
198 ID_AA64MMFR3_EL1_S2POE_MASK);
199 }
read_feat_s1poe_id_field(void)200 static unsigned int read_feat_s1poe_id_field(void)
201 {
202 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_S1POE_SHIFT,
203 ID_AA64MMFR3_EL1_S1POE_MASK);
204 }
read_feat_brbe_id_field(void)205 static unsigned int read_feat_brbe_id_field(void)
206 {
207 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_BRBE_SHIFT,
208 ID_AA64DFR0_BRBE_MASK);
209 }
read_feat_trbe_id_field(void)210 static unsigned int read_feat_trbe_id_field(void)
211 {
212 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER_SHIFT,
213 ID_AA64DFR0_TRACEBUFFER_MASK);
214 }
read_feat_sme_id_field(void)215 static unsigned int read_feat_sme_id_field(void)
216 {
217 return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_SME_SHIFT,
218 ID_AA64PFR1_EL1_SME_MASK);
219 }
read_feat_gcs_id_field(void)220 static unsigned int read_feat_gcs_id_field(void)
221 {
222 return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_GCS_SHIFT,
223 ID_AA64PFR1_EL1_GCS_MASK);
224 }
225
read_feat_rme_id_field(void)226 static unsigned int read_feat_rme_id_field(void)
227 {
228 return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_FEAT_RME_SHIFT,
229 ID_AA64PFR0_FEAT_RME_MASK);
230 }
231
read_feat_pan_id_field(void)232 static unsigned int read_feat_pan_id_field(void)
233 {
234 return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_PAN_SHIFT,
235 ID_AA64MMFR1_EL1_PAN_MASK);
236 }
237
read_feat_mtpmu_id_field(void)238 static unsigned int read_feat_mtpmu_id_field(void)
239 {
240 return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_MTPMU_SHIFT,
241 ID_AA64DFR0_MTPMU_MASK);
242
243 }
244
read_feat_the_id_field(void)245 static unsigned int read_feat_the_id_field(void)
246 {
247 return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_THE_SHIFT,
248 ID_AA64PFR1_EL1_THE_MASK);
249 }
250
read_feat_sctlr2_id_field(void)251 static unsigned int read_feat_sctlr2_id_field(void)
252 {
253 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_SCTLR2_SHIFT,
254 ID_AA64MMFR3_EL1_SCTLR2_MASK);
255 }
256
read_feat_d128_id_field(void)257 static unsigned int read_feat_d128_id_field(void)
258 {
259 return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_D128_SHIFT,
260 ID_AA64MMFR3_EL1_D128_MASK);
261 }
read_feat_gcie_id_field(void)262 static unsigned int read_feat_gcie_id_field(void)
263 {
264 return ISOLATE_FIELD(read_id_aa64pfr2_el1(), ID_AA64PFR2_EL1_GCIE_SHIFT,
265 ID_AA64PFR2_EL1_GCIE_MASK);
266 }
267
read_feat_ebep_id_field(void)268 static unsigned int read_feat_ebep_id_field(void)
269 {
270 return ISOLATE_FIELD(read_id_aa64dfr1_el1(), ID_AA64DFR1_EBEP_SHIFT,
271 ID_AA64DFR1_EBEP_MASK);
272 }
273
read_feat_fpmr_id_field(void)274 static unsigned int read_feat_fpmr_id_field(void)
275 {
276 return ISOLATE_FIELD(read_id_aa64pfr2_el1(), ID_AA64PFR2_EL1_FPMR_SHIFT,
277 ID_AA64PFR2_EL1_FPMR_MASK);
278 }
279
read_feat_mops_id_field(void)280 static unsigned int read_feat_mops_id_field(void)
281 {
282 return ISOLATE_FIELD(read_id_aa64isar2_el1(), ID_AA64ISAR2_EL1_MOPS_SHIFT,
283 ID_AA64ISAR2_EL1_MOPS_MASK);
284 }
285
read_feat_fgwte3_id_field(void)286 static unsigned int read_feat_fgwte3_id_field(void)
287 {
288 return ISOLATE_FIELD(read_id_aa64mmfr4_el1(), ID_AA64MMFR4_EL1_FGWTE3_SHIFT,
289 ID_AA64MMFR4_EL1_FGWTE3_MASK);
290 }
291
read_feat_cpa_id_field(void)292 static unsigned int read_feat_cpa_id_field(void)
293 {
294 return ISOLATE_FIELD(read_id_aa64isar3_el1(),
295 ID_AA64ISAR3_EL1_CPA_SHIFT,
296 ID_AA64ISAR3_EL1_CPA_MASK);
297 }
298
read_feat_clrbhb_id_field(void)299 static unsigned int read_feat_clrbhb_id_field(void)
300 {
301 return ISOLATE_FIELD(read_id_aa64isar2_el1(), ID_AA64ISAR2_CLRBHB_SHIFT,
302 ID_AA64ISAR2_CLRBHB_MASK);
303 }
304
read_feat_rme_gdi_id_field(void)305 static unsigned int read_feat_rme_gdi_id_field(void)
306 {
307 return ISOLATE_FIELD(read_id_aa64mmfr4_el1(),
308 ID_AA64MMFR4_EL1_RME_GDI_SHIFT,
309 ID_AA64MMFR4_EL1_RME_GDI_MASK);
310 }
311
read_feat_idte3_id_field(void)312 static unsigned int read_feat_idte3_id_field(void)
313 {
314 return ISOLATE_FIELD(read_id_aa64mmfr2_el1(), ID_AA64MMFR2_EL1_IDS_SHIFT,
315 ID_AA64MMFR2_EL1_IDS_MASK);
316 }
317
318 /***********************************************************************************
319 * TF-A supports many Arm architectural features starting from arch version
320 * (8.0 till 8.7+). These features are mostly enabled through build flags. This
321 * mechanism helps in validating these build flags in the early boot phase
322 * either in BL1 or BL31 depending on the platform and assists in identifying
323 * and notifying the features which are enabled but not supported by the PE.
324 *
325 * It reads all the enabled features ID-registers and ensures the features
326 * are supported by the PE.
327 * In case if they aren't it stops booting at an early phase and logs the error
328 * messages, notifying the platforms about the features that are not supported.
329 *
330 * Further the procedure is implemented with a tri-state approach for each feature:
331 * ENABLE_FEAT_xxx = 0 : The feature is disabled statically at compile time
332 * ENABLE_FEAT_xxx = 1 : The feature is enabled and must be present in hardware.
333 * There will be panic if feature is not present at cold boot.
334 * ENABLE_FEAT_xxx = 2 : The feature is enabled but dynamically enabled at runtime
335 * depending on hardware capability.
336 *
337 * For better readability, state values are defined with macros, namely:
338 * { FEAT_STATE_DISABLED, FEAT_STATE_ALWAYS, FEAT_STATE_CHECK }, taking values
339 * { 0, 1, 2 }, respectively, as their naming.
340 **********************************************************************************/
detect_arch_features(unsigned int core_pos)341 void detect_arch_features(unsigned int core_pos)
342 {
343 /* No need to keep checking after the first time for each core. */
344 if (detection_done[core_pos]) {
345 return;
346 }
347
348 bool tainted = false;
349
350 /* v8.0 features */
351 tainted |= check_feature(ENABLE_FEAT_SB, read_feat_sb_id_field(),
352 "SB", 1, 1);
353 tainted |= check_feature(ENABLE_FEAT_CSV2_2, read_feat_csv2_id_field(),
354 "CSV2_2", 2, 3);
355 tainted |= check_feature(ENABLE_FEAT_CLRBHB, read_feat_clrbhb_id_field(),
356 "CLRBHB", 1, 1);
357 /*
358 * Even though the PMUv3 is an OPTIONAL feature, it is always
359 * implemented and Arm prescribes so. So assume it will be there and do
360 * away with a flag for it. This is used to check minor PMUv3px
361 * revisions so that we catch them as they come along
362 */
363 tainted |= check_feature(FEAT_STATE_ALWAYS, read_feat_pmuv3_id_field(),
364 "PMUv3", 1, ID_AA64DFR0_PMUVER_PMUV3P9);
365
366 /* v8.1 features */
367 tainted |= check_feature(ENABLE_FEAT_PAN, read_feat_pan_id_field(),
368 "PAN", 1, 3);
369 tainted |= check_feature(ENABLE_FEAT_VHE, read_feat_vhe_id_field(),
370 "VHE", 1, 1);
371
372 /* v8.2 features */
373 tainted |= check_feature(ENABLE_SVE_FOR_NS, read_feat_sve_id_field(),
374 "SVE", 1, 1);
375 tainted |= check_feature(ENABLE_FEAT_RAS, read_feat_ras_id_field(),
376 "RAS", 1, 2);
377
378 /* v8.3 features */
379 /* the PAuth fields are very complicated, no min/max is checked */
380 tainted |= check_feature(ENABLE_PAUTH, is_feat_pauth_present(),
381 "PAUTH", 1, 1);
382
383 /* v8.4 features */
384 tainted |= check_feature(ENABLE_FEAT_DIT, read_feat_dit_id_field(),
385 "DIT", 1, 1);
386 tainted |= check_feature(ENABLE_FEAT_AMU, read_feat_amu_id_field(),
387 "AMUv1", 1, 2);
388 tainted |= check_feature(ENABLE_FEAT_MOPS, read_feat_mops_id_field(),
389 "MOPS", 1, 1);
390 tainted |= check_feature(ENABLE_FEAT_MPAM, read_feat_mpam_version(),
391 "MPAM", 1, 17);
392 tainted |= check_feature(CTX_INCLUDE_NEVE_REGS, read_feat_nv_id_field(),
393 "NV2", 2, 2);
394 tainted |= check_feature(ENABLE_FEAT_SEL2, read_feat_sel2_id_field(),
395 "SEL2", 1, 1);
396 tainted |= check_feature(ENABLE_TRF_FOR_NS, read_feat_trf_id_field(),
397 "TRF", 1, 1);
398
399 /* v8.5 features */
400 tainted |= check_feature(ENABLE_FEAT_MTE2, get_armv8_5_mte_support(),
401 "MTE2", MTE_IMPLEMENTED_ELX, MTE_IMPLEMENTED_ASY);
402 tainted |= check_feature(ENABLE_FEAT_RNG, read_feat_rng_id_field(),
403 "RNG", 1, 1);
404 tainted |= check_feature(ENABLE_BTI, read_feat_bti_id_field(),
405 "BTI", 1, 1);
406 tainted |= check_feature(ENABLE_FEAT_RNG_TRAP, read_feat_rng_trap_id_field(),
407 "RNG_TRAP", 1, 1);
408
409 /* v8.6 features */
410 tainted |= check_feature(ENABLE_FEAT_AMUv1p1, read_feat_amu_id_field(),
411 "AMUv1p1", 2, 2);
412 tainted |= check_feature(ENABLE_FEAT_FGT, read_feat_fgt_id_field(),
413 "FGT", 1, 2);
414 tainted |= check_feature(ENABLE_FEAT_FGT2, read_feat_fgt_id_field(),
415 "FGT2", 2, 2);
416 tainted |= check_feature(ENABLE_FEAT_ECV, read_feat_ecv_id_field(),
417 "ECV", 1, 2);
418 tainted |= check_feature(ENABLE_FEAT_TWED, read_feat_twed_id_field(),
419 "TWED", 1, 1);
420
421 /*
422 * even though this is a "DISABLE" it does confusingly perform feature
423 * enablement duties like all other flags here. Check it against the HW
424 * feature when we intend to diverge from the default behaviour
425 */
426 tainted |= check_feature(DISABLE_MTPMU, read_feat_mtpmu_id_field(),
427 "MTPMU", 1, 1);
428
429 /* v8.7 features */
430 tainted |= check_feature(ENABLE_FEAT_HCX, read_feat_hcx_id_field(),
431 "HCX", 1, 1);
432 tainted |= check_feature(ENABLE_FEAT_LS64_ACCDATA, read_feat_ls64_id_field(),
433 "LS64", 1, 3);
434
435 /* v8.9 features */
436 tainted |= check_feature(ENABLE_FEAT_TCR2, read_feat_tcr2_id_field(),
437 "TCR2", 1, 1);
438 tainted |= check_feature(ENABLE_FEAT_S2PIE, read_feat_s2pie_id_field(),
439 "S2PIE", 1, 1);
440 tainted |= check_feature(ENABLE_FEAT_S1PIE, read_feat_s1pie_id_field(),
441 "S1PIE", 1, 1);
442 tainted |= check_feature(ENABLE_FEAT_S2POE, read_feat_s2poe_id_field(),
443 "S2POE", 1, 1);
444 tainted |= check_feature(ENABLE_FEAT_S1POE, read_feat_s1poe_id_field(),
445 "S1POE", 1, 1);
446 tainted |= check_feature(ENABLE_FEAT_CSV2_3, read_feat_csv2_id_field(),
447 "CSV2_3", 3, 3);
448 tainted |= check_feature(ENABLE_FEAT_DEBUGV8P9, read_feat_debugv8p9_id_field(),
449 "DEBUGV8P9", 11, 11);
450 tainted |= check_feature(ENABLE_FEAT_THE, read_feat_the_id_field(),
451 "THE", 1, 1);
452 tainted |= check_feature(ENABLE_FEAT_SCTLR2, read_feat_sctlr2_id_field(),
453 "SCTLR2", 1, 1);
454 tainted |= check_feature(ENABLE_FEAT_AIE, read_feat_aie_id_field(),
455 "AIE", 1, 1);
456 tainted |= check_feature(ENABLE_FEAT_PFAR, read_feat_pfar_id_field(),
457 "PFAR", 1, 1);
458
459 /* v9.0 features */
460 tainted |= check_feature(ENABLE_BRBE_FOR_NS, read_feat_brbe_id_field(),
461 "BRBE", 1, 2);
462 tainted |= check_feature(ENABLE_TRBE_FOR_NS, read_feat_trbe_id_field(),
463 "TRBE", 1, 1);
464
465 /* v9.2 features */
466 tainted |= check_feature(ENABLE_SME_FOR_NS, read_feat_sme_id_field(),
467 "SME", 1, 2);
468 tainted |= check_feature(ENABLE_SME2_FOR_NS, read_feat_sme_id_field(),
469 "SME2", 2, 2);
470 tainted |= check_feature(ENABLE_FEAT_FPMR, read_feat_fpmr_id_field(),
471 "FPMR", 1, 1);
472
473 /* v9.3 features */
474 tainted |= check_feature(ENABLE_FEAT_D128, read_feat_d128_id_field(),
475 "D128", 1, 1);
476 tainted |= check_feature(ENABLE_FEAT_GCIE, read_feat_gcie_id_field(),
477 "GCIE", 1, 1);
478 tainted |= check_feature(ENABLE_FEAT_MPAM_PE_BW_CTRL,
479 is_feat_mpam_pe_bw_ctrl_present(),
480 "MPAM_PE_BW_CTRL", 1, 1);
481 tainted |= check_feature(ENABLE_FEAT_EBEP, read_feat_ebep_id_field(),
482 "EBEP", 1, 1);
483
484 /* v9.4 features */
485 tainted |= check_feature(ENABLE_FEAT_GCS, read_feat_gcs_id_field(),
486 "GCS", 1, 1);
487 tainted |= check_feature(ENABLE_RME, read_feat_rme_id_field(),
488 "RME", 1, 2);
489 tainted |= check_feature(ENABLE_FEAT_PAUTH_LR, is_feat_pauth_lr_present(),
490 "PAUTH_LR", 1, 1);
491 tainted |= check_feature(ENABLE_FEAT_FGWTE3, read_feat_fgwte3_id_field(),
492 "FGWTE3", 1, 1);
493 tainted |= check_feature(ENABLE_FEAT_CPA2, read_feat_cpa_id_field(),
494 "CPA2", 2, 2);
495 tainted |= check_feature(ENABLE_FEAT_RME_GDI, read_feat_rme_gdi_id_field(),
496 "RME_GDI", 1, 1);
497 tainted |= check_feature(ENABLE_FEAT_IDTE3, read_feat_idte3_id_field(),
498 "IDTE3", 2, 2);
499
500 if (tainted) {
501 panic();
502 }
503
504 detection_done[core_pos] = true;
505 }
506