Searched hist:"02 a9d70c4deaa2102386611ac6b305838003148d" (Results 1 – 9 of 9) sorted by relevance
| /rk3399_ARM-atf/plat/intel/soc/n5x/include/ |
| H A D | n5x_clock_manager.h | 02a9d70c4deaa2102386611ac6b305838003148d Thu Jun 23 10:05:02 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): implement timer init divider via CPU frequency for N5X
Get CPU frequency and update the timer init div with it.
The timer is vary based on the CPU frequency instead of hardcoded.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ibfaa47fb7a25176eebf06f4828bf9729d56f12ed
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| H A D | socfpga_plat_def.h | 02a9d70c4deaa2102386611ac6b305838003148d Thu Jun 23 10:05:02 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): implement timer init divider via CPU frequency for N5X
Get CPU frequency and update the timer init div with it.
The timer is vary based on the CPU frequency instead of hardcoded.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ibfaa47fb7a25176eebf06f4828bf9729d56f12ed
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| /rk3399_ARM-atf/plat/intel/soc/n5x/soc/ |
| H A D | n5x_clock_manager.c | 02a9d70c4deaa2102386611ac6b305838003148d Thu Jun 23 10:05:02 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): implement timer init divider via CPU frequency for N5X
Get CPU frequency and update the timer init div with it.
The timer is vary based on the CPU frequency instead of hardcoded.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ibfaa47fb7a25176eebf06f4828bf9729d56f12ed
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| /rk3399_ARM-atf/plat/intel/soc/common/ |
| H A D | socfpga_delay_timer.c | 02a9d70c4deaa2102386611ac6b305838003148d Thu Jun 23 10:05:02 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): implement timer init divider via CPU frequency for N5X
Get CPU frequency and update the timer init div with it.
The timer is vary based on the CPU frequency instead of hardcoded.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ibfaa47fb7a25176eebf06f4828bf9729d56f12ed
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| /rk3399_ARM-atf/plat/intel/soc/agilex/include/ |
| H A D | agilex_clock_manager.h | 02a9d70c4deaa2102386611ac6b305838003148d Thu Jun 23 10:05:02 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): implement timer init divider via CPU frequency for N5X
Get CPU frequency and update the timer init div with it.
The timer is vary based on the CPU frequency instead of hardcoded.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ibfaa47fb7a25176eebf06f4828bf9729d56f12ed
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| H A D | socfpga_plat_def.h | 02a9d70c4deaa2102386611ac6b305838003148d Thu Jun 23 10:05:02 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): implement timer init divider via CPU frequency for N5X
Get CPU frequency and update the timer init div with it.
The timer is vary based on the CPU frequency instead of hardcoded.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ibfaa47fb7a25176eebf06f4828bf9729d56f12ed
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| /rk3399_ARM-atf/plat/intel/soc/stratix10/include/ |
| H A D | s10_clock_manager.h | 02a9d70c4deaa2102386611ac6b305838003148d Thu Jun 23 10:05:02 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): implement timer init divider via CPU frequency for N5X
Get CPU frequency and update the timer init div with it.
The timer is vary based on the CPU frequency instead of hardcoded.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ibfaa47fb7a25176eebf06f4828bf9729d56f12ed
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| H A D | socfpga_plat_def.h | 02a9d70c4deaa2102386611ac6b305838003148d Thu Jun 23 10:05:02 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): implement timer init divider via CPU frequency for N5X
Get CPU frequency and update the timer init div with it.
The timer is vary based on the CPU frequency instead of hardcoded.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ibfaa47fb7a25176eebf06f4828bf9729d56f12ed
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| /rk3399_ARM-atf/plat/intel/soc/n5x/ |
| H A D | platform.mk | 02a9d70c4deaa2102386611ac6b305838003148d Thu Jun 23 10:05:02 UTC 2022 Sieu Mun Tang <sieu.mun.tang@intel.com> feat(intel): implement timer init divider via CPU frequency for N5X
Get CPU frequency and update the timer init div with it.
The timer is vary based on the CPU frequency instead of hardcoded.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ibfaa47fb7a25176eebf06f4828bf9729d56f12ed
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