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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mtd/
H A Dnand-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mtd/nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Miquel Raynal <miquel.raynal@bootlin.com>
11 - Richard Weinberger <richard@nod.at>
19 The ECC strength and ECC step size properties define the user
21 they request the ECC engine to correct {strength} bit errors per
24 The interpretation of these parameters is implementation-defined, so
31 pattern: "^nand-controller(@.*)?"
[all …]
H A Dgpmi-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale General-Purpose Media Interface (GPMI) binding
10 - Han Xu <han.xu@nxp.com>
13 - $ref: "nand-controller.yaml"
17 flash chips. The device tree may optionally contain sub-nodes
24 - enum:
25 - fsl,imx23-gpmi-nand
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/OK3568_Linux_fs/u-boot/drivers/mtd/nand/raw/
H A DKconfig9 This option, if enabled, provides more flexible and linux-like
15 Omit standard ECC layouts to safe space. Select this if your driver
16 is known to provide its own ECC layout.
28 bool "Atmel Hardware ECC"
32 bool "Atmel Programmable Multibit ECC (PMECC)"
36 The Programmable Multibit ECC (PMECC) controller is a programmable
40 int "PMECC Correctable ECC Bits"
44 Correctable ECC bits, can be 2, 4, 8, 12, and 24.
59 Generate Programmable Multibit ECC (PMECC) header for SPL image.
113 of OOB area before last ECC sector data starts. This is potentially
[all …]
H A Dmxs_nand_dt.c10 * SPDX-License-Identifier: GPL-2.0+
34 .compatible = "fsl,imx6q-gpmi-nand",
38 .compatible = "fsl,imx7d-gpmi-nand",
53 info->max_ecc_strength_supported = data->max_ecc_strength_supported; in mxs_nand_dt_probe()
55 info->dev = dev; in mxs_nand_dt_probe()
57 ret = dev_read_resource_byname(dev, "gpmi-nand", &res); in mxs_nand_dt_probe()
61 info->gpmi_regs = devm_ioremap(dev, res.start, resource_size(&res)); in mxs_nand_dt_probe()
68 info->bch_regs = devm_ioremap(dev, res.start, resource_size(&res)); in mxs_nand_dt_probe()
70 info->use_minimum_ecc = dev_read_bool(dev, "fsl,use-minimum-ecc"); in mxs_nand_dt_probe()
76 .name = "mxs-nand-dt",
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H A Datmel_nand.c2 * (C) Copyright 2007-2008
8 * Add Programmable Multibit ECC support for various AT91 SoC
11 * SPDX-License-Identifier: GPL-2.0+
31 #include "atmel_nand_ecc.h" /* Hardware ECC registers */
72 * Return number of ecc bytes per sector according to sector size and
78 * 2-bits 4-bytes 4-bytes
79 * 4-bits 7-bytes 7-bytes
80 * 8-bits 13-bytes 14-bytes
81 * 12-bits 20-bytes 21-bytes
82 * 24-bits 39-bytes 42-bytes
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/
H A Dl2c2x0.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
16 models (Note 1). Some of the properties that are just prefixed "cache-*" are
22 cache controllers as found in e.g. Cortex-A15/A7/A57/A53. These
28 - $ref: /schemas/cache-controller.yaml#
33 - enum:
34 - arm,pl310-cache
35 - arm,l220-cache
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/OK3568_Linux_fs/kernel/drivers/mtd/nand/raw/
H A Dmtk_nand.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 * Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
10 #include <linux/dma-mapping.h>
90 #define MTK_NAME "mtk-nand"
147 struct mtk_ecc *ecc; member
186 return (u8 *)p + i * chip->ecc.size; in data_ptr()
198 if (i < mtk_nand->bad_mark.sec) in oob_ptr()
199 poi = chip->oob_poi + (i + 1) * mtk_nand->fdm.reg_size; in oob_ptr()
200 else if (i == mtk_nand->bad_mark.sec) in oob_ptr()
201 poi = chip->oob_poi; in oob_ptr()
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H A Ddenali.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright © 2009-2010, Intel Corporation and its suppliers.
6 * Copyright (c) 2017-2019 Socionext Inc.
12 #include <linux/dma-mapping.h>
23 #define DENALI_NAND_NAME "denali-nand"
31 #define DENALI_MAP10 (2 << 26) /* high-level control plane */
39 #define DENALI_BANK(denali) ((denali)->active_bank << 24)
41 #define DENALI_INVALID_BANK -1
50 return container_of(chip->controller, struct denali_controller, in to_denali_controller()
55 * Direct Addressing - the slave address forms the control information (command
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H A Dtegra_nand.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2014-2015 Lucas Stach <dev@lynxeye.de>
10 #include <linux/dma-mapping.h>
31 #define COMMAND_TRANS_SIZE(size) ((((size) - 1) & 0xf) << 20)
37 #define COMMAND_CLE_SIZE(size) ((((size) - 1) & 0x3) << 4)
38 #define COMMAND_ALE_SIZE(size) ((((size) - 1) & 0xf) << 0)
153 #define OFFSET(val, off) ((val) < (off) ? 0 : (val) - (off))
182 struct mtd_oob_region ecc; member
204 int bytes_per_step = DIV_ROUND_UP(BITS_PER_STEP_RS * chip->ecc.strength, in tegra_nand_ooblayout_rs_ecc()
208 return -ERANGE; in tegra_nand_ooblayout_rs_ecc()
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H A Dmarvell_nand.c1 // SPDX-License-Identifier: GPL-2.0
6 * Author: Miquel RAYNAL <miquel.raynal@free-electrons.com>
13 * The main visible difference is that NFCv1 only has Hamming ECC
14 * capabilities, while NFCv2 also embeds a BCH ECC engine. Also, DMA
17 * The ECC layouts are depicted in details in Marvell AN-379, but here
21 * or 4) and each chunk will have its own ECC "digest" of 6B at the
28 * +-------------------------------------------------------------+
29 * | Data 1 | ... | Data N | ECC 1 | ... | ECCN | Free OOB bytes |
30 * +-------------------------------------------------------------+
33 * ECC) sections and potentially an extra one to deal with
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/OK3568_Linux_fs/u-boot/drivers/ddr/fsl/
H A Dlc_common_dimm_params.c2 * Copyright 2008-2014 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0
39 if (mclk_ps < outpdimm->tckmin_x_ps) { in compute_cas_latency()
42 mclk_ps, outpdimm->tckmin_x_ps); in compute_cas_latency()
45 if (mclk_ps > outpdimm->tckmax_ps) { in compute_cas_latency()
47 mclk_ps, outpdimm->tckmax_ps); in compute_cas_latency()
51 caslat_actual = (outpdimm->taamin_ps + mclk_ps - 1) / mclk_ps; in compute_cas_latency()
55 retry--; in compute_cas_latency()
66 outpdimm->lowest_common_spd_caslat = caslat_actual; in compute_cas_latency()
85 if (mclk_ps > outpdimm->tckmax_ps) { in compute_cas_latency()
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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dimx6ull-myir-mys-6ulx-eval.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include "imx6ull-myir-mys-6ulx.dtsi"
12 model = "MYiR i.MX6ULL MYS-6ULX Single Board Computer with NAND";
13 compatible = "myir,imx6ull-mys-6ulx-eval", "fsl,imx6ull";
17 fsl,use-minimum-ecc;
/OK3568_Linux_fs/kernel/drivers/mtd/nand/
H A Decc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Generic Error-Correcting Code (ECC) engine
10 * This file describes the abstraction of any NAND ECC engine. It has been
11 * designed to fit most cases, including parallel NANDs and SPI-NANDs.
13 * There are three main situations where instantiating this ECC engine makes
15 * - external: The ECC engine is outside the NAND pipeline, typically this
16 * is a software ECC engine, or an hardware engine that is
18 * - pipelined: The ECC engine is inside the NAND pipeline, ie. on the
20 * controllers. In the pipeline case, the ECC bytes are
23 * - ondie: The ECC engine is inside the NAND pipeline, on the chip's side.
[all …]
/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_spd.c4 * SPDX-License-Identifier: GPL-2.0
160 u32 err_check_type; /* ECC , PARITY.. */
197 * Name: ddr3_get_dimm_num - Find number of dimms and their addresses
199 * Args: dimm_addr - array of dimm addresses
212 dimm_cur_addr--) { in ddr3_get_dimm_num()
215 /* Far-End DIMM must be connected */ in ddr3_get_dimm_num()
233 * Name: dimmSpdInit - Get the SPD parameters.
235 * Args: dimmNum - DIMM number. See MV_BOARD_DIMM_NUM enumerator.
236 * info - DIMM information structure.
261 /* No byte for error check in DDR3 SPD, use DDR2 convention */ in ddr3_spd_init()
[all …]
H A Dddr3_hw_training.c4 * SPDX-License-Identifier: GPL-2.0
65 puts("DDR3 Training Sequence - Ver 5.7."); in ddr3_print_version()
91 DEBUG_MAIN_S("DDR3 Training Sequence - DEBUG - 1\n"); in ddr3_hw_training()
105 /* Ignore ECC errors - if ECC is enabled */ in ddr3_hw_training()
175 * Xor Bypass - ECC support in AXP is currently available for 1:1 in ddr3_hw_training()
185 DEBUG_MAIN_S("DDR3 Training Sequence - Run with PBS.\n"); in ddr3_hw_training()
187 DEBUG_MAIN_S("DDR3 Training Sequence - Run without PBS.\n"); in ddr3_hw_training()
198 /* Set low - 100Mhz DDR Frequency by HW */ in ddr3_hw_training()
199 DEBUG_MAIN_S("DDR3 Training Sequence - FAILED (Dfs High2Low)\n"); in ddr3_hw_training()
208 DEBUG_MAIN_S("DDR3 Training Sequence - Registered DIMM Low WL - SKIP\n"); in ddr3_hw_training()
[all …]
/OK3568_Linux_fs/kernel/include/linux/mtd/
H A Drawnand.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org>
73 #define NAND_CMD_NONE -1
82 #define NAND_DATA_IFACE_CHECK_ONLY -1
85 * Constants for Hardware ECC
87 /* Reset Hardware ECC for read */
89 /* Reset Hardware ECC for write */
91 /* Enable Hardware ECC before syndrome is read back from flash */
96 * ecc.correct() returns -EBADMSG.
122 * Chip requires ready check on read (for auto-incremented sequential read).
[all …]
/OK3568_Linux_fs/kernel/arch/s390/include/uapi/asm/
H A Dpkey.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
31 /* Minimum size of a key blob */
40 /* the newer ioctls use a pkey_key_type enum for type information */
50 /* the newer ioctls use a pkey_key_size enum for key size information */
58 /* some of the newer ioctls use these flags */
113 __u16 cardnr; /* in: card to use or FFFF for any */
124 __u16 cardnr; /* in: card to use or FFFF for any */
136 __u16 cardnr; /* in: card to use or FFFF for any */
230 * (return -1 with errno ENODEV). You may use the PKEY_APQNS4KT ioctl to
234 * generating CCA cipher keys you can use one or more of the PKEY_KEYGEN_*
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/OK3568_Linux_fs/kernel/drivers/mtd/nand/raw/gpmi-nand/
H A Dgpmi-nand.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
18 #include <linux/dma/mxs-dma.h>
19 #include "gpmi-nand.h"
20 #include "gpmi-regs.h"
21 #include "bch-regs.h"
24 #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
52 while ((readl(addr) & mask) && --timeout) in clear_poll_bit()
96 while ((!(readl(reset_addr) & MODULE_CLKGATE)) && --timeout) in gpmi_reset_block()
116 return -ETIMEDOUT; in gpmi_reset_block()
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/OK3568_Linux_fs/external/rknpu2/examples/3rdparty/opencv/opencv-linux-aarch64/include/opencv2/video/
H A Dtracking.hpp7 // copy or use the software.
13 // Copyright (C) 2000-2008, Intel Corporation, all rights reserved.
18 // Redistribution and use in source and binary forms, with or without modification,
37 // loss of use, data, or profits; or business interruption) however caused
40 // the use of this software, even if advised of the possibility of such damage.
76 - (Python) A sample explaining the camshift tracking algorithm can be found at
82 An example using the mean-shift tracking algorithm
98 calcBackProject to this function. But better results can be obtained if you pre-filter the back
108 @param img 8-bit input image.
112 @param maxLevel 0-based maximal pyramid level number.
[all …]
/OK3568_Linux_fs/external/rknpu2/examples/3rdparty/opencv/opencv-linux-armhf/include/opencv2/video/
H A Dtracking.hpp7 // copy or use the software.
13 // Copyright (C) 2000-2008, Intel Corporation, all rights reserved.
18 // Redistribution and use in source and binary forms, with or without modification,
37 // loss of use, data, or profits; or business interruption) however caused
40 // the use of this software, even if advised of the possibility of such damage.
76 - (Python) A sample explaining the camshift tracking algorithm can be found at
82 An example using the mean-shift tracking algorithm
98 calcBackProject to this function. But better results can be obtained if you pre-filter the back
108 @param img 8-bit input image.
112 @param maxLevel 0-based maximal pyramid level number.
[all …]
/OK3568_Linux_fs/kernel/Documentation/admin-guide/
H A Dras.rst33 -------------
44 * Memory – add error correction logic (ECC) to detect and correct errors;
47 Self-Monitoring, Analysis and Reporting Technology (SMART).
55 ---------------
57 Most mechanisms used on modern systems use technologies like Hamming
68 * **Correctable Error (CE)** - the error detection mechanism detected and
72 * **Uncorrected Error (UE)** - the amount of errors happened above the error
73 correction threshold, and the system was unable to auto-correct.
75 * **Fatal Error** - when an UE error happens on a critical component of the
79 * **Non-fatal Error** - when an UE error happens on an unused component,
[all …]
/OK3568_Linux_fs/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dspd_sdram.c2 * (C) Copyright 2006-2007 Freescale Semiconductor, Inc.
7 * Copyright (C) 2004-2006 Freescale Semiconductor, Inc.
11 * SPDX-License-Identifier: GPL-2.0+
27 volatile ddr83xx_t *ddr = &immap->ddr; in board_add_ram_info()
30 printf(" (DDR%d", ((ddr->sdram_cfg & SDRAM_CFG_SDRAM_TYPE_MASK) in board_add_ram_info()
31 >> SDRAM_CFG_SDRAM_TYPE_SHIFT) - 1); in board_add_ram_info()
34 if ((ddr->sdram_cfg & SDRAM_CFG_DBW_MASK) == SDRAM_CFG_DBW_16) in board_add_ram_info()
35 puts(", 16-bit"); in board_add_ram_info()
36 else if ((ddr->sdram_cfg & SDRAM_CFG_DBW_MASK) == SDRAM_CFG_DBW_32) in board_add_ram_info()
37 puts(", 32-bit"); in board_add_ram_info()
[all …]
/OK3568_Linux_fs/kernel/drivers/crypto/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
34 Use VIA PadLock for AES algorithm.
39 called padlock-aes.
48 Use VIA PadLock for SHA1/SHA256 algorithms.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
104 down the use of the available crypto hardware.
113 kernel or userspace applications may use these functions.
131 AES cipher algorithms for use with protected key.
[all …]
/OK3568_Linux_fs/kernel/include/linux/
H A Dedac.h6 * 2006-2008 (c) MontaVista Software, Inc. This file is licensed under
26 #define EDAC_OPSTATE_INVAL -1
60 * enum dev_type - describe the type of memory DRAM chips used at the stick
93 * enum hw_event_mc_err_type - type of the detected error
95 * @HW_EVENT_ERR_CORRECTED: Corrected Error - Indicates that an ECC
97 * @HW_EVENT_ERR_UNCORRECTED: Uncorrected Error - Indicates an error that
98 * can't be corrected by ECC, but it is not
101 * it for example, by re-trying the operation).
102 * @HW_EVENT_ERR_DEFERRED: Deferred Error - Indicates an uncorrectable
108 * @HW_EVENT_ERR_FATAL: Fatal Error - Uncorrected error that could not
[all …]
/OK3568_Linux_fs/u-boot/drivers/mtd/nand/raw/brcmnand/
H A Dbrcmnand.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright © 2010-2015 Broadcom Corporation
129 /* List of NAND hosts (one for each chip-select) */
135 /* in-memory cache of the FLASH_CACHE, used only for some commands */
141 const u8 *cs_offsets; /* within each chip-select */
150 /* for low-power standby/resume only */
168 /* use for low-power standby/resume only */
203 BRCMNAND_CS1_BASE, /* CS1 regs, if non-contiguous */
217 BRCMNAND_OOB_READ_10_BASE, /* offset 0x10, if non-contiguous */
219 BRCMNAND_OOB_WRITE_10_BASE, /* offset 0x10, if non-contiguous */
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