xref: /OK3568_Linux_fs/u-boot/drivers/mtd/nand/raw/Kconfig (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun
2*4882a593Smuzhiyunmenuconfig NAND
3*4882a593Smuzhiyun	bool "Raw NAND Device Support"
4*4882a593Smuzhiyunif NAND
5*4882a593Smuzhiyun
6*4882a593Smuzhiyunconfig SYS_NAND_SELF_INIT
7*4882a593Smuzhiyun	bool
8*4882a593Smuzhiyun	help
9*4882a593Smuzhiyun	  This option, if enabled, provides more flexible and linux-like
10*4882a593Smuzhiyun	  NAND initialization process.
11*4882a593Smuzhiyun
12*4882a593Smuzhiyunconfig SYS_NAND_DRIVER_ECC_LAYOUT
13*4882a593Smuzhiyun	bool
14*4882a593Smuzhiyun	help
15*4882a593Smuzhiyun	  Omit standard ECC layouts to safe space. Select this if your driver
16*4882a593Smuzhiyun	  is known to provide its own ECC layout.
17*4882a593Smuzhiyun
18*4882a593Smuzhiyunconfig NAND_ATMEL
19*4882a593Smuzhiyun	bool "Support Atmel NAND controller"
20*4882a593Smuzhiyun	imply SYS_NAND_USE_FLASH_BBT
21*4882a593Smuzhiyun	help
22*4882a593Smuzhiyun	  Enable this driver for NAND flash platforms using an Atmel NAND
23*4882a593Smuzhiyun	  controller.
24*4882a593Smuzhiyun
25*4882a593Smuzhiyunif NAND_ATMEL
26*4882a593Smuzhiyun
27*4882a593Smuzhiyunconfig ATMEL_NAND_HWECC
28*4882a593Smuzhiyun	bool "Atmel Hardware ECC"
29*4882a593Smuzhiyun	default n
30*4882a593Smuzhiyun
31*4882a593Smuzhiyunconfig ATMEL_NAND_HW_PMECC
32*4882a593Smuzhiyun	bool "Atmel Programmable Multibit ECC (PMECC)"
33*4882a593Smuzhiyun	select ATMEL_NAND_HWECC
34*4882a593Smuzhiyun	default n
35*4882a593Smuzhiyun	help
36*4882a593Smuzhiyun	  The Programmable Multibit ECC (PMECC) controller is a programmable
37*4882a593Smuzhiyun	  binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder.
38*4882a593Smuzhiyun
39*4882a593Smuzhiyunconfig PMECC_CAP
40*4882a593Smuzhiyun	int "PMECC Correctable ECC Bits"
41*4882a593Smuzhiyun	depends on ATMEL_NAND_HW_PMECC
42*4882a593Smuzhiyun	default 2
43*4882a593Smuzhiyun	help
44*4882a593Smuzhiyun	  Correctable ECC bits, can be 2, 4, 8, 12, and 24.
45*4882a593Smuzhiyun
46*4882a593Smuzhiyunconfig PMECC_SECTOR_SIZE
47*4882a593Smuzhiyun	int "PMECC Sector Size"
48*4882a593Smuzhiyun	depends on ATMEL_NAND_HW_PMECC
49*4882a593Smuzhiyun	default 512
50*4882a593Smuzhiyun	help
51*4882a593Smuzhiyun	  Sector size, in bytes, can be 512 or 1024.
52*4882a593Smuzhiyun
53*4882a593Smuzhiyunconfig SPL_GENERATE_ATMEL_PMECC_HEADER
54*4882a593Smuzhiyun	bool "Atmel PMECC Header Generation"
55*4882a593Smuzhiyun	select ATMEL_NAND_HWECC
56*4882a593Smuzhiyun	select ATMEL_NAND_HW_PMECC
57*4882a593Smuzhiyun	default n
58*4882a593Smuzhiyun	help
59*4882a593Smuzhiyun	  Generate Programmable Multibit ECC (PMECC) header for SPL image.
60*4882a593Smuzhiyun
61*4882a593Smuzhiyunendif
62*4882a593Smuzhiyun
63*4882a593Smuzhiyunconfig NAND_BRCMNAND
64*4882a593Smuzhiyun	bool "Support Broadcom NAND controller"
65*4882a593Smuzhiyun	depends on OF_CONTROL && DM && MTD
66*4882a593Smuzhiyun	help
67*4882a593Smuzhiyun	  Enable the driver for NAND flash on platforms using a Broadcom NAND
68*4882a593Smuzhiyun	  controller.
69*4882a593Smuzhiyun
70*4882a593Smuzhiyunconfig NAND_BRCMNAND_6838
71*4882a593Smuzhiyun       bool "Support Broadcom NAND controller on bcm6838"
72*4882a593Smuzhiyun       depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838
73*4882a593Smuzhiyun       help
74*4882a593Smuzhiyun         Enable support for broadcom nand driver on bcm6838.
75*4882a593Smuzhiyun
76*4882a593Smuzhiyunconfig NAND_BRCMNAND_6858
77*4882a593Smuzhiyun       bool "Support Broadcom NAND controller on bcm6858"
78*4882a593Smuzhiyun       depends on NAND_BRCMNAND && ARCH_BCM6858
79*4882a593Smuzhiyun       help
80*4882a593Smuzhiyun         Enable support for broadcom nand driver on bcm6858.
81*4882a593Smuzhiyun
82*4882a593Smuzhiyunconfig NAND_BRCMNAND_63158
83*4882a593Smuzhiyun       bool "Support Broadcom NAND controller on bcm63158"
84*4882a593Smuzhiyun       depends on NAND_BRCMNAND && ARCH_BCM63158
85*4882a593Smuzhiyun       help
86*4882a593Smuzhiyun         Enable support for broadcom nand driver on bcm63158.
87*4882a593Smuzhiyun
88*4882a593Smuzhiyunconfig NAND_DAVINCI
89*4882a593Smuzhiyun	bool "Support TI Davinci NAND controller"
90*4882a593Smuzhiyun	help
91*4882a593Smuzhiyun	  Enable this driver for NAND flash controllers available in TI Davinci
92*4882a593Smuzhiyun	  and Keystone2 platforms
93*4882a593Smuzhiyun
94*4882a593Smuzhiyunconfig NAND_DENALI
95*4882a593Smuzhiyun	bool
96*4882a593Smuzhiyun	select SYS_NAND_SELF_INIT
97*4882a593Smuzhiyun	imply CMD_NAND
98*4882a593Smuzhiyun
99*4882a593Smuzhiyunconfig NAND_DENALI_DT
100*4882a593Smuzhiyun	bool "Support Denali NAND controller as a DT device"
101*4882a593Smuzhiyun	select NAND_DENALI
102*4882a593Smuzhiyun	depends on OF_CONTROL && DM
103*4882a593Smuzhiyun	help
104*4882a593Smuzhiyun	  Enable the driver for NAND flash on platforms using a Denali NAND
105*4882a593Smuzhiyun	  controller as a DT device.
106*4882a593Smuzhiyun
107*4882a593Smuzhiyunconfig NAND_DENALI_SPARE_AREA_SKIP_BYTES
108*4882a593Smuzhiyun	int "Number of bytes skipped in OOB area"
109*4882a593Smuzhiyun	depends on NAND_DENALI
110*4882a593Smuzhiyun	range 0 63
111*4882a593Smuzhiyun	help
112*4882a593Smuzhiyun	  This option specifies the number of bytes to skip from the beginning
113*4882a593Smuzhiyun	  of OOB area before last ECC sector data starts.  This is potentially
114*4882a593Smuzhiyun	  used to preserve the bad block marker in the OOB area.
115*4882a593Smuzhiyun
116*4882a593Smuzhiyunconfig NAND_LPC32XX_SLC
117*4882a593Smuzhiyun	bool "Support LPC32XX_SLC controller"
118*4882a593Smuzhiyun	help
119*4882a593Smuzhiyun	  Enable the LPC32XX SLC NAND controller.
120*4882a593Smuzhiyun
121*4882a593Smuzhiyunconfig NAND_OMAP_GPMC
122*4882a593Smuzhiyun	bool "Support OMAP GPMC NAND controller"
123*4882a593Smuzhiyun	depends on ARCH_OMAP2PLUS
124*4882a593Smuzhiyun	help
125*4882a593Smuzhiyun	  Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
126*4882a593Smuzhiyun	  GPMC controller is used for parallel NAND flash devices, and can
127*4882a593Smuzhiyun	  do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
128*4882a593Smuzhiyun	  and BCH16 ECC algorithms.
129*4882a593Smuzhiyun
130*4882a593Smuzhiyunconfig NAND_OMAP_GPMC_PREFETCH
131*4882a593Smuzhiyun	bool "Enable GPMC Prefetch"
132*4882a593Smuzhiyun	depends on NAND_OMAP_GPMC
133*4882a593Smuzhiyun	default y
134*4882a593Smuzhiyun	help
135*4882a593Smuzhiyun	  On OMAP platforms that use the GPMC controller
136*4882a593Smuzhiyun	  (CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
137*4882a593Smuzhiyun	  uses the prefetch mode to speed up read operations.
138*4882a593Smuzhiyun
139*4882a593Smuzhiyunconfig NAND_OMAP_ELM
140*4882a593Smuzhiyun	bool "Enable ELM driver for OMAPxx and AMxx platforms."
141*4882a593Smuzhiyun	depends on NAND_OMAP_GPMC && !OMAP34XX
142*4882a593Smuzhiyun	help
143*4882a593Smuzhiyun	  ELM controller is used for ECC error detection (not ECC calculation)
144*4882a593Smuzhiyun	  of BCH4, BCH8 and BCH16 ECC algorithms.
145*4882a593Smuzhiyun	  Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
146*4882a593Smuzhiyun	  thus such SoC platforms need to depend on software library for ECC error
147*4882a593Smuzhiyun	  detection. However ECC calculation on such plaforms would still be
148*4882a593Smuzhiyun	  done by GPMC controller.
149*4882a593Smuzhiyun
150*4882a593Smuzhiyunconfig NAND_VF610_NFC
151*4882a593Smuzhiyun	bool "Support for Freescale NFC for VF610"
152*4882a593Smuzhiyun	select SYS_NAND_SELF_INIT
153*4882a593Smuzhiyun	select SYS_NAND_DRIVER_ECC_LAYOUT
154*4882a593Smuzhiyun	imply CMD_NAND
155*4882a593Smuzhiyun	help
156*4882a593Smuzhiyun	  Enables support for NAND Flash Controller on some Freescale
157*4882a593Smuzhiyun	  processors like the VF610, MCF54418 or Kinetis K70.
158*4882a593Smuzhiyun	  The driver supports a maximum 2k page size. The driver
159*4882a593Smuzhiyun	  currently does not support hardware ECC.
160*4882a593Smuzhiyun
161*4882a593Smuzhiyunif NAND_VF610_NFC
162*4882a593Smuzhiyun
163*4882a593Smuzhiyunconfig NAND_VF610_NFC_DT
164*4882a593Smuzhiyun        bool "Support Vybrid's vf610 NAND controller as a DT device"
165*4882a593Smuzhiyun        depends on OF_CONTROL && MTD
166*4882a593Smuzhiyun        help
167*4882a593Smuzhiyun          Enable the driver for Vybrid's vf610 NAND flash on platforms
168*4882a593Smuzhiyun	  using device tree.
169*4882a593Smuzhiyun
170*4882a593Smuzhiyunchoice
171*4882a593Smuzhiyun	prompt "Hardware ECC strength"
172*4882a593Smuzhiyun	depends on NAND_VF610_NFC
173*4882a593Smuzhiyun	default SYS_NAND_VF610_NFC_45_ECC_BYTES
174*4882a593Smuzhiyun	help
175*4882a593Smuzhiyun	  Select the ECC strength used in the hardware BCH ECC block.
176*4882a593Smuzhiyun
177*4882a593Smuzhiyunconfig SYS_NAND_VF610_NFC_45_ECC_BYTES
178*4882a593Smuzhiyun	bool "24-error correction (45 ECC bytes)"
179*4882a593Smuzhiyun
180*4882a593Smuzhiyunconfig SYS_NAND_VF610_NFC_60_ECC_BYTES
181*4882a593Smuzhiyun	bool "32-error correction (60 ECC bytes)"
182*4882a593Smuzhiyun
183*4882a593Smuzhiyunendchoice
184*4882a593Smuzhiyun
185*4882a593Smuzhiyunendif
186*4882a593Smuzhiyun
187*4882a593Smuzhiyunconfig NAND_PXA3XX
188*4882a593Smuzhiyun	bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
189*4882a593Smuzhiyun	select SYS_NAND_SELF_INIT
190*4882a593Smuzhiyun	imply CMD_NAND
191*4882a593Smuzhiyun	help
192*4882a593Smuzhiyun	  This enables the driver for the NAND flash device found on
193*4882a593Smuzhiyun	  PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
194*4882a593Smuzhiyun
195*4882a593Smuzhiyunconfig NAND_SUNXI
196*4882a593Smuzhiyun	bool "Support for NAND on Allwinner SoCs"
197*4882a593Smuzhiyun	default ARCH_SUNXI
198*4882a593Smuzhiyun	depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
199*4882a593Smuzhiyun	select SYS_NAND_SELF_INIT
200*4882a593Smuzhiyun	select SYS_NAND_U_BOOT_LOCATIONS
201*4882a593Smuzhiyun	select SPL_NAND_SUPPORT
202*4882a593Smuzhiyun	imply CMD_NAND
203*4882a593Smuzhiyun	---help---
204*4882a593Smuzhiyun	Enable support for NAND. This option enables the standard and
205*4882a593Smuzhiyun	SPL drivers.
206*4882a593Smuzhiyun	The SPL driver only supports reading from the NAND using DMA
207*4882a593Smuzhiyun	transfers.
208*4882a593Smuzhiyun
209*4882a593Smuzhiyunif NAND_SUNXI
210*4882a593Smuzhiyun
211*4882a593Smuzhiyunconfig NAND_SUNXI_SPL_ECC_STRENGTH
212*4882a593Smuzhiyun	int "Allwinner NAND SPL ECC Strength"
213*4882a593Smuzhiyun	default 64
214*4882a593Smuzhiyun
215*4882a593Smuzhiyunconfig NAND_SUNXI_SPL_ECC_SIZE
216*4882a593Smuzhiyun	int "Allwinner NAND SPL ECC Step Size"
217*4882a593Smuzhiyun	default 1024
218*4882a593Smuzhiyun
219*4882a593Smuzhiyunconfig NAND_SUNXI_SPL_USABLE_PAGE_SIZE
220*4882a593Smuzhiyun	int "Allwinner NAND SPL Usable Page Size"
221*4882a593Smuzhiyun	default 1024
222*4882a593Smuzhiyun
223*4882a593Smuzhiyunendif
224*4882a593Smuzhiyun
225*4882a593Smuzhiyunconfig NAND_ARASAN
226*4882a593Smuzhiyun	bool "Configure Arasan Nand"
227*4882a593Smuzhiyun	select SYS_NAND_SELF_INIT
228*4882a593Smuzhiyun	imply CMD_NAND
229*4882a593Smuzhiyun	help
230*4882a593Smuzhiyun	  This enables Nand driver support for Arasan nand flash
231*4882a593Smuzhiyun	  controller. This uses the hardware ECC for read and
232*4882a593Smuzhiyun	  write operations.
233*4882a593Smuzhiyun
234*4882a593Smuzhiyunconfig NAND_MXC
235*4882a593Smuzhiyun	bool "MXC NAND support"
236*4882a593Smuzhiyun	depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
237*4882a593Smuzhiyun	imply CMD_NAND
238*4882a593Smuzhiyun	help
239*4882a593Smuzhiyun	  This enables the NAND driver for the NAND flash controller on the
240*4882a593Smuzhiyun	  i.MX27 / i.MX31 / i.MX5 rocessors.
241*4882a593Smuzhiyun
242*4882a593Smuzhiyunconfig NAND_MXS
243*4882a593Smuzhiyun	bool "MXS NAND support"
244*4882a593Smuzhiyun	depends on MX23 || MX28 || MX6 || MX7
245*4882a593Smuzhiyun	select SYS_NAND_SELF_INIT
246*4882a593Smuzhiyun	imply CMD_NAND
247*4882a593Smuzhiyun	select APBH_DMA
248*4882a593Smuzhiyun	select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
249*4882a593Smuzhiyun	select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7
250*4882a593Smuzhiyun	help
251*4882a593Smuzhiyun	  This enables NAND driver for the NAND flash controller on the
252*4882a593Smuzhiyun	  MXS processors.
253*4882a593Smuzhiyun
254*4882a593Smuzhiyunif NAND_MXS
255*4882a593Smuzhiyun
256*4882a593Smuzhiyunconfig NAND_MXS_DT
257*4882a593Smuzhiyun	bool "Support MXS NAND controller as a DT device"
258*4882a593Smuzhiyun	depends on OF_CONTROL && MTD
259*4882a593Smuzhiyun	help
260*4882a593Smuzhiyun	  Enable the driver for MXS NAND flash on platforms using
261*4882a593Smuzhiyun	  device tree.
262*4882a593Smuzhiyun
263*4882a593Smuzhiyunconfig NAND_MXS_USE_MINIMUM_ECC
264*4882a593Smuzhiyun	bool "Use minimum ECC strength supported by the controller"
265*4882a593Smuzhiyun	default false
266*4882a593Smuzhiyun
267*4882a593Smuzhiyunendif
268*4882a593Smuzhiyun
269*4882a593Smuzhiyunconfig NAND_ROCKCHIP
270*4882a593Smuzhiyun	bool "Support for NAND on Rockchip SoCs"
271*4882a593Smuzhiyun	select SYS_NAND_SELF_INIT
272*4882a593Smuzhiyun	default n
273*4882a593Smuzhiyun	help
274*4882a593Smuzhiyun	  Enable support for Rockchip nand.
275*4882a593Smuzhiyun
276*4882a593Smuzhiyunconfig NAND_ROCKCHIP_V9
277*4882a593Smuzhiyun	bool "Support for NAND V9 on Rockchip SoCs"
278*4882a593Smuzhiyun	select SYS_NAND_SELF_INIT
279*4882a593Smuzhiyun	default n
280*4882a593Smuzhiyun	help
281*4882a593Smuzhiyun	  Enable support for Rockchip nand v9.
282*4882a593Smuzhiyun
283*4882a593Smuzhiyunif NAND_ROCKCHIP || NAND_ROCKCHIP_V9
284*4882a593Smuzhiyunconfig NAND_ROCKCHIP_DT
285*4882a593Smuzhiyun	bool "Support Rockchip NAND controller as a DT device"
286*4882a593Smuzhiyun	default y
287*4882a593Smuzhiyun	help
288*4882a593Smuzhiyun	  Enable the driver for Rockchip NAND flash on platforms
289*4882a593Smuzhiyun	  using device tree.
290*4882a593Smuzhiyunendif
291*4882a593Smuzhiyun
292*4882a593Smuzhiyunconfig NAND_ZYNQ
293*4882a593Smuzhiyun	bool "Support for Zynq Nand controller"
294*4882a593Smuzhiyun	select SYS_NAND_SELF_INIT
295*4882a593Smuzhiyun	imply CMD_NAND
296*4882a593Smuzhiyun	help
297*4882a593Smuzhiyun	  This enables Nand driver support for Nand flash controller
298*4882a593Smuzhiyun	  found on Zynq SoC.
299*4882a593Smuzhiyun
300*4882a593Smuzhiyunconfig NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
301*4882a593Smuzhiyun	bool "Enable use of 1st stage bootloader timing for NAND"
302*4882a593Smuzhiyun	depends on NAND_ZYNQ
303*4882a593Smuzhiyun	help
304*4882a593Smuzhiyun	  This flag prevent U-boot reconfigure NAND flash controller and reuse
305*4882a593Smuzhiyun	  the NAND timing from 1st stage bootloader.
306*4882a593Smuzhiyun
307*4882a593Smuzhiyunconfig NAND_STM32_FMC2
308*4882a593Smuzhiyun	bool "Support for NAND controller on STM32MP SoCs"
309*4882a593Smuzhiyun	depends on ARCH_STM32MP
310*4882a593Smuzhiyun	select SYS_NAND_SELF_INIT
311*4882a593Smuzhiyun	imply CMD_NAND
312*4882a593Smuzhiyun	help
313*4882a593Smuzhiyun	  Enables support for NAND Flash chips on SoCs containing the FMC2
314*4882a593Smuzhiyun	  NAND controller. This controller is found on STM32MP SoCs.
315*4882a593Smuzhiyun	  The controller supports a maximum 8k page size and supports
316*4882a593Smuzhiyun	  a maximum 8-bit correction error per sector of 512 bytes.
317*4882a593Smuzhiyun
318*4882a593Smuzhiyuncomment "Generic NAND options"
319*4882a593Smuzhiyun
320*4882a593Smuzhiyunconfig SYS_NAND_BLOCK_SIZE
321*4882a593Smuzhiyun	hex "NAND chip eraseblock size"
322*4882a593Smuzhiyun	depends on ARCH_SUNXI
323*4882a593Smuzhiyun	help
324*4882a593Smuzhiyun	  Number of data bytes in one eraseblock for the NAND chip on the
325*4882a593Smuzhiyun	  board. This is the multiple of NAND_PAGE_SIZE and the number of
326*4882a593Smuzhiyun	  pages.
327*4882a593Smuzhiyun
328*4882a593Smuzhiyunconfig SYS_NAND_PAGE_SIZE
329*4882a593Smuzhiyun	hex "NAND chip page size"
330*4882a593Smuzhiyun	depends on ARCH_SUNXI
331*4882a593Smuzhiyun	help
332*4882a593Smuzhiyun	  Number of data bytes in one page for the NAND chip on the
333*4882a593Smuzhiyun	  board, not including the OOB area.
334*4882a593Smuzhiyun
335*4882a593Smuzhiyunconfig SYS_NAND_OOBSIZE
336*4882a593Smuzhiyun	hex "NAND chip OOB size"
337*4882a593Smuzhiyun	depends on ARCH_SUNXI
338*4882a593Smuzhiyun	help
339*4882a593Smuzhiyun	  Number of bytes in the Out-Of-Band area for the NAND chip on
340*4882a593Smuzhiyun	  the board.
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun# Enhance depends when converting drivers to Kconfig which use this config
343*4882a593Smuzhiyun# option (mxc_nand, ndfc, omap_gpmc).
344*4882a593Smuzhiyunconfig SYS_NAND_BUSWIDTH_16BIT
345*4882a593Smuzhiyun	bool "Use 16-bit NAND interface"
346*4882a593Smuzhiyun	depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
347*4882a593Smuzhiyun	help
348*4882a593Smuzhiyun	  Indicates that NAND device has 16-bit wide data-bus. In absence of this
349*4882a593Smuzhiyun	  config, bus-width of NAND device is assumed to be either 8-bit and later
350*4882a593Smuzhiyun	  determined by reading ONFI params.
351*4882a593Smuzhiyun	  Above config is useful when NAND device's bus-width information cannot
352*4882a593Smuzhiyun	  be determined from on-chip ONFI params, like in following scenarios:
353*4882a593Smuzhiyun	  - SPL boot does not support reading of ONFI parameters. This is done to
354*4882a593Smuzhiyun	    keep SPL code foot-print small.
355*4882a593Smuzhiyun	  - In current U-Boot flow using nand_init(), driver initialization
356*4882a593Smuzhiyun	    happens in board_nand_init() which is called before any device probe
357*4882a593Smuzhiyun	    (nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
358*4882a593Smuzhiyun	    not available while configuring controller. So a static CONFIG_NAND_xx
359*4882a593Smuzhiyun	    is needed to know the device's bus-width in advance.
360*4882a593Smuzhiyun
361*4882a593Smuzhiyunconfig SYS_NAND_MAX_CHIPS
362*4882a593Smuzhiyun	int "NAND max chips"
363*4882a593Smuzhiyun	default 1
364*4882a593Smuzhiyun	depends on NAND_ARASAN
365*4882a593Smuzhiyun	help
366*4882a593Smuzhiyun	  The maximum number of NAND chips per device to be supported.
367*4882a593Smuzhiyun
368*4882a593Smuzhiyunif SPL
369*4882a593Smuzhiyun
370*4882a593Smuzhiyunconfig SYS_NAND_U_BOOT_LOCATIONS
371*4882a593Smuzhiyun	bool "Define U-boot binaries locations in NAND"
372*4882a593Smuzhiyun	help
373*4882a593Smuzhiyun	Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
374*4882a593Smuzhiyun	This option should not be enabled when compiling U-boot for boards
375*4882a593Smuzhiyun	defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
376*4882a593Smuzhiyun	file.
377*4882a593Smuzhiyun
378*4882a593Smuzhiyunconfig SYS_NAND_U_BOOT_OFFS
379*4882a593Smuzhiyun	hex "Location in NAND to read U-Boot from"
380*4882a593Smuzhiyun	default 0x800000 if NAND_SUNXI
381*4882a593Smuzhiyun	depends on SYS_NAND_U_BOOT_LOCATIONS
382*4882a593Smuzhiyun	help
383*4882a593Smuzhiyun	Set the offset from the start of the nand where u-boot should be
384*4882a593Smuzhiyun	loaded from.
385*4882a593Smuzhiyun
386*4882a593Smuzhiyunconfig SYS_NAND_U_BOOT_OFFS_REDUND
387*4882a593Smuzhiyun	hex "Location in NAND to read U-Boot from"
388*4882a593Smuzhiyun	default SYS_NAND_U_BOOT_OFFS
389*4882a593Smuzhiyun	depends on SYS_NAND_U_BOOT_LOCATIONS
390*4882a593Smuzhiyun	help
391*4882a593Smuzhiyun	Set the offset from the start of the nand where the redundant u-boot
392*4882a593Smuzhiyun	should be loaded from.
393*4882a593Smuzhiyun
394*4882a593Smuzhiyunconfig SPL_NAND_AM33XX_BCH
395*4882a593Smuzhiyun	bool "Enables SPL-NAND driver which supports ELM based"
396*4882a593Smuzhiyun	depends on NAND_OMAP_GPMC && !OMAP34XX
397*4882a593Smuzhiyun	default y
398*4882a593Smuzhiyun        help
399*4882a593Smuzhiyun	  Hardware ECC correction. This is useful for platforms which have ELM
400*4882a593Smuzhiyun	  hardware engine and use NAND boot mode.
401*4882a593Smuzhiyun	  Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
402*4882a593Smuzhiyun	  so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
403*4882a593Smuzhiyun          SPL-NAND driver with software ECC correction support.
404*4882a593Smuzhiyun
405*4882a593Smuzhiyunconfig SPL_NAND_DENALI
406*4882a593Smuzhiyun	bool "Support Denali NAND controller for SPL"
407*4882a593Smuzhiyun	help
408*4882a593Smuzhiyun	  This is a small implementation of the Denali NAND controller
409*4882a593Smuzhiyun	  for use on SPL.
410*4882a593Smuzhiyun
411*4882a593Smuzhiyunconfig SPL_NAND_SIMPLE
412*4882a593Smuzhiyun	bool "Use simple SPL NAND driver"
413*4882a593Smuzhiyun	depends on !SPL_NAND_AM33XX_BCH
414*4882a593Smuzhiyun	help
415*4882a593Smuzhiyun	  Support for NAND boot using simple NAND drivers that
416*4882a593Smuzhiyun	  expose the cmd_ctrl() interface.
417*4882a593Smuzhiyunendif
418*4882a593Smuzhiyun
419*4882a593Smuzhiyunendif   # if NAND
420