| /OK3568_Linux_fs/u-boot/drivers/misc/ |
| H A D | rockchip-otp.c | 1 // SPDX-License-Identifier: GPL-2.0
15 #include <rockchip-otp.h>
19 int (*read)(struct udevice *dev, int offset, void *buf, int size);
22 static int rockchip_otp_wait_status(struct rockchip_otp_platdata *otp, in rockchip_otp_wait_status() argument
27 while (!(readl(otp->base + OTPC_INT_STATUS) & flag)) { in rockchip_otp_wait_status()
29 delay--; in rockchip_otp_wait_status()
32 return -ETIMEDOUT; in rockchip_otp_wait_status()
37 writel(flag, otp->base + OTPC_INT_STATUS); in rockchip_otp_wait_status()
42 static int rockchip_otp_ecc_enable(struct rockchip_otp_platdata *otp, in rockchip_otp_ecc_enable() argument
48 otp->base + OTPC_SBPI_CTRL); in rockchip_otp_ecc_enable()
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| H A D | Kconfig | 62 bool "Rockchip e-fuse support"
65 Enable (read-only) access for the e-fuse block found in Rockchip
67 or through child-nodes that are generated based on the e-fuse map
75 bool "Rockchip OTP Support"
79 from otp, such as cpu-leakage.
85 This driver support Decompress IP built-in Rockchip SoC, support
92 This driver support Decompress IP built-in Rockchip SoC, support
96 bool "Rockchip Secure OTP Support"
99 Support read & write secure otp.
102 bool "Rockchip Secure OTP Support in spl"
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| /OK3568_Linux_fs/kernel/drivers/nvmem/ |
| H A D | rockchip-otp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Rockchip OTP Driver
6 * Author: Finley Xiao <finley.xiao@rock-chips.com>
15 #include <linux/nvmem-provider.h>
23 /* OTP Register Offsets */
56 /* OTP Register bits and masks */
108 * +----------+------------------+--------------------------+
110 * +----------+------------------+--------------------------+
112 * +----------+------------------+--------------------------+
114 * +----------+------------------+--------------------------+
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| H A D | mxs-ocotp.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale MXS On-Chip OTP driver
15 #include <linux/nvmem-provider.h>
36 static int mxs_ocotp_wait(struct mxs_ocotp *otp) in mxs_ocotp_wait() argument
41 while (timeout--) { in mxs_ocotp_wait()
42 status = readl(otp->base); in mxs_ocotp_wait()
51 return -EBUSY; in mxs_ocotp_wait()
53 return -EIO; in mxs_ocotp_wait()
61 struct mxs_ocotp *otp = context; in mxs_ocotp_read() local
65 ret = clk_enable(otp->clk); in mxs_ocotp_read()
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| H A D | rockchip-secure-otp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Rockchip Secure OTP Driver
6 * Author: Hisping <hisping.lin@rock-chips.com>
15 #include <linux/nvmem-provider.h>
36 int size; member
39 int (*init)(struct rockchip_otp *otp);
44 if (ver->impl_id == TEE_IMPL_ID_OPTEE) in optee_ctx_match()
51 * func: read data from non-protected oem zone in secure otp
71 return -EINVAL; in rockchip_read_oem_non_protected_otp()
78 /* Open context with OP-TEE driver */ in rockchip_read_oem_non_protected_otp()
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| H A D | stm32-romem.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Factory-programmed memory read access driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
9 #include <linux/arm-smccc.h>
12 #include <linux/nvmem-provider.h>
15 /* BSEC secure service access from non-secure */
25 /* 32 (x 32-bits) lower shadow registers */
29 int size; member
45 *buf8++ = readb_relaxed(priv->base + i); in stm32_romem_read()
50 static int stm32_bsec_smc(u8 op, u32 otp, u32 data, u32 *result) in stm32_bsec_smc() argument
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| H A D | lpc18xx_otp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * NXP LPC18xx/43xx OTP memory NVMEM driver
10 * TODO: add support for writing OTP register via API in boot ROM.
15 #include <linux/nvmem-provider.h>
22 * LPC18xx OTP memory contains 4 banks with 4 32-bit words. Bank 0 starts
44 struct lpc18xx_otp *otp = context; in lpc18xx_otp_read() local
50 if (count > (LPC18XX_OTP_SIZE - index)) in lpc18xx_otp_read()
51 count = LPC18XX_OTP_SIZE - index; in lpc18xx_otp_read()
54 *buf++ = readl(otp->base + i * LPC18XX_OTP_WORD_SIZE); in lpc18xx_otp_read()
60 .name = "lpc18xx-otp",
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| H A D | bcm-ocotp.c | 19 #include <linux/nvmem-provider.h>
25 * # of tries for OTP Status. The time to execute a command varies. The slowest
31 /* Sequence to enable OTP program */
56 #define OTPC_CMD_MASK (BIT(OTPC_COMMAND_COMMAND_WIDTH) - 1)
57 #define OTPC_ADDR_MASK (BIT(OTPC_CPUADDR_REG_OTPC_CPU_ADDRESS_WIDTH) - 1)
125 return -EAGAIN; in poll_cpu_status()
168 u32 address = offset / priv->config->word_size; in bcm_otpc_read()
172 set_command(priv->base, OTPC_CMD_READ); in bcm_otpc_read()
173 set_cpu_address(priv->base, address++); in bcm_otpc_read()
174 set_start_bit(priv->base); in bcm_otpc_read()
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/nvmem/ |
| H A D | rockchip-secure-otp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/rockchip-secure-otp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip secure otp device tree bindings
10 - Hisping <hisping.lin@rock-chips.com>
13 - $ref: "nvmem.yaml#"
18 - rockchip,secure-otp
20 rockchip,otp-size:
22 size of non-protected oem zone in secure otp, In bytes.
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| H A D | rockchip-otp.txt | 1 Rockchip internal OTP (One Time Programmable) memory device tree bindings
4 - compatible: Should be one of the following.
5 - "rockchip,px30-otp" - for PX30 SoCs.
6 - "rockchip,rk3308-otp" - for RK3308 SoCs.
7 - reg: Should contain the registers location and size
8 - clocks: Must contain an entry for each entry in clock-names.
9 - clock-names: Should be "otp", "apb_pclk" and "phy".
12 - resets: Must contain an entry for each entry in reset-names.
14 - reset-names: Should be "phy".
19 otp: otp@ff290000 {
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| H A D | lpc1850-otp.txt | 1 * NXP LPC18xx OTP memory
3 Internal OTP (One Time Programmable) memory for NXP LPC18xx/43xx devices.
6 - compatible: Should be "nxp,lpc1850-otp"
7 - reg: Must contain an entry with the physical base address and length
8 for each entry in reg-names.
9 - address-cells: must be set to 1.
10 - size-cells: must be set to 1.
15 otp: otp@40045000 {
16 compatible = "nxp,lpc1850-otp";
18 #address-cells = <1>;
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| H A D | st,stm32-romem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/st,stm32-romem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Factory-programmed data bindings
10 This represents STM32 Factory-programmed read only non-volatile area: locked
11 flash, OTP, read-only HW regs... This contains various information such as:
16 - Fabrice Gasnier <fabrice.gasnier@st.com>
19 - $ref: "nvmem.yaml#"
24 - st,stm32f4-otp
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| H A D | brcm,ocotp.txt | 1 Broadcom OTP memory controller
4 - compatible: "brcm,ocotp" for the first generation Broadcom OTPC which is used
5 in Cygnus and supports 32 bit read/write. Use "brcm,ocotp-v2" for the second
7 64-bit read/write.
8 - reg: Base address of the OTP controller.
9 - brcm,ocotp-size: Amount of memory available, in 32 bit words
13 otp: otp@301c800 {
16 brcm,ocotp-size = <2048>;
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| /OK3568_Linux_fs/kernel/drivers/media/i2c/ |
| H A D | otp_eeprom.c | 1 // SPDX-License-Identifier: GPL-2.0
11 * 1. fix otp info null issue.
13 * 1. add buf read optimize otp read speed.
14 * 2. add mutex for otp read.
22 #include <linux/rk-camera-module.h>
25 #include <media/v4l2-ctrls.h>
26 #include <media/v4l2-device.h>
50 return -EINVAL; in read_reg_otp()
54 msgs[0].addr = client->addr; in read_reg_otp()
60 msgs[1].addr = client->addr; in read_reg_otp()
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| H A D | ov5670.c | 1 // SPDX-License-Identifier: GPL-2.0
9 * V0.0X01.0X03 add otp function.
26 #include <media/v4l2-async.h>
27 #include <media/media-entity.h>
28 #include <media/v4l2-common.h>
29 #include <media/v4l2-ctrls.h>
30 #include <media/v4l2-device.h>
31 #include <media/v4l2-event.h>
32 #include <media/v4l2-fwnode.h>
33 #include <media/v4l2-image-sizes.h>
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| /OK3568_Linux_fs/kernel/drivers/mtd/nand/onenand/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
43 bool "OneNAND OTP Support"
46 a One-Time Programmable Block memory area.
47 Also, 1st Block of NAND Flash Array can be used as OTP.
49 The OTP block can be read, programmed and locked using the same
51 OTP block cannot be erased.
53 OTP block is fully-guaranteed to be a valid block.
59 Since the device is equipped with two DataRAMs, and two-plane NAND
63 So MTD regards it as 4KiB page size and 256KiB block size
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| H A D | onenand_base.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2005-2009 Samsung Electronics
9 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
10 * auto-placement support, read-while load support, various fixes
13 * Flex-OneNAND support
15 * OTP support
39 /* Default Flex-OneNAND boundary and lock respectively */
40 static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
43 MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
47 " : 0->Set boundary in unlocked status"
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/intel/iwlwifi/ |
| H A D | iwl-eeprom-read.c | 8 * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2018 - 2019 Intel Corporation
25 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
29 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
30 * Copyright(c) 2018 - 2019 Intel Corporation
63 #include "iwl-drv.h"
64 #include "iwl-debug.h"
65 #include "iwl-eeprom-read.h"
66 #include "iwl-io.h"
67 #include "iwl-prph.h"
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| /OK3568_Linux_fs/u-boot/include/mtd/ |
| H A D | mtd-abi.h | 2 * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> et al.
4 * SPDX-License-Identifier: GPL-2.0+
46 * @MTD_OPS_RAW: data are transferred as-is, with no error correction;
60 * struct mtd_write_req - data structure for requesting a write operation
65 * @usr_data: user-provided data buffer
66 * @usr_oob: user-provided OOB buffer
71 * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to
72 * write data-only, set @usr_oob == NULL. However, setting both @usr_data and
112 /* OTP mode selection */
120 __u32 size; /* Total size of the MTD */ member
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| /OK3568_Linux_fs/kernel/include/uapi/mtd/ |
| H A D | mtd-abi.h | 1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> et al.
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
55 * @MTD_OPS_RAW: data are transferred as-is, with no error correction;
69 * struct mtd_write_req - data structure for requesting a write operation
74 * @usr_data: user-provided data buffer
75 * @usr_oob: user-provided OOB buffer
80 * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to
81 * write data-only, set @usr_oob == NULL. However, setting both @usr_data and
123 /* OTP mode selection */
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/include/mtd/ |
| H A D | mtd-abi.h | 1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> et al.
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
55 * @MTD_OPS_RAW: data are transferred as-is, with no error correction;
69 * struct mtd_write_req - data structure for requesting a write operation
74 * @usr_data: user-provided data buffer
75 * @usr_oob: user-provided OOB buffer
80 * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to
81 * write data-only, set @usr_oob == NULL. However, setting both @usr_data and
122 /* OTP mode selection */
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/mtd/ |
| H A D | mtd-abi.h | 1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org> et al.
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
55 * @MTD_OPS_RAW: data are transferred as-is, with no error correction;
69 * struct mtd_write_req - data structure for requesting a write operation
74 * @usr_data: user-provided data buffer
75 * @usr_oob: user-provided OOB buffer
80 * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to
81 * write data-only, set @usr_oob == NULL. However, setting both @usr_data and
122 /* OTP mode selection */
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/mediatek/mt76/mt7603/ |
| H A D | eeprom.c | 1 // SPDX-License-Identifier: ISC
21 return -ETIMEDOUT; in mt7603_efuse_read()
51 dev->mt76.otp.data = devm_kzalloc(dev->mt76.dev, len, GFP_KERNEL); in mt7603_efuse_init()
52 dev->mt76.otp.size = len; in mt7603_efuse_init()
53 if (!dev->mt76.otp.data) in mt7603_efuse_init()
54 return -ENOMEM; in mt7603_efuse_init()
56 buf = dev->mt76.otp.data; in mt7603_efuse_init()
104 struct device_node *np = dev->mt76.dev->of_node; in mt7603_apply_cal_free_data()
105 u8 *eeprom = dev->mt76.eeprom.data; in mt7603_apply_cal_free_data()
109 if (!np || !of_property_read_bool(np, "mediatek,eeprom-merge-otp")) in mt7603_apply_cal_free_data()
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| /OK3568_Linux_fs/kernel/include/linux/ssb/ |
| H A D | ssb_driver_chipcommon.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
30 #define SSB_CHIPCO_CAP_UARTGPIO 0x00000020 /* UARTs on GPIO 15-12 */
47 #define SSB_CHIPCO_CAP_OTPS 0x00380000 /* OTP size */
52 #define SSB_CHIPCO_CAP_64BIT 0x08000000 /* 64-bit Backplane */
61 #define SSB_CHIPCO_OTPS 0x0010 /* OTP status */
67 #define SSB_CHIPCO_OTPC 0x0014 /* OTP control */
74 #define SSB_CHIPCO_OTPP 0x0018 /* OTP prog */
395 /** Chip specific Chip-Status register contents. */
398 #define SSB_CHIPCO_CHST_4325_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */
399 #define SSB_CHIPCO_CHST_4325_SPROM_SEL 1 /* OTP is powered up, SPROM is present */
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/mediatek/mt76/mt7615/ |
| H A D | eeprom.c | 1 // SPDX-License-Identifier: ISC
25 return -ETIMEDOUT; in mt7615_efuse_read()
54 dev->mt76.otp.data = devm_kzalloc(dev->mt76.dev, len, GFP_KERNEL); in mt7615_efuse_init()
55 dev->mt76.otp.size = len; in mt7615_efuse_init()
56 if (!dev->mt76.otp.data) in mt7615_efuse_init()
57 return -ENOMEM; in mt7615_efuse_init()
59 buf = dev->mt76.otp.data; in mt7615_efuse_init()
75 ret = mt76_eeprom_init(&dev->mt76, MT7615_EEPROM_FULL_SIZE); in mt7615_eeprom_load()
84 u16 val = get_unaligned_le16(dev->eeprom.data); in mt7615_check_eeprom()
92 return -EINVAL; in mt7615_check_eeprom()
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