1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ov5670 driver
4 *
5 * Copyright (C) 2019 Fuzhou Rockchip Electronics Co., Ltd.
6 *
7 * V0.0X01.0X01 add poweron function.
8 * V0.0X01.0X02 fix mclk issue when probe multiple camera.
9 * V0.0X01.0X03 add otp function.
10 * V0.0X01.0X04 add enum_frame_interval function.
11 */
12
13 #include <linux/clk.h>
14 #include <linux/device.h>
15 #include <linux/delay.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/i2c.h>
18 #include <linux/module.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/of.h>
21 #include <linux/of_graph.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/sysfs.h>
24 #include <linux/pinctrl/consumer.h>
25 #include <linux/version.h>
26 #include <media/v4l2-async.h>
27 #include <media/media-entity.h>
28 #include <media/v4l2-common.h>
29 #include <media/v4l2-ctrls.h>
30 #include <media/v4l2-device.h>
31 #include <media/v4l2-event.h>
32 #include <media/v4l2-fwnode.h>
33 #include <media/v4l2-image-sizes.h>
34 #include <media/v4l2-mediabus.h>
35 #include <media/v4l2-subdev.h>
36
37 #include <linux/rk-camera-module.h>
38
39 /* verify default register values */
40 #define CHECK_REG_VALUE
41
42 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x04)
43
44 #ifndef V4L2_CID_DIGITAL_GAIN
45 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
46 #endif
47
48 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
49 #define MIPI_FREQ 420000000U
50 #define OV5670_PIXEL_RATE (420000000LL * 2LL * 2LL / 10)
51 #define OV5670_XVCLK_FREQ 24000000
52
53 #define CHIP_ID 0x5670
54 #define OV5670_REG_CHIP_ID 0x300b
55
56 #define OV5670_REG_CTRL_MODE 0x0100
57 #define OV5670_MODE_SW_STANDBY 0x00
58 #define OV5670_MODE_STREAMING 0x01
59
60 #define OV5670_REG_EXPOSURE 0x3500
61 #define OV5670_EXPOSURE_MIN 4
62 #define OV5670_EXPOSURE_STEP 1
63 #define OV5670_VTS_MAX 0x7fff
64
65 #define OV5670_REG_GAIN_H 0x3508
66 #define OV5670_REG_GAIN_L 0x3509
67 #define OV5670_GAIN_L_MASK 0xff
68 #define OV5670_GAIN_H_MASK 0x1f
69 #define OV5670_GAIN_H_SHIFT 8
70 #define ANALOG_GAIN_MIN 0x80
71 #define ANALOG_GAIN_MAX 0x400
72 #define ANALOG_GAIN_STEP 1
73 #define ANALOG_GAIN_DEFAULT 1024
74
75 #define OV5670_REG_GROUP 0x3208
76
77 #define OV5670_REG_TEST_PATTERN 0x4303
78 #define OV5670_TEST_PATTERN_ENABLE 0x08
79 #define OV5670_TEST_PATTERN_DISABLE 0x0
80
81 #define OV5670_REG_VTS 0x380e
82
83 #define REG_NULL 0xFFFF
84 #define DELAY_MS 0xEEEE /* Array delay token */
85
86 #define OV5670_REG_VALUE_08BIT 1
87 #define OV5670_REG_VALUE_16BIT 2
88 #define OV5670_REG_VALUE_24BIT 3
89
90 #define OV5670_LANES 2
91 #define OV5670_BITS_PER_SAMPLE 10
92
93 #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
94 #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
95
96 #define OV5670_NAME "ov5670"
97
98 #define RG_Ratio_Typical_Default (0x16f)
99 #define BG_Ratio_Typical_Default (0x16f)
100
101 #define ov5670_write_1byte(client, reg, val) \
102 ov5670_write_reg((client), (reg), OV5670_REG_VALUE_08BIT, (val))
103
104 #define ov5670_read_1byte(client, reg, val) \
105 ov5670_read_reg((client), (reg), OV5670_REG_VALUE_08BIT, (val))
106
107 struct ov5670_otp_info {
108 int flag; // bit[7]: info, bit[6]:wb
109 int module_id;
110 int lens_id;
111 int year;
112 int month;
113 int day;
114 int rg_ratio;
115 int bg_ratio;
116 };
117
118 static const char * const ov5670_supply_names[] = {
119 "avdd", /* Analog power */
120 "dovdd", /* Digital I/O power */
121 "dvdd", /* Digital core power */
122 };
123
124 #define OV5670_NUM_SUPPLIES ARRAY_SIZE(ov5670_supply_names)
125
126 struct regval {
127 u16 addr;
128 u8 val;
129 };
130
131 struct ov5670_mode {
132 u32 width;
133 u32 height;
134 struct v4l2_fract max_fps;
135 u32 hts_def;
136 u32 vts_def;
137 u32 exp_def;
138 const struct regval *reg_list;
139 };
140
141 struct ov5670 {
142 struct i2c_client *client;
143 struct clk *xvclk;
144 struct gpio_desc *power_gpio;
145 struct gpio_desc *reset_gpio;
146 struct gpio_desc *pwdn_gpio;
147 struct regulator_bulk_data supplies[OV5670_NUM_SUPPLIES];
148
149 struct pinctrl *pinctrl;
150 struct pinctrl_state *pins_default;
151 struct pinctrl_state *pins_sleep;
152
153 struct v4l2_subdev subdev;
154 struct media_pad pad;
155 struct v4l2_ctrl_handler ctrl_handler;
156 struct v4l2_ctrl *exposure;
157 struct v4l2_ctrl *anal_gain;
158 struct v4l2_ctrl *digi_gain;
159 struct v4l2_ctrl *hblank;
160 struct v4l2_ctrl *vblank;
161 struct v4l2_ctrl *test_pattern;
162 struct mutex mutex;
163 bool streaming;
164 bool power_on;
165 const struct ov5670_mode *cur_mode;
166 unsigned int lane_num;
167 unsigned int cfg_num;
168 unsigned int pixel_rate;
169 u32 module_index;
170 struct ov5670_otp_info *otp;
171 const char *module_facing;
172 const char *module_name;
173 const char *len_name;
174 struct rkmodule_awb_cfg awb_cfg;
175 };
176
177 #define to_ov5670(sd) container_of(sd, struct ov5670, subdev)
178
179 struct ov5670_id_name {
180 int id;
181 char name[RKMODULE_NAME_LEN];
182 };
183
184 static const struct ov5670_id_name ov5670_module_info[] = {
185 {0x01, "Sunny"},
186 {0x02, "Truly"},
187 {0x03, "A-kerr"},
188 {0x04, "LiteArray"},
189 {0x05, "Darling"},
190 {0x06, "Qtech"},
191 {0x07, "OFlim"},
192 {0x08, "Huaquan/Kingcom"},
193 {0x09, "Booyi"},
194 {0x0a, "Laimu"},
195 {0x0b, "WDSEN"},
196 {0x0c, "Sunrise"},
197 {0x0d, "CameraKing"},
198 {0x0e, "Sunniness/Riyong"},
199 {0x0f, "Tongju"},
200 {0x10, "Seasons/Sijichun"},
201 {0x11, "Foxconn"},
202 {0x12, "Importek"},
203 {0x13, "Altek"},
204 {0x14, "ABICO/Ability"},
205 {0x15, "Lite-on"},
206 {0x16, "Chicony"},
207 {0x17, "Primax"},
208 {0x18, "AVC"},
209 {0x19, "Suyin"},
210 {0x21, "Sharp"},
211 {0x31, "MCNEX"},
212 {0x32, "SEMCO"},
213 {0x33, "Partron"},
214 {0x41, "Reach/Zhongliancheng"},
215 {0x42, "BYD"},
216 {0x43, "OSTEC(AoShunChuang)"},
217 {0x44, "Chengli"},
218 {0x45, "Jiali"},
219 {0x46, "Chippack"},
220 {0x47, "RongSheng"},
221 {0x48, "ShineTech/ShenTai"},
222 {0x49, "Brodsands"},
223 {0x50, "Others"},
224 {0x00, "Unknown"}
225 };
226
227 static const struct ov5670_id_name ov5670_lens_info[] = {
228 {0x01, "Largan 40010A2"},
229 {0x10, "Largan 30048A1"},
230 {0x11, "Largan 30031A1B"},
231 {0x12, "Largan 40010A1"},
232 {0x30, "Sunny 3531A"},
233 {0x31, "Sunny 3531B"},
234 {0x32, "Sunny 3533A"},
235 {0x90, "Kinko 3956AH"},
236 {0xa0, "E-pin D517"},
237 {0xc0, "XuYe XA-0502B"},
238 {0xc8, "XuYe XA-0502A"},
239 {0xc9, "XuYe E009A"},
240 {0x00, "Unknown"}
241 };
242
243 /*
244 * Xclk 24Mhz
245 * Pclk 84Mhz
246 * linelength 2816(0xb00)
247 * framelength 1984(0x7c0)
248 * grabwindow_width 2592
249 * grabwindow_height 1944
250 * max_framerate 30fps
251 * mipi_datarate per lane 840Mbps
252 */
253 static const struct regval ov5670_global_regs[] = {
254 {0x0103, 0x01}, //software reset
255 {DELAY_MS, 5},
256 {0x0100, 0x00}, //software standby
257 {0x0300, 0x04}, //PLL
258 {0x0301, 0x00},
259 {0x0302, 0x69}, //MIPI bit rate 840Mbps/lane
260 {0x0303, 0x00},
261 {0x0304, 0x03},
262 {0x0305, 0x01},
263 {0x0306, 0x01},
264 {0x030a, 0x00},
265 {0x030b, 0x00},
266 {0x030c, 0x00},
267 {0x030d, 0x1e},
268 {0x030e, 0x00},
269 {0x030f, 0x06},
270 {0x0312, 0x01}, //PLL
271 {0x3000, 0x00}, //Fsin/Vsync input
272 {0x3002, 0x21}, //ULPM output
273 {0x3005, 0xf0}, //sclk_psram on, sclk_syncfifo on
274 {0x3007, 0x00},
275 {0x3015, 0x0f}, //npump clock div = 1, disable Ppumu_clk
276 {0x3018, 0x32}, //MIPI 2 lane
277
278 {0x301a, 0xf0}, //sclk_stb on, sclk_ac on, slck_tc on
279 {0x301b, 0xf0}, //sclk_blc/isp/testmode/vfifo on
280 {0x301c, 0xf0}, //sclk_mipi on, sclk_dpcm on, sclk_otp on
281 {0x301d, 0xf0}, //sclk_asram_tst on, sclk_grp on, sclk_bist on,
282 {0x301e, 0xf0}, //sclk_ilpwm/lvds/vfifo/mipi on
283 {0x3030, 0x00}, //sclk normal, pclk normal
284 {0x3031, 0x0a}, //10-bit mode
285 {0x303c, 0xff}, //reserved
286 {0x303e, 0xff}, //reserved
287 {0x3040, 0xf0}, //sclk_isp_fc_en, sclk_fc-en, sclk_tpm_en, sclk_fmt_en
288 {0x3041, 0x00}, //reserved
289 {0x3042, 0xf0}, //reserved
290 {0x3106, 0x11}, //sclk_div = 1, sclk_pre_div = 1
291 {0x3500, 0x00}, //exposure H
292 {0x3501, 0x3d}, //exposure M
293 {0x3502, 0x00}, //exposure L
294 {0x3503, 0x04}, //gain no delay, use sensor gain
295 {0x3504, 0x03}, //exposure manual, gain manual
296 {0x3505, 0x83}, //sensor gain fixed bit
297 {0x3508, 0x04}, //gain H
298 {0x3509, 0x00}, //gain L
299 {0x350e, 0x04}, //short digital gain H
300 {0x350f, 0x00}, //short digital gain L
301 {0x3510, 0x00}, //short exposure H
302 {0x3511, 0x02}, //short exposure M
303 {0x3512, 0x00}, //short exposure L
304 {0x3601, 0xc8}, //analog control
305 {0x3610, 0x88},
306 {0x3612, 0x48},
307 {0x3614, 0x5b},
308 {0x3615, 0x96},
309 {0x3621, 0xd0},
310 {0x3622, 0x00},
311 {0x3623, 0x00},
312 {0x3633, 0x13},
313 {0x3634, 0x13},
314 {0x3635, 0x13},
315 {0x3636, 0x13},
316 {0x3645, 0x13},
317 {0x3646, 0x82},
318 {0x3650, 0x00},
319 {0x3652, 0xff},
320 {0x3655, 0x20},
321 {0x3656, 0xff},
322 {0x365a, 0xff},
323
324 {0x365e, 0xff},
325 {0x3668, 0x00},
326 {0x366a, 0x07},
327 {0x366e, 0x08},
328 {0x366d, 0x00},
329 {0x366f, 0x80}, //analog control
330 {0x3700, 0x28}, //sensor control
331 {0x3701, 0x10},
332 {0x3702, 0x3a},
333 {0x3703, 0x19},
334 {0x3704, 0x10},
335 {0x3705, 0x00},
336 {0x3706, 0x66},
337 {0x3707, 0x08},
338 {0x3708, 0x34},
339 {0x3709, 0x40},
340 {0x370a, 0x01},
341 {0x370b, 0x1b},
342 {0x3714, 0x24},
343 {0x371a, 0x3e},
344 {0x3733, 0x00},
345 {0x3734, 0x00},
346 {0x373a, 0x05},
347 {0x373b, 0x06},
348 {0x373c, 0x0a},
349 {0x373f, 0xa0},
350 {0x3755, 0x00},
351 {0x3758, 0x00},
352 {0x375b, 0x0e},
353 {0x3766, 0x5f},
354 {0x3768, 0x00},
355 {0x3769, 0x22},
356 {0x3773, 0x08},
357 {0x3774, 0x1f},
358 {0x3776, 0x06},
359 {0x37a0, 0x88},
360 {0x37a1, 0x5c},
361 {0x37a7, 0x88},
362 {0x37a8, 0x70},
363 {0x37aa, 0x88},
364 {0x37ab, 0x48},
365 {0x37b3, 0x66},
366 {0x37c2, 0x04},
367 {0x37c5, 0x00},
368 {0x37c8, 0x00}, //sensor control
369
370 {0x3800, 0x00}, //x addr start H
371 {0x3801, 0x0c}, //x addr start L
372 {0x3802, 0x00}, //y addr start H
373 {0x3803, 0x04}, //y addr start L
374 {0x3804, 0x0a}, //x addr end H
375 {0x3805, 0x33}, //x addr end L
376 {0x3806, 0x07}, //y addr end H
377 {0x3807, 0xa3}, //y addr end L
378 {0x3808, 0x05}, //x output size H
379 {0x3809, 0x10}, //x output size L
380 {0x380a, 0x03}, //y output size H
381 {0x380b, 0xc0}, //y output size L
382 {0x380c, 0x06}, //HTS H
383 {0x380d, 0x90}, //HTS L
384 {0x380e, 0x03}, //VTS H
385 {0x380f, 0xfc}, //VTS L
386 {0x3811, 0x04}, //ISP x win L
387 {0x3813, 0x02}, //ISP y win L
388 {0x3814, 0x03}, //x inc odd
389 {0x3815, 0x01}, //x inc even
390 {0x3816, 0x00}, //vsync start H
391 {0x3817, 0x00}, //vsync star L
392 {0x3818, 0x00}, //vsync end H
393 {0x3819, 0x00}, //vsync end L
394 {0x3820, 0x90}, //vsyn48_blc on, vflip off
395 {0x3821, 0x47}, //hsync_en_o, mirror on, dig_bin on
396 {0x3822, 0x48}, //addr0_num[3:1]=0x02, ablc_num[5:1]=0x08
397 {0x3826, 0x00}, //r_rst_fsin H
398 {0x3827, 0x08}, //r_rst_fsin L
399 {0x382a, 0x03}, //y inc odd
400 {0x382b, 0x01}, //y inc even
401 {0x3830, 0x08},
402 {0x3836, 0x02},
403 {0x3837, 0x00},
404 {0x3838, 0x10},
405 {0x3841, 0xff},
406 {0x3846, 0x48},
407 {0x3861, 0x00},
408 {0x3862, 0x04},
409 {0x3863, 0x06},
410 {0x3a11, 0x01},
411 {0x3a12, 0x78},
412 {0x3b00, 0x00}, //strobe
413 {0x3b02, 0x00},
414 {0x3b03, 0x00},
415
416 {0x3b04, 0x00},
417 {0x3b05, 0x00}, //strobe
418 {0x3c00, 0x89},
419 {0x3c01, 0xab},
420 {0x3c02, 0x01},
421 {0x3c03, 0x00},
422 {0x3c04, 0x00},
423 {0x3c05, 0x03},
424 {0x3c06, 0x00},
425 {0x3c07, 0x05},
426 {0x3c0c, 0x00},
427 {0x3c0d, 0x00},
428 {0x3c0e, 0x00},
429 {0x3c0f, 0x00},
430 {0x3c40, 0x00},
431 {0x3c41, 0xa3},
432 {0x3c43, 0x7d},
433 {0x3c45, 0xd7},
434 {0x3c47, 0xfc},
435 {0x3c50, 0x05},
436 {0x3c52, 0xaa},
437 {0x3c54, 0x71},
438 {0x3c56, 0x80},
439 {0x3d85, 0x17},
440 {0x3f03, 0x00}, //PSRAM
441 {0x3f0a, 0x00},
442 {0x3f0b, 0x00}, //PSRAM
443 {0x4001, 0x60}, //BLC, K enable
444 {0x4009, 0x05}, //BLC, black line end line
445 {0x4020, 0x00}, //BLC, offset compensation th000
446 {0x4021, 0x00}, //BLC, offset compensation K000
447 {0x4022, 0x00},
448 {0x4023, 0x00},
449 {0x4024, 0x00},
450 {0x4025, 0x00},
451 {0x4026, 0x00},
452 {0x4027, 0x00},
453 {0x4028, 0x00},
454 {0x4029, 0x00},
455 {0x402a, 0x00},
456 {0x402b, 0x00},
457 {0x402c, 0x00},
458 {0x402d, 0x00},
459 {0x402e, 0x00},
460 {0x402f, 0x00},
461
462 {0x4040, 0x00},
463 {0x4041, 0x03},
464 {0x4042, 0x00},
465 {0x4043, 0x7A}, //1/1.05 x (0x80)
466 {0x4044, 0x00},
467 {0x4045, 0x7A},
468 {0x4046, 0x00},
469 {0x4047, 0x7A},
470 {0x4048, 0x00}, //BLC, kcoef_r_man H
471 {0x4049, 0x7A}, //BLC, kcoef_r_man L
472 {0x4303, 0x00},
473 {0x4307, 0x30},
474 {0x4500, 0x58},
475 {0x4501, 0x04},
476 {0x4502, 0x48},
477 {0x4503, 0x10},
478 {0x4508, 0x55},
479 {0x4509, 0x55},
480 {0x450a, 0x00},
481 {0x450b, 0x00},
482 {0x4600, 0x00},
483 {0x4601, 0x81},
484 {0x4700, 0xa4},
485 {0x4800, 0x4c}, //MIPI control
486 {0x4816, 0x53}, //emb_dt
487 {0x481f, 0x40}, //clock_prepare_min
488 {0x4837, 0x13}, //MIPI global timing
489 {0x5000, 0x56}, //dcblc_en, awb_gain_en, bc_en, wc_en
490 {0x5001, 0x01}, //blc_en
491 {0x5002, 0x28}, //otp_dpc_en
492 {0x5004, 0x0c}, //ISP size auto control enable
493 {0x5006, 0x0c},
494 {0x5007, 0xe0},
495 {0x5008, 0x01},
496 {0x5009, 0xb0},
497 {0x5901, 0x00}, //VAP
498 {0x5a01, 0x00}, //WINC x start offset H
499 {0x5a03, 0x00}, //WINC x start offset L
500 {0x5a04, 0x0c}, //WINC y start offset H
501 {0x5a05, 0xe0}, //WINC y start offset L
502 {0x5a06, 0x09}, //WINC window width H
503 {0x5a07, 0xb0}, //WINC window width L
504 {0x5a08, 0x06}, //WINC window height H
505 {0x5e00, 0x00}, //WINC window height L
506 {0x3734, 0x40}, //Improve HFPN
507
508 {0x5b00, 0x01}, //[2:0] otp start addr[10:8]
509 {0x5b01, 0x10}, //[7:0] otp start addr[7:0]
510 {0x5b02, 0x01}, //[2:0] otp end addr[10:8]
511 {0x5b03, 0xdb}, //[7:0] otp end addr[7:0]
512 {0x3d8c, 0x71}, //Header address high byte
513 {0x3d8d, 0xea}, //Header address low byte
514 {0x4017, 0x10}, //threshold = 4LSB for Binning sum format.
515 {0x3618, 0x2a},
516 {0x5780, 0x3e},
517 {0x5781, 0x0f},
518 {0x5782, 0x44},
519 {0x5783, 0x02},
520 {0x5784, 0x01},
521 {0x5785, 0x01},
522 {0x5786, 0x00},
523 {0x5787, 0x04},
524 {0x5788, 0x02},
525 {0x5789, 0x0f},
526 {0x578a, 0xfd},
527 {0x578b, 0xf5},
528 {0x578c, 0xf5},
529 {0x578d, 0x03},
530 {0x578e, 0x08},
531 {0x578f, 0x0c},
532 {0x5790, 0x08},
533 {0x5791, 0x06},
534 {0x5792, 0x00},
535 {0x5793, 0x52},
536 {0x5794, 0xa3},
537 {0x3503, 0x30}, //exposure gain/exposure delay not used
538 {0x3002, 0x61}, //[6]ULPM output enable
539 {0x3010, 0x40}, //[6]enable ULPM as GPIO controlled by register
540 {0x300d, 0x00}, //[6]ULPM output low (if 1=> high)
541 {0x5045, 0x05}, //[2] enable MWB manual bias
542 {0x5048, 0x10}, //MWB manual bias be the same with 0x4003 BLC target.
543 //{0x0100, 0x01},
544 {REG_NULL, 0x00},
545 };
546
547 /*
548 * Xclk 24Mhz
549 * Pclk 210Mhz
550 * linelength 3360(0xd20
551 * framelength 2038(0x7f6)
552 * grabwindow_width 2592
553 * grabwindow_height 1944
554 * max_framerate 30fps
555 * mipi_datarate per lane 840Mbps
556 */
557 static const struct regval ov5670_2592x1944_regs_2lane[] = {
558 // 2592x1944 30fps 2 lane MIPI 840Mbps/lane
559 {0x0100, 0x00},
560 {0x3501, 0x7b}, //exposure M
561 {0x3623, 0x00}, //analog control
562 {0x366e, 0x10}, //analog control
563 {0x370b, 0x1b}, //sensor control
564 {0x3808, 0x0a}, //x output size H
565 {0x3809, 0x20}, //x output size L
566 {0x380a, 0x07}, //y output size H
567 {0x380b, 0x98}, //y output size L
568 {0x380c, 0x06}, //HTS H
569 {0x380d, 0x90}, //HTS L
570 {0x380e, 0x07}, //VTS H
571 {0x380f, 0xf6}, //VTS L
572 {0x3814, 0x01}, //x inc odd
573 {0x3820, 0x80}, //vsyn48_blc on, vflip off
574 {0x3821, 0x46}, //hsync_en_o, mirror on, dig_bin on
575 {0x382a, 0x01}, //y inc odd
576 {0x4009, 0x0d}, //BLC, black line end line
577 {0x4502, 0x40},
578 {0x4508, 0xaa},
579 {0x4509, 0xaa},
580 {0x450a, 0x00},
581 {0x4600, 0x01},
582 {0x4601, 0x03},
583 {0x4017, 0x08}, //BLC, offset trigger threshold
584 //{0x0100, 0x01},
585
586 {REG_NULL, 0x00},
587 };
588
589 /*
590 * Xclk 24Mhz
591 * Pclk 210Mhz
592 * linelength 3360(0xd20
593 * framelength 2038(0x7f6)
594 * grabwindow_width 1296
595 * grabwindow_height 960
596 * max_framerate 30fps
597 * mipi_datarate per lane 840Mbps
598 */
599 static const struct regval ov5670_1296x960_regs_2lane[] = {
600 // 1296x960 30fps 2 lane MIPI 840Mbps/lane
601 {0x0100, 0x00},
602 {0x3501, 0x3d}, //exposure M
603 {0x3623, 0x00}, //analog control
604 {0x366e, 0x08}, //analog control
605 {0x370b, 0x1b}, //sensor control
606 {0x3808, 0x05}, //x output size H
607 {0x3809, 0x10}, //x output size L
608 {0x380a, 0x03}, //y output size H
609 {0x380b, 0xc0}, //y output size L
610 {0x380c, 0x06}, //HTS H
611 {0x380d, 0x90}, //HTS L
612 {0x380e, 0x07}, //VTS H
613 {0x380f, 0xf6}, //VTS L
614 {0x3814, 0x03}, //x inc odd
615 {0x3820, 0x90}, //vsyn48_blc on, vflip off
616 {0x3821, 0x47}, //hsync_en_o, mirror on, dig_bin on
617 {0x382a, 0x03}, //y inc odd
618 {0x4009, 0x05}, //BLC, black line end line
619 {0x4502, 0x48},
620 {0x4508, 0x55},
621 {0x4509, 0x55},
622 {0x450a, 0x00},
623 {0x4600, 0x00},
624 {0x4601, 0x81},
625 {0x4017, 0x10}, //BLC, offset trigger threshold
626 //{0x0100, 0x01},
627
628 {REG_NULL, 0x00}
629 };
630
631 static const struct ov5670_mode supported_modes_2lane[] = {
632 {
633 .width = 2592,
634 .height = 1944,
635 .max_fps = {
636 .numerator = 10000,
637 .denominator = 300000,
638 },
639 .exp_def = 0x07d0,
640 .hts_def = 0x0d20,
641 .vts_def = 0x07f6,
642 .reg_list = ov5670_2592x1944_regs_2lane,
643 },
644 {
645 .width = 1296,
646 .height = 960,
647 .max_fps = {
648 .numerator = 10000,
649 .denominator = 300000,
650 },
651 .exp_def = 0x03d0,
652 .hts_def = 0x0d20,
653 .vts_def = 0x07f6,
654 .reg_list = ov5670_1296x960_regs_2lane,
655 },
656 };
657
658 static const struct ov5670_mode *supported_modes;
659
660 static const s64 link_freq_menu_items[] = {
661 MIPI_FREQ
662 };
663
664 static const char * const ov5670_test_pattern_menu[] = {
665 "Disabled",
666 "Vertical Color Bar Type 1",
667 };
668
669 /* Write registers up to 4 at a time */
ov5670_write_reg(struct i2c_client * client,u16 reg,u32 len,u32 val)670 static int ov5670_write_reg(struct i2c_client *client, u16 reg,
671 u32 len, u32 val)
672 {
673 u32 buf_i, val_i;
674 u8 buf[6];
675 u8 *val_p;
676 __be32 val_be;
677
678 dev_dbg(&client->dev, "%s(%d) enter!\n", __func__, __LINE__);
679 dev_dbg(&client->dev, "write reg(0x%x val:0x%x)!\n", reg, val);
680
681 if (len > 4)
682 return -EINVAL;
683
684 buf[0] = reg >> 8;
685 buf[1] = reg & 0xff;
686
687 val_be = cpu_to_be32(val);
688 val_p = (u8 *)&val_be;
689 buf_i = 2;
690 val_i = 4 - len;
691
692 while (val_i < 4)
693 buf[buf_i++] = val_p[val_i++];
694
695 if (i2c_master_send(client, buf, len + 2) != len + 2) {
696 dev_err(&client->dev,
697 "write reg(0x%x val:0x%x)failed !\n", reg, val);
698 return -EIO;
699 }
700 return 0;
701 }
702
ov5670_write_array(struct i2c_client * client,const struct regval * regs)703 static int ov5670_write_array(struct i2c_client *client,
704 const struct regval *regs)
705 {
706 int i, delay_ms, ret = 0;
707
708 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++) {
709 if (regs[i].addr == DELAY_MS) {
710 delay_ms = regs[i].val;
711 dev_info(&client->dev, "delay(%d) ms !\n", delay_ms);
712 usleep_range(1000 * delay_ms, 1000 * delay_ms + 100);
713 continue;
714 }
715 ret = ov5670_write_reg(client, regs[i].addr,
716 OV5670_REG_VALUE_08BIT, regs[i].val);
717 if (ret)
718 dev_err(&client->dev, "%s failed !\n", __func__);
719 }
720 return ret;
721 }
722
723 /* Read registers up to 4 at a time */
ov5670_read_reg(struct i2c_client * client,u16 reg,unsigned int len,u32 * val)724 static int ov5670_read_reg(struct i2c_client *client, u16 reg,
725 unsigned int len, u32 *val)
726 {
727 struct i2c_msg msgs[2];
728 u8 *data_be_p;
729 __be32 data_be = 0;
730 __be16 reg_addr_be = cpu_to_be16(reg);
731 int ret;
732
733 if (len > 4 || !len)
734 return -EINVAL;
735
736 data_be_p = (u8 *)&data_be;
737 /* Write register address */
738 msgs[0].addr = client->addr;
739 msgs[0].flags = 0;
740 msgs[0].len = 2;
741 msgs[0].buf = (u8 *)®_addr_be;
742
743 /* Read data from register */
744 msgs[1].addr = client->addr;
745 msgs[1].flags = I2C_M_RD;
746 msgs[1].len = len;
747 msgs[1].buf = &data_be_p[4 - len];
748
749 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
750 if (ret != ARRAY_SIZE(msgs))
751 return -EIO;
752
753 *val = be32_to_cpu(data_be);
754
755 return 0;
756 }
757
758 /* Check Register value */
759 #ifdef CHECK_REG_VALUE
ov5670_reg_verify(struct i2c_client * client,const struct regval * regs)760 static int ov5670_reg_verify(struct i2c_client *client,
761 const struct regval *regs)
762 {
763 u32 i;
764 int ret = 0;
765 u32 value;
766
767 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++) {
768 ret = ov5670_read_reg(client, regs[i].addr,
769 OV5670_REG_VALUE_08BIT, &value);
770 if (value != regs[i].val) {
771 dev_info(&client->dev, "%s: 0x%04x is 0x%x instead of 0x%x\n",
772 __func__, regs[i].addr, value, regs[i].val);
773 }
774 }
775 return ret;
776 }
777 #endif
778
ov5670_get_reso_dist(const struct ov5670_mode * mode,struct v4l2_mbus_framefmt * framefmt)779 static int ov5670_get_reso_dist(const struct ov5670_mode *mode,
780 struct v4l2_mbus_framefmt *framefmt)
781 {
782 return abs(mode->width - framefmt->width) +
783 abs(mode->height - framefmt->height);
784 }
785
786 static const struct ov5670_mode *
ov5670_find_best_fit(struct ov5670 * ov5670,struct v4l2_subdev_format * fmt)787 ov5670_find_best_fit(struct ov5670 *ov5670,
788 struct v4l2_subdev_format *fmt)
789 {
790 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
791 int dist;
792 int cur_best_fit = 0;
793 int cur_best_fit_dist = -1;
794 unsigned int i;
795
796 for (i = 0; i < ov5670->cfg_num; i++) {
797 dist = ov5670_get_reso_dist(&supported_modes[i], framefmt);
798 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
799 cur_best_fit_dist = dist;
800 cur_best_fit = i;
801 }
802 }
803
804 return &supported_modes[cur_best_fit];
805 }
806
ov5670_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)807 static int ov5670_set_fmt(struct v4l2_subdev *sd,
808 struct v4l2_subdev_pad_config *cfg,
809 struct v4l2_subdev_format *fmt)
810 {
811 struct ov5670 *ov5670 = to_ov5670(sd);
812 const struct ov5670_mode *mode;
813 s64 h_blank, vblank_def;
814
815 mutex_lock(&ov5670->mutex);
816
817 mode = ov5670_find_best_fit(ov5670, fmt);
818 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
819 fmt->format.width = mode->width;
820 fmt->format.height = mode->height;
821 fmt->format.field = V4L2_FIELD_NONE;
822 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
823 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
824 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
825 #else
826 mutex_unlock(&ov5670->mutex);
827 return -ENOTTY;
828 #endif
829 } else {
830 ov5670->cur_mode = mode;
831 h_blank = mode->hts_def - mode->width;
832 __v4l2_ctrl_modify_range(ov5670->hblank, h_blank,
833 h_blank, 1, h_blank);
834 vblank_def = mode->vts_def - mode->height;
835 __v4l2_ctrl_modify_range(ov5670->vblank, vblank_def,
836 OV5670_VTS_MAX - mode->height,
837 1, vblank_def);
838 }
839
840 mutex_unlock(&ov5670->mutex);
841
842 return 0;
843 }
844
ov5670_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)845 static int ov5670_get_fmt(struct v4l2_subdev *sd,
846 struct v4l2_subdev_pad_config *cfg,
847 struct v4l2_subdev_format *fmt)
848 {
849 struct ov5670 *ov5670 = to_ov5670(sd);
850 const struct ov5670_mode *mode = ov5670->cur_mode;
851
852 mutex_lock(&ov5670->mutex);
853 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
854 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
855 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
856 #else
857 mutex_unlock(&ov5670->mutex);
858 return -ENOTTY;
859 #endif
860 } else {
861 fmt->format.width = mode->width;
862 fmt->format.height = mode->height;
863 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
864 fmt->format.field = V4L2_FIELD_NONE;
865 }
866 mutex_unlock(&ov5670->mutex);
867
868 return 0;
869 }
870
ov5670_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)871 static int ov5670_enum_mbus_code(struct v4l2_subdev *sd,
872 struct v4l2_subdev_pad_config *cfg,
873 struct v4l2_subdev_mbus_code_enum *code)
874 {
875 if (code->index != 0)
876 return -EINVAL;
877 code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
878
879 return 0;
880 }
881
ov5670_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)882 static int ov5670_enum_frame_sizes(struct v4l2_subdev *sd,
883 struct v4l2_subdev_pad_config *cfg,
884 struct v4l2_subdev_frame_size_enum *fse)
885 {
886 struct ov5670 *ov5670 = to_ov5670(sd);
887
888 if (fse->index >= ov5670->cfg_num)
889 return -EINVAL;
890
891 if (fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
892 return -EINVAL;
893
894 fse->min_width = supported_modes[fse->index].width;
895 fse->max_width = supported_modes[fse->index].width;
896 fse->max_height = supported_modes[fse->index].height;
897 fse->min_height = supported_modes[fse->index].height;
898
899 return 0;
900 }
901
ov5670_enable_test_pattern(struct ov5670 * ov5670,u32 pattern)902 static int ov5670_enable_test_pattern(struct ov5670 *ov5670, u32 pattern)
903 {
904 u32 val;
905
906 if (pattern)
907 val = (pattern - 1) | OV5670_TEST_PATTERN_ENABLE;
908 else
909 val = OV5670_TEST_PATTERN_DISABLE;
910
911 return ov5670_write_reg(ov5670->client, OV5670_REG_TEST_PATTERN,
912 OV5670_REG_VALUE_08BIT, val);
913 }
914
ov5670_get_otp(struct ov5670_otp_info * otp,struct rkmodule_inf * inf)915 static void ov5670_get_otp(struct ov5670_otp_info *otp,
916 struct rkmodule_inf *inf)
917 {
918 u32 i;
919 int rg, bg;
920
921 /* fac */
922 if (otp->flag & 0x80) {
923 inf->fac.flag = 1;
924 inf->fac.year = otp->year;
925 inf->fac.month = otp->month;
926 inf->fac.day = otp->day;
927
928 for (i = 0; i < ARRAY_SIZE(ov5670_module_info) - 1; i++) {
929 if (ov5670_module_info[i].id == otp->module_id)
930 break;
931 }
932 strscpy(inf->fac.module, ov5670_module_info[i].name,
933 sizeof(inf->fac.module));
934
935 for (i = 0; i < ARRAY_SIZE(ov5670_lens_info) - 1; i++) {
936 if (ov5670_lens_info[i].id == otp->lens_id)
937 break;
938 }
939 strscpy(inf->fac.lens, ov5670_lens_info[i].name,
940 sizeof(inf->fac.lens));
941 }
942
943 /* awb */
944 if (otp->flag & 0x40) {
945 rg = otp->rg_ratio;
946 bg = otp->bg_ratio;
947
948 inf->awb.flag = 1;
949 inf->awb.r_value = rg;
950 inf->awb.b_value = bg;
951 inf->awb.gr_value = 0x200;
952 inf->awb.gb_value = 0x200;
953
954 inf->awb.golden_r_value = 0;
955 inf->awb.golden_b_value = 0;
956 inf->awb.golden_gr_value = 0;
957 inf->awb.golden_gb_value = 0;
958 }
959 }
960
ov5670_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)961 static int ov5670_g_frame_interval(struct v4l2_subdev *sd,
962 struct v4l2_subdev_frame_interval *fi)
963 {
964 struct ov5670 *ov5670 = to_ov5670(sd);
965 const struct ov5670_mode *mode = ov5670->cur_mode;
966
967 mutex_lock(&ov5670->mutex);
968 fi->interval = mode->max_fps;
969 mutex_unlock(&ov5670->mutex);
970
971 return 0;
972 }
973
ov5670_get_module_inf(struct ov5670 * ov5670,struct rkmodule_inf * inf)974 static void ov5670_get_module_inf(struct ov5670 *ov5670,
975 struct rkmodule_inf *inf)
976 {
977 struct ov5670_otp_info *otp = ov5670->otp;
978
979 memset(inf, 0, sizeof(*inf));
980 strscpy(inf->base.sensor, OV5670_NAME, sizeof(inf->base.sensor));
981 strscpy(inf->base.module, ov5670->module_name,
982 sizeof(inf->base.module));
983 strscpy(inf->base.lens, ov5670->len_name, sizeof(inf->base.lens));
984 if (otp)
985 ov5670_get_otp(otp, inf);
986 }
987
ov5670_set_awb_cfg(struct ov5670 * ov5670,struct rkmodule_awb_cfg * cfg)988 static void ov5670_set_awb_cfg(struct ov5670 *ov5670,
989 struct rkmodule_awb_cfg *cfg)
990 {
991 mutex_lock(&ov5670->mutex);
992 memcpy(&ov5670->awb_cfg, cfg, sizeof(*cfg));
993 mutex_unlock(&ov5670->mutex);
994 }
995
ov5670_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)996 static long ov5670_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
997 {
998 struct ov5670 *ov5670 = to_ov5670(sd);
999 long ret = 0;
1000
1001 switch (cmd) {
1002 case RKMODULE_GET_MODULE_INFO:
1003 ov5670_get_module_inf(ov5670, (struct rkmodule_inf *)arg);
1004 break;
1005 case RKMODULE_AWB_CFG:
1006 ov5670_set_awb_cfg(ov5670, (struct rkmodule_awb_cfg *)arg);
1007 break;
1008 default:
1009 ret = -ENOIOCTLCMD;
1010 break;
1011 }
1012
1013 return ret;
1014 }
1015
1016 #ifdef CONFIG_COMPAT
ov5670_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)1017 static long ov5670_compat_ioctl32(struct v4l2_subdev *sd,
1018 unsigned int cmd, unsigned long arg)
1019 {
1020 void __user *up = compat_ptr(arg);
1021 struct rkmodule_inf *inf;
1022 struct rkmodule_awb_cfg *awb_cfg;
1023 long ret;
1024
1025 switch (cmd) {
1026 case RKMODULE_GET_MODULE_INFO:
1027 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
1028 if (!inf) {
1029 ret = -ENOMEM;
1030 return ret;
1031 }
1032
1033 ret = ov5670_ioctl(sd, cmd, inf);
1034 if (!ret) {
1035 if (copy_to_user(up, inf, sizeof(*inf)))
1036 return -EFAULT;
1037 }
1038 kfree(inf);
1039 break;
1040 case RKMODULE_AWB_CFG:
1041 awb_cfg = kzalloc(sizeof(*awb_cfg), GFP_KERNEL);
1042 if (!awb_cfg) {
1043 ret = -ENOMEM;
1044 return ret;
1045 }
1046
1047 if (copy_from_user(awb_cfg, up, sizeof(*awb_cfg)))
1048 return -EFAULT;
1049
1050 ret = ov5670_ioctl(sd, cmd, awb_cfg);
1051 kfree(awb_cfg);
1052 break;
1053 default:
1054 ret = -ENOIOCTLCMD;
1055 break;
1056 }
1057
1058 return ret;
1059 }
1060 #endif
1061
1062 /*--------------------------------------------------------------------------*/
ov5670_apply_otp(struct ov5670 * ov5670)1063 static int ov5670_apply_otp(struct ov5670 *ov5670)
1064 {
1065 int rg, bg, R_gain, G_gain, B_gain, base_gain;
1066 struct i2c_client *client = ov5670->client;
1067 struct ov5670_otp_info *otp_ptr = ov5670->otp;
1068 struct rkmodule_awb_cfg *awb_cfg = &ov5670->awb_cfg;
1069 u32 golden_bg_ratio = 0;
1070 u32 golden_rg_ratio = 0;
1071 u32 golden_g_value = 0;
1072
1073 if (awb_cfg->enable) {
1074 golden_g_value = (awb_cfg->golden_gb_value +
1075 awb_cfg->golden_gr_value) / 2;
1076 if (golden_g_value != 0) {
1077 golden_rg_ratio = awb_cfg->golden_r_value * 0x200
1078 / golden_g_value;
1079 golden_bg_ratio = awb_cfg->golden_b_value * 0x200
1080 / golden_g_value;
1081 } else {
1082 golden_rg_ratio = RG_Ratio_Typical_Default;
1083 golden_bg_ratio = BG_Ratio_Typical_Default;
1084 }
1085 }
1086
1087 /* apply OTP WB Calibration */
1088 if (otp_ptr->flag & 0x40) {
1089 rg = otp_ptr->rg_ratio;
1090 bg = otp_ptr->bg_ratio;
1091
1092 /* calculate G gain */
1093 R_gain = (golden_rg_ratio * 1000) / rg;
1094 B_gain = (golden_bg_ratio * 1000) / bg;
1095 G_gain = 1000;
1096 if (R_gain < 1000 || B_gain < 1000) {
1097 if (R_gain < B_gain)
1098 base_gain = R_gain;
1099 else
1100 base_gain = B_gain;
1101 } else {
1102 base_gain = G_gain;
1103 }
1104 R_gain = 0x400 * R_gain / (base_gain);
1105 B_gain = 0x400 * B_gain / (base_gain);
1106 G_gain = 0x400 * G_gain / (base_gain);
1107
1108 /* update sensor WB gain */
1109 if (R_gain > 0x400) {
1110 ov5670_write_1byte(client, 0x5032, R_gain >> 8);
1111 ov5670_write_1byte(client, 0x5033, R_gain & 0x00ff);
1112 }
1113 if (G_gain > 0x400) {
1114 ov5670_write_1byte(client, 0x5034, G_gain >> 8);
1115 ov5670_write_1byte(client, 0x5035, G_gain & 0x00ff);
1116 }
1117 if (B_gain > 0x400) {
1118 ov5670_write_1byte(client, 0x5036, B_gain >> 8);
1119 ov5670_write_1byte(client, 0x5037, B_gain & 0x00ff);
1120 }
1121
1122 dev_info(&client->dev, "apply awb gain: 0x%x, 0x%x, 0x%x\n",
1123 R_gain, G_gain, B_gain);
1124 }
1125 return 0;
1126 }
1127
__ov5670_start_stream(struct ov5670 * ov5670)1128 static int __ov5670_start_stream(struct ov5670 *ov5670)
1129 {
1130 int ret;
1131
1132 ret = ov5670_write_array(ov5670->client, ov5670->cur_mode->reg_list);
1133 if (ret)
1134 return ret;
1135
1136 #ifdef CHECK_REG_VALUE
1137 usleep_range(10000, 20000);
1138 /* verify default values to make sure everything has */
1139 /* been written correctly as expected */
1140 dev_info(&ov5670->client->dev, "%s:Check register value!\n",
1141 __func__);
1142 ret = ov5670_reg_verify(ov5670->client, ov5670_global_regs);
1143 if (ret)
1144 return ret;
1145
1146 ret = ov5670_reg_verify(ov5670->client, ov5670->cur_mode->reg_list);
1147 if (ret)
1148 return ret;
1149 #endif
1150
1151 /* In case these controls are set before streaming */
1152 mutex_unlock(&ov5670->mutex);
1153 ret = v4l2_ctrl_handler_setup(&ov5670->ctrl_handler);
1154 mutex_lock(&ov5670->mutex);
1155 if (ret)
1156 return ret;
1157
1158 if (ov5670->otp)
1159 ret = ov5670_apply_otp(ov5670);
1160
1161 if (ret)
1162 dev_info(&ov5670->client->dev, "APPly otp failed!\n");
1163
1164 ret = ov5670_write_reg(ov5670->client, OV5670_REG_CTRL_MODE,
1165 OV5670_REG_VALUE_08BIT, OV5670_MODE_STREAMING);
1166 return ret;
1167 }
1168
__ov5670_stop_stream(struct ov5670 * ov5670)1169 static int __ov5670_stop_stream(struct ov5670 *ov5670)
1170 {
1171 return ov5670_write_reg(ov5670->client, OV5670_REG_CTRL_MODE,
1172 OV5670_REG_VALUE_08BIT, OV5670_MODE_SW_STANDBY);
1173 }
1174
ov5670_s_stream(struct v4l2_subdev * sd,int on)1175 static int ov5670_s_stream(struct v4l2_subdev *sd, int on)
1176 {
1177 struct ov5670 *ov5670 = to_ov5670(sd);
1178 struct i2c_client *client = ov5670->client;
1179 int ret = 0;
1180
1181 dev_info(&client->dev, "%s: on: %d, %dx%d@%d\n", __func__, on,
1182 ov5670->cur_mode->width,
1183 ov5670->cur_mode->height,
1184 DIV_ROUND_CLOSEST(ov5670->cur_mode->max_fps.denominator,
1185 ov5670->cur_mode->max_fps.numerator));
1186
1187 mutex_lock(&ov5670->mutex);
1188 on = !!on;
1189 if (on == ov5670->streaming)
1190 goto unlock_and_return;
1191
1192 if (on) {
1193 dev_info(&client->dev, "stream on!!!\n");
1194 ret = pm_runtime_get_sync(&client->dev);
1195 if (ret < 0) {
1196 pm_runtime_put_noidle(&client->dev);
1197 goto unlock_and_return;
1198 }
1199
1200 ret = __ov5670_start_stream(ov5670);
1201 if (ret) {
1202 v4l2_err(sd, "start stream failed while write regs\n");
1203 pm_runtime_put(&client->dev);
1204 goto unlock_and_return;
1205 }
1206 } else {
1207 dev_info(&client->dev, "stream off!!!\n");
1208 __ov5670_stop_stream(ov5670);
1209 pm_runtime_put(&client->dev);
1210 }
1211
1212 ov5670->streaming = on;
1213
1214 unlock_and_return:
1215 mutex_unlock(&ov5670->mutex);
1216
1217 return ret;
1218 }
1219
ov5670_s_power(struct v4l2_subdev * sd,int on)1220 static int ov5670_s_power(struct v4l2_subdev *sd, int on)
1221 {
1222 struct ov5670 *ov5670 = to_ov5670(sd);
1223 struct i2c_client *client = ov5670->client;
1224 int ret = 0;
1225
1226 dev_info(&client->dev, "%s(%d) on(%d)\n", __func__, __LINE__, on);
1227 mutex_lock(&ov5670->mutex);
1228
1229 /* If the power state is not modified - no work to do. */
1230 if (ov5670->power_on == !!on)
1231 goto unlock_and_return;
1232
1233 if (on) {
1234 ret = pm_runtime_get_sync(&client->dev);
1235 if (ret < 0) {
1236 pm_runtime_put_noidle(&client->dev);
1237 goto unlock_and_return;
1238 }
1239
1240 ret = ov5670_write_array(ov5670->client, ov5670_global_regs);
1241 if (ret) {
1242 v4l2_err(sd, "could not set init registers\n");
1243 pm_runtime_put_noidle(&client->dev);
1244 goto unlock_and_return;
1245 }
1246
1247 ov5670->power_on = true;
1248 /* export gpio */
1249 if (!IS_ERR(ov5670->reset_gpio))
1250 gpiod_export(ov5670->reset_gpio, false);
1251 if (!IS_ERR(ov5670->pwdn_gpio))
1252 gpiod_export(ov5670->pwdn_gpio, false);
1253 } else {
1254 pm_runtime_put(&client->dev);
1255 ov5670->power_on = false;
1256 }
1257
1258 unlock_and_return:
1259 mutex_unlock(&ov5670->mutex);
1260
1261 return ret;
1262 }
1263
1264 /* Calculate the delay in us by clock rate and clock cycles */
ov5670_cal_delay(u32 cycles)1265 static inline u32 ov5670_cal_delay(u32 cycles)
1266 {
1267 return DIV_ROUND_UP(cycles, OV5670_XVCLK_FREQ / 1000 / 1000);
1268 }
1269
__ov5670_power_on(struct ov5670 * ov5670)1270 static int __ov5670_power_on(struct ov5670 *ov5670)
1271 {
1272 int ret;
1273 u32 delay_us;
1274 struct device *dev = &ov5670->client->dev;
1275
1276 if (!IS_ERR(ov5670->power_gpio))
1277 gpiod_set_value_cansleep(ov5670->power_gpio, 1);
1278
1279 usleep_range(1000, 2000);
1280
1281 if (!IS_ERR_OR_NULL(ov5670->pins_default)) {
1282 ret = pinctrl_select_state(ov5670->pinctrl,
1283 ov5670->pins_default);
1284 if (ret < 0)
1285 dev_err(dev, "could not set pins\n");
1286 }
1287 ret = clk_set_rate(ov5670->xvclk, OV5670_XVCLK_FREQ);
1288 if (ret < 0)
1289 dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
1290 if (clk_get_rate(ov5670->xvclk) != OV5670_XVCLK_FREQ)
1291 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
1292 ret = clk_prepare_enable(ov5670->xvclk);
1293 if (ret < 0) {
1294 dev_err(dev, "Failed to enable xvclk\n");
1295 return ret;
1296 }
1297
1298 ret = regulator_bulk_enable(OV5670_NUM_SUPPLIES, ov5670->supplies);
1299 if (ret < 0) {
1300 dev_err(dev, "Failed to enable regulators\n");
1301 goto disable_clk;
1302 }
1303
1304 if (!IS_ERR(ov5670->reset_gpio))
1305 gpiod_set_value_cansleep(ov5670->reset_gpio, 1);
1306
1307 if (!IS_ERR(ov5670->pwdn_gpio))
1308 gpiod_set_value_cansleep(ov5670->pwdn_gpio, 1);
1309
1310 /* export gpio */
1311 if (!IS_ERR(ov5670->reset_gpio))
1312 gpiod_export(ov5670->reset_gpio, false);
1313 if (!IS_ERR(ov5670->pwdn_gpio))
1314 gpiod_export(ov5670->pwdn_gpio, false);
1315
1316 /* 8192 cycles prior to first SCCB transaction */
1317 delay_us = ov5670_cal_delay(8192);
1318 usleep_range(delay_us, delay_us * 2);
1319 usleep_range(10000, 20000);
1320 return 0;
1321
1322 disable_clk:
1323 clk_disable_unprepare(ov5670->xvclk);
1324
1325 return ret;
1326 }
1327
__ov5670_power_off(struct ov5670 * ov5670)1328 static void __ov5670_power_off(struct ov5670 *ov5670)
1329 {
1330 int ret;
1331 struct device *dev = &ov5670->client->dev;
1332
1333 if (!IS_ERR(ov5670->pwdn_gpio))
1334 gpiod_set_value_cansleep(ov5670->pwdn_gpio, 0);
1335 clk_disable_unprepare(ov5670->xvclk);
1336 if (!IS_ERR(ov5670->reset_gpio))
1337 gpiod_set_value_cansleep(ov5670->reset_gpio, 0);
1338 if (!IS_ERR_OR_NULL(ov5670->pins_sleep)) {
1339 ret = pinctrl_select_state(ov5670->pinctrl,
1340 ov5670->pins_sleep);
1341 if (ret < 0)
1342 dev_dbg(dev, "could not set pins\n");
1343 }
1344 if (!IS_ERR(ov5670->power_gpio))
1345 gpiod_set_value_cansleep(ov5670->power_gpio, 0);
1346
1347 regulator_bulk_disable(OV5670_NUM_SUPPLIES, ov5670->supplies);
1348 }
1349
ov5670_runtime_resume(struct device * dev)1350 static int ov5670_runtime_resume(struct device *dev)
1351 {
1352 struct i2c_client *client = to_i2c_client(dev);
1353 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1354 struct ov5670 *ov5670 = to_ov5670(sd);
1355
1356 return __ov5670_power_on(ov5670);
1357 }
1358
ov5670_runtime_suspend(struct device * dev)1359 static int ov5670_runtime_suspend(struct device *dev)
1360 {
1361 struct i2c_client *client = to_i2c_client(dev);
1362 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1363 struct ov5670 *ov5670 = to_ov5670(sd);
1364
1365 __ov5670_power_off(ov5670);
1366
1367 return 0;
1368 }
1369
1370 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
ov5670_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1371 static int ov5670_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1372 {
1373 struct ov5670 *ov5670 = to_ov5670(sd);
1374 struct v4l2_mbus_framefmt *try_fmt =
1375 v4l2_subdev_get_try_format(sd, fh->pad, 0);
1376 const struct ov5670_mode *def_mode = &supported_modes[0];
1377
1378 mutex_lock(&ov5670->mutex);
1379 /* Initialize try_fmt */
1380 try_fmt->width = def_mode->width;
1381 try_fmt->height = def_mode->height;
1382 try_fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
1383 try_fmt->field = V4L2_FIELD_NONE;
1384
1385 mutex_unlock(&ov5670->mutex);
1386 /* No crop or compose */
1387
1388 return 0;
1389 }
1390 #endif
1391
ov5670_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)1392 static int ov5670_enum_frame_interval(struct v4l2_subdev *sd,
1393 struct v4l2_subdev_pad_config *cfg,
1394 struct v4l2_subdev_frame_interval_enum *fie)
1395 {
1396 struct ov5670 *ov5670 = to_ov5670(sd);
1397
1398 if (fie->index >= ov5670->cfg_num)
1399 return -EINVAL;
1400
1401 fie->code = MEDIA_BUS_FMT_SBGGR10_1X10;
1402 fie->width = supported_modes[fie->index].width;
1403 fie->height = supported_modes[fie->index].height;
1404 fie->interval = supported_modes[fie->index].max_fps;
1405 return 0;
1406 }
1407
ov5670_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad_id,struct v4l2_mbus_config * config)1408 static int ov5670_g_mbus_config(struct v4l2_subdev *sd,
1409 unsigned int pad_id,
1410 struct v4l2_mbus_config *config)
1411 {
1412 u32 val = 1 << (OV5670_LANES - 1) |
1413 V4L2_MBUS_CSI2_CHANNEL_0 |
1414 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
1415
1416 config->type = V4L2_MBUS_CSI2_DPHY;
1417 config->flags = val;
1418
1419 return 0;
1420 }
1421
1422 static const struct dev_pm_ops ov5670_pm_ops = {
1423 SET_RUNTIME_PM_OPS(ov5670_runtime_suspend,
1424 ov5670_runtime_resume, NULL)
1425 };
1426
1427 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1428 static const struct v4l2_subdev_internal_ops ov5670_internal_ops = {
1429 .open = ov5670_open,
1430 };
1431 #endif
1432
1433 static const struct v4l2_subdev_core_ops ov5670_core_ops = {
1434 .s_power = ov5670_s_power,
1435 .ioctl = ov5670_ioctl,
1436 #ifdef CONFIG_COMPAT
1437 .compat_ioctl32 = ov5670_compat_ioctl32,
1438 #endif
1439 };
1440
1441 static const struct v4l2_subdev_video_ops ov5670_video_ops = {
1442 .s_stream = ov5670_s_stream,
1443 .g_frame_interval = ov5670_g_frame_interval,
1444 };
1445
1446 static const struct v4l2_subdev_pad_ops ov5670_pad_ops = {
1447 .enum_mbus_code = ov5670_enum_mbus_code,
1448 .enum_frame_size = ov5670_enum_frame_sizes,
1449 .enum_frame_interval = ov5670_enum_frame_interval,
1450 .get_fmt = ov5670_get_fmt,
1451 .set_fmt = ov5670_set_fmt,
1452 .get_mbus_config = ov5670_g_mbus_config,
1453 };
1454
1455 static const struct v4l2_subdev_ops ov5670_subdev_ops = {
1456 .core = &ov5670_core_ops,
1457 .video = &ov5670_video_ops,
1458 .pad = &ov5670_pad_ops,
1459 };
1460
ov5670_set_ctrl(struct v4l2_ctrl * ctrl)1461 static int ov5670_set_ctrl(struct v4l2_ctrl *ctrl)
1462 {
1463 struct ov5670 *ov5670 = container_of(ctrl->handler,
1464 struct ov5670, ctrl_handler);
1465 struct i2c_client *client = ov5670->client;
1466 s64 max;
1467 int ret = 0;
1468
1469 /* Propagate change of current control to all related controls */
1470 switch (ctrl->id) {
1471 case V4L2_CID_VBLANK:
1472 /* Update max exposure while meeting expected vblanking */
1473 max = ov5670->cur_mode->height + ctrl->val - 4;
1474 __v4l2_ctrl_modify_range(ov5670->exposure,
1475 ov5670->exposure->minimum, max,
1476 ov5670->exposure->step,
1477 ov5670->exposure->default_value);
1478 break;
1479 }
1480
1481 if (pm_runtime_get(&client->dev) <= 0)
1482 return 0;
1483
1484 switch (ctrl->id) {
1485 case V4L2_CID_EXPOSURE:
1486 /* 4 least significant bits of expsoure are fractional part */
1487 /*group 0*/
1488 ret = ov5670_write_reg(ov5670->client, OV5670_REG_GROUP,
1489 OV5670_REG_VALUE_08BIT, 0x00);
1490 ret |= ov5670_write_reg(ov5670->client, OV5670_REG_EXPOSURE,
1491 OV5670_REG_VALUE_24BIT, ctrl->val << 4);
1492 ret |= ov5670_write_reg(ov5670->client, OV5670_REG_GROUP,
1493 OV5670_REG_VALUE_08BIT, 0x10);
1494 ret |= ov5670_write_reg(ov5670->client, OV5670_REG_GROUP,
1495 OV5670_REG_VALUE_08BIT, 0xa0);
1496
1497 break;
1498 case V4L2_CID_ANALOGUE_GAIN:
1499 /*group 1*/
1500 ret = ov5670_write_reg(ov5670->client, OV5670_REG_GROUP,
1501 OV5670_REG_VALUE_08BIT, 0x01);
1502
1503 ret |= ov5670_write_reg(ov5670->client, OV5670_REG_GAIN_L,
1504 OV5670_REG_VALUE_08BIT,
1505 ctrl->val & OV5670_GAIN_L_MASK);
1506 ret |= ov5670_write_reg(ov5670->client, OV5670_REG_GAIN_H,
1507 OV5670_REG_VALUE_08BIT,
1508 (ctrl->val >> OV5670_GAIN_H_SHIFT) &
1509 OV5670_GAIN_H_MASK);
1510 ret |= ov5670_write_reg(ov5670->client, OV5670_REG_GROUP,
1511 OV5670_REG_VALUE_08BIT, 0x11);
1512 ret |= ov5670_write_reg(ov5670->client, OV5670_REG_GROUP,
1513 OV5670_REG_VALUE_08BIT, 0xa1);
1514 break;
1515 case V4L2_CID_VBLANK:
1516
1517 ret = ov5670_write_reg(ov5670->client, OV5670_REG_VTS,
1518 OV5670_REG_VALUE_16BIT,
1519 ctrl->val + ov5670->cur_mode->height);
1520 break;
1521 case V4L2_CID_TEST_PATTERN:
1522 ret = ov5670_enable_test_pattern(ov5670, ctrl->val);
1523 break;
1524 default:
1525 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1526 __func__, ctrl->id, ctrl->val);
1527 break;
1528 }
1529
1530 pm_runtime_put(&client->dev);
1531
1532 return ret;
1533 }
1534
1535 static const struct v4l2_ctrl_ops ov5670_ctrl_ops = {
1536 .s_ctrl = ov5670_set_ctrl,
1537 };
1538
ov5670_initialize_controls(struct ov5670 * ov5670)1539 static int ov5670_initialize_controls(struct ov5670 *ov5670)
1540 {
1541 const struct ov5670_mode *mode;
1542 struct v4l2_ctrl_handler *handler;
1543 struct v4l2_ctrl *ctrl;
1544 s64 exposure_max, vblank_def;
1545 u32 h_blank;
1546 int ret;
1547
1548 handler = &ov5670->ctrl_handler;
1549 mode = ov5670->cur_mode;
1550 ret = v4l2_ctrl_handler_init(handler, 8);
1551 if (ret)
1552 return ret;
1553 handler->lock = &ov5670->mutex;
1554
1555 ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
1556 0, 0, link_freq_menu_items);
1557 if (ctrl)
1558 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1559
1560 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
1561 0, ov5670->pixel_rate, 1, ov5670->pixel_rate);
1562
1563 h_blank = mode->hts_def - mode->width;
1564 ov5670->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1565 h_blank, h_blank, 1, h_blank);
1566 if (ov5670->hblank)
1567 ov5670->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1568
1569 vblank_def = mode->vts_def - mode->height;
1570 ov5670->vblank = v4l2_ctrl_new_std(handler, &ov5670_ctrl_ops,
1571 V4L2_CID_VBLANK, vblank_def,
1572 OV5670_VTS_MAX - mode->height,
1573 1, vblank_def);
1574
1575 exposure_max = mode->vts_def - 4;
1576 ov5670->exposure = v4l2_ctrl_new_std(handler, &ov5670_ctrl_ops,
1577 V4L2_CID_EXPOSURE, OV5670_EXPOSURE_MIN,
1578 exposure_max, OV5670_EXPOSURE_STEP,
1579 mode->exp_def);
1580
1581 ov5670->anal_gain = v4l2_ctrl_new_std(handler, &ov5670_ctrl_ops,
1582 V4L2_CID_ANALOGUE_GAIN, ANALOG_GAIN_MIN,
1583 ANALOG_GAIN_MAX, ANALOG_GAIN_STEP,
1584 ANALOG_GAIN_DEFAULT);
1585
1586 ov5670->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
1587 &ov5670_ctrl_ops, V4L2_CID_TEST_PATTERN,
1588 ARRAY_SIZE(ov5670_test_pattern_menu) - 1,
1589 0, 0, ov5670_test_pattern_menu);
1590
1591 if (handler->error) {
1592 ret = handler->error;
1593 dev_err(&ov5670->client->dev,
1594 "Failed to init controls(%d)\n", ret);
1595 goto err_free_handler;
1596 }
1597
1598 ov5670->subdev.ctrl_handler = handler;
1599
1600 return 0;
1601
1602 err_free_handler:
1603 v4l2_ctrl_handler_free(handler);
1604
1605 return ret;
1606 }
1607
ov5670_otp_read(struct ov5670 * ov5670)1608 static int ov5670_otp_read(struct ov5670 *ov5670)
1609 {
1610 int otp_flag, addr, temp = 0, i;
1611 struct ov5670_otp_info *otp_ptr;
1612 struct device *dev = &ov5670->client->dev;
1613 struct i2c_client *client = ov5670->client;
1614
1615 otp_ptr = devm_kzalloc(dev, sizeof(*otp_ptr), GFP_KERNEL);
1616 if (!otp_ptr)
1617 return -ENOMEM;
1618
1619 otp_flag = 0;
1620 ov5670_read_1byte(client, 0x7010, &otp_flag);
1621 if ((otp_flag & 0xc0) == 0x40)
1622 addr = 0x7011; /* base address of info group 1 */
1623 else if ((otp_flag & 0x30) == 0x10)
1624 addr = 0x7016; /* base address of info group 2 */
1625 else if ((otp_flag & 0x0c) == 0x04)
1626 addr = 0x701b; /* base address of info group 3 */
1627 else
1628 addr = 0;
1629
1630 if (addr != 0) {
1631 otp_ptr->flag = 0x80; /* valid info in OTP */
1632 ov5670_read_1byte(client, addr, &otp_ptr->module_id);
1633 ov5670_read_1byte(client, addr + 1, &otp_ptr->lens_id);
1634 ov5670_read_1byte(client, addr + 2, &otp_ptr->year);
1635 ov5670_read_1byte(client, addr + 3, &otp_ptr->month);
1636 ov5670_read_1byte(client, addr + 4, &otp_ptr->day);
1637 dev_info(dev, "fac info: module(0x%x) lens(0x%x) time(%d_%d_%d)!\n",
1638 otp_ptr->module_id,
1639 otp_ptr->lens_id,
1640 otp_ptr->year,
1641 otp_ptr->month,
1642 otp_ptr->day);
1643 } else {
1644 otp_ptr->flag = 0x00; /* not info in OTP */
1645 otp_ptr->module_id = 0x00;
1646 otp_ptr->lens_id = 0x00;
1647 otp_ptr->year = 0x00;
1648 otp_ptr->month = 0x00;
1649 otp_ptr->day = 0x00;
1650 dev_warn(dev, "fac info: module(0x%x) lens(0x%x) time(%d_%d_%d)!\n",
1651 otp_ptr->module_id,
1652 otp_ptr->lens_id,
1653 otp_ptr->year,
1654 otp_ptr->month,
1655 otp_ptr->day);
1656 }
1657
1658 /* OTP base information and WB calibration data */
1659 ov5670_read_1byte(client, 0x7020, &otp_flag);
1660 if ((otp_flag & 0xc0) == 0x40)
1661 addr = 0x7021; /* base address of info group 1 */
1662 else if ((otp_flag & 0x30) == 0x10)
1663 addr = 0x7024; /* base address of info group 2 */
1664 else if ((otp_flag & 0x0c) == 0x04)
1665 addr = 0x7027; /* base address of info group 3 */
1666 else
1667 addr = 0;
1668
1669 if (addr != 0) {
1670 otp_ptr->flag |= 0x40; /* valid info and AWB in OTP */
1671 ov5670_read_1byte(client, addr + 2, &temp);
1672 ov5670_read_1byte(client, addr, &otp_ptr->rg_ratio);
1673 otp_ptr->rg_ratio = (otp_ptr->rg_ratio << 2) +
1674 ((temp >> 6) & 0x03);
1675 ov5670_read_1byte(client, addr + 1, &otp_ptr->bg_ratio);
1676 otp_ptr->bg_ratio = (otp_ptr->bg_ratio << 2) +
1677 ((temp >> 4) & 0x03);
1678 dev_info(dev, "awb info: (0x%x, 0x%x)!\n",
1679 otp_ptr->rg_ratio, otp_ptr->bg_ratio);
1680 } else {
1681 otp_ptr->rg_ratio = 0x00;
1682 otp_ptr->bg_ratio = 0x00;
1683 dev_warn(dev, "awb info: (0x%x, 0x%x)!\n",
1684 otp_ptr->rg_ratio, otp_ptr->bg_ratio);
1685 }
1686
1687 for (i = 0x7010; i <= 0x7029; i++)
1688 ov5670_write_1byte(client, i, 0); /* clear OTP buffer */
1689
1690 if (otp_ptr->flag) {
1691 ov5670->otp = otp_ptr;
1692 } else {
1693 ov5670->otp = NULL;
1694 dev_info(dev, "otp is null!\n");
1695 devm_kfree(dev, otp_ptr);
1696 }
1697
1698 return 0;
1699 }
1700
ov5670_otp_check_read(struct ov5670 * ov5670)1701 static int ov5670_otp_check_read(struct ov5670 *ov5670)
1702 {
1703 int temp = 0;
1704 int ret = 0;
1705 struct i2c_client *client = ov5670->client;
1706
1707 /* stream on */
1708 ov5670_write_1byte(client,
1709 OV5670_REG_CTRL_MODE,
1710 OV5670_MODE_STREAMING);
1711
1712 ov5670_read_1byte(client, 0x5002, &temp);
1713 ov5670_write_1byte(client, 0x5002, (temp & (~0x08)));
1714
1715 /* read OTP into buffer */
1716 ov5670_write_1byte(client, 0x3d84, 0xC0);
1717 ov5670_write_1byte(client, 0x3d88, 0x70); /* OTP start address */
1718 ov5670_write_1byte(client, 0x3d89, 0x10);
1719 ov5670_write_1byte(client, 0x3d8A, 0x70); /* OTP end address */
1720 ov5670_write_1byte(client, 0x3d8B, 0x29);
1721 ov5670_write_1byte(client, 0x3d81, 0x01); /* load otp into buffer */
1722 usleep_range(10000, 20000);
1723
1724 ret = ov5670_otp_read(ov5670);
1725
1726 /* set 0x5002[3] to "1" */
1727 ov5670_read_1byte(client, 0x5002, &temp);
1728 ov5670_write_1byte(client, 0x5002, 0x08 | (temp & (~0x08)));
1729
1730 /* stream off */
1731 ov5670_write_1byte(client,
1732 OV5670_REG_CTRL_MODE,
1733 OV5670_MODE_SW_STANDBY);
1734
1735 return ret;
1736 }
1737
ov5670_check_sensor_id(struct ov5670 * ov5670,struct i2c_client * client)1738 static int ov5670_check_sensor_id(struct ov5670 *ov5670,
1739 struct i2c_client *client)
1740 {
1741 struct device *dev = &ov5670->client->dev;
1742 u32 id = 0;
1743 int ret;
1744
1745 ret = ov5670_read_reg(client, OV5670_REG_CHIP_ID,
1746 OV5670_REG_VALUE_16BIT, &id);
1747 if (id != CHIP_ID) {
1748 dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
1749 return -ENODEV;
1750 }
1751
1752 dev_info(dev, "Detected OV%06x sensor\n", CHIP_ID);
1753
1754 return 0;
1755 }
1756
ov5670_configure_regulators(struct ov5670 * ov5670)1757 static int ov5670_configure_regulators(struct ov5670 *ov5670)
1758 {
1759 unsigned int i;
1760
1761 for (i = 0; i < OV5670_NUM_SUPPLIES; i++)
1762 ov5670->supplies[i].supply = ov5670_supply_names[i];
1763
1764 return devm_regulator_bulk_get(&ov5670->client->dev,
1765 OV5670_NUM_SUPPLIES,
1766 ov5670->supplies);
1767 }
1768
ov5670_parse_of(struct ov5670 * ov5670)1769 static int ov5670_parse_of(struct ov5670 *ov5670)
1770 {
1771 struct device *dev = &ov5670->client->dev;
1772 struct device_node *endpoint;
1773 struct fwnode_handle *fwnode;
1774 int rval;
1775
1776 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
1777 if (!endpoint) {
1778 dev_err(dev, "Failed to get endpoint\n");
1779 return -EINVAL;
1780 }
1781 fwnode = of_fwnode_handle(endpoint);
1782 rval = fwnode_property_read_u32_array(fwnode, "data-lanes", NULL, 0);
1783 if (rval <= 0) {
1784 dev_warn(dev, " Get mipi lane num failed!\n");
1785 return -1;
1786 }
1787
1788 ov5670->lane_num = rval;
1789 if (ov5670->lane_num == 2) {
1790 ov5670->cur_mode = &supported_modes_2lane[0];
1791 supported_modes = supported_modes_2lane;
1792 ov5670->cfg_num = ARRAY_SIZE(supported_modes_2lane);
1793
1794 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
1795 ov5670->pixel_rate = MIPI_FREQ * 2U * ov5670->lane_num / 8U;
1796 dev_info(dev, "lane_num(%d) pixel_rate(%u)\n",
1797 ov5670->lane_num, ov5670->pixel_rate);
1798 } else {
1799 dev_err(dev, "unsupported lane_num(%d)\n", ov5670->lane_num);
1800 return -1;
1801 }
1802
1803 return 0;
1804 }
1805
ov5670_probe(struct i2c_client * client,const struct i2c_device_id * id)1806 static int ov5670_probe(struct i2c_client *client,
1807 const struct i2c_device_id *id)
1808 {
1809 struct device *dev = &client->dev;
1810 struct device_node *node = dev->of_node;
1811 struct ov5670 *ov5670;
1812 struct v4l2_subdev *sd;
1813 char facing[2] = "b";
1814 int ret;
1815
1816 dev_info(dev, "driver version: %02x.%02x.%02x",
1817 DRIVER_VERSION >> 16,
1818 (DRIVER_VERSION & 0xff00) >> 8,
1819 DRIVER_VERSION & 0x00ff);
1820
1821 ov5670 = devm_kzalloc(dev, sizeof(*ov5670), GFP_KERNEL);
1822 if (!ov5670)
1823 return -ENOMEM;
1824
1825 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1826 &ov5670->module_index);
1827 if (ret) {
1828 dev_warn(dev, "could not get module index!\n");
1829 ov5670->module_index = 0;
1830 }
1831 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1832 &ov5670->module_facing);
1833 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1834 &ov5670->module_name);
1835 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1836 &ov5670->len_name);
1837 if (ret) {
1838 dev_err(dev, "could not get module information!\n");
1839 return -EINVAL;
1840 }
1841
1842 ov5670->client = client;
1843
1844 ov5670->xvclk = devm_clk_get(dev, "xvclk");
1845 if (IS_ERR(ov5670->xvclk)) {
1846 dev_err(dev, "Failed to get xvclk\n");
1847 return -EINVAL;
1848 }
1849
1850 ov5670->power_gpio = devm_gpiod_get(dev, "power", GPIOD_OUT_LOW);
1851 if (IS_ERR(ov5670->power_gpio))
1852 dev_warn(dev, "Failed to get power-gpios, maybe no use\n");
1853
1854 ov5670->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1855 if (IS_ERR(ov5670->reset_gpio))
1856 dev_warn(dev, "Failed to get reset-gpios, maybe no use\n");
1857
1858 ov5670->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1859 if (IS_ERR(ov5670->pwdn_gpio))
1860 dev_warn(dev, "Failed to get pwdn-gpios\n");
1861
1862 ret = ov5670_configure_regulators(ov5670);
1863 if (ret) {
1864 dev_err(dev, "Failed to get power regulators\n");
1865 return ret;
1866 }
1867 ret = ov5670_parse_of(ov5670);
1868 if (ret != 0)
1869 return -EINVAL;
1870
1871 ov5670->pinctrl = devm_pinctrl_get(dev);
1872 if (!IS_ERR(ov5670->pinctrl)) {
1873 ov5670->pins_default =
1874 pinctrl_lookup_state(ov5670->pinctrl,
1875 OF_CAMERA_PINCTRL_STATE_DEFAULT);
1876 if (IS_ERR(ov5670->pins_default))
1877 dev_err(dev, "could not get default pinstate\n");
1878
1879 ov5670->pins_sleep =
1880 pinctrl_lookup_state(ov5670->pinctrl,
1881 OF_CAMERA_PINCTRL_STATE_SLEEP);
1882 if (IS_ERR(ov5670->pins_sleep))
1883 dev_err(dev, "could not get sleep pinstate\n");
1884 }
1885
1886 mutex_init(&ov5670->mutex);
1887
1888 sd = &ov5670->subdev;
1889 v4l2_i2c_subdev_init(sd, client, &ov5670_subdev_ops);
1890 ret = ov5670_initialize_controls(ov5670);
1891 if (ret)
1892 goto err_destroy_mutex;
1893
1894 ret = __ov5670_power_on(ov5670);
1895 if (ret)
1896 goto err_free_handler;
1897
1898 ret = ov5670_check_sensor_id(ov5670, client);
1899 if (ret < 0) {
1900 dev_info(&client->dev, "%s(%d) Check id failed\n"
1901 "check following information:\n"
1902 "Power/PowerDown/Reset/Mclk/I2cBus !!\n",
1903 __func__, __LINE__);
1904 goto err_power_off;
1905 }
1906 ov5670_otp_check_read(ov5670);
1907
1908 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1909 sd->internal_ops = &ov5670_internal_ops;
1910 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1911 #endif
1912 #if defined(CONFIG_MEDIA_CONTROLLER)
1913 ov5670->pad.flags = MEDIA_PAD_FL_SOURCE;
1914 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1915 ret = media_entity_pads_init(&sd->entity, 1, &ov5670->pad);
1916 if (ret < 0)
1917 goto err_power_off;
1918 #endif
1919
1920 memset(facing, 0, sizeof(facing));
1921 if (strcmp(ov5670->module_facing, "back") == 0)
1922 facing[0] = 'b';
1923 else
1924 facing[0] = 'f';
1925
1926 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1927 ov5670->module_index, facing,
1928 OV5670_NAME, dev_name(sd->dev));
1929
1930 ret = v4l2_async_register_subdev_sensor_common(sd);
1931 if (ret) {
1932 dev_err(dev, "v4l2 async register subdev failed\n");
1933 goto err_clean_entity;
1934 }
1935
1936 pm_runtime_set_active(dev);
1937 pm_runtime_enable(dev);
1938 pm_runtime_idle(dev);
1939
1940 return 0;
1941
1942 err_clean_entity:
1943 #if defined(CONFIG_MEDIA_CONTROLLER)
1944 media_entity_cleanup(&sd->entity);
1945 #endif
1946 err_power_off:
1947 __ov5670_power_off(ov5670);
1948 err_free_handler:
1949 v4l2_ctrl_handler_free(&ov5670->ctrl_handler);
1950 err_destroy_mutex:
1951 mutex_destroy(&ov5670->mutex);
1952
1953 return ret;
1954 }
1955
ov5670_remove(struct i2c_client * client)1956 static int ov5670_remove(struct i2c_client *client)
1957 {
1958 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1959 struct ov5670 *ov5670 = to_ov5670(sd);
1960
1961 v4l2_async_unregister_subdev(sd);
1962 #if defined(CONFIG_MEDIA_CONTROLLER)
1963 media_entity_cleanup(&sd->entity);
1964 #endif
1965 v4l2_ctrl_handler_free(&ov5670->ctrl_handler);
1966 mutex_destroy(&ov5670->mutex);
1967
1968 pm_runtime_disable(&client->dev);
1969 if (!pm_runtime_status_suspended(&client->dev))
1970 __ov5670_power_off(ov5670);
1971 pm_runtime_set_suspended(&client->dev);
1972
1973 return 0;
1974 }
1975
1976 #if IS_ENABLED(CONFIG_OF)
1977 static const struct of_device_id ov5670_of_match[] = {
1978 { .compatible = "ovti,ov5670" },
1979 {},
1980 };
1981 MODULE_DEVICE_TABLE(of, ov5670_of_match);
1982 #endif
1983
1984 static const struct i2c_device_id ov5670_match_id[] = {
1985 { "ovti,ov5670", 0 },
1986 { },
1987 };
1988
1989 static struct i2c_driver ov5670_i2c_driver = {
1990 .driver = {
1991 .name = OV5670_NAME,
1992 .pm = &ov5670_pm_ops,
1993 .of_match_table = of_match_ptr(ov5670_of_match),
1994 },
1995 .probe = &ov5670_probe,
1996 .remove = &ov5670_remove,
1997 .id_table = ov5670_match_id,
1998 };
1999
sensor_mod_init(void)2000 static int __init sensor_mod_init(void)
2001 {
2002 return i2c_add_driver(&ov5670_i2c_driver);
2003 }
2004
sensor_mod_exit(void)2005 static void __exit sensor_mod_exit(void)
2006 {
2007 i2c_del_driver(&ov5670_i2c_driver);
2008 }
2009
2010 device_initcall_sync(sensor_mod_init);
2011 module_exit(sensor_mod_exit);
2012
2013 MODULE_DESCRIPTION("OmniVision ov5670 sensor driver");
2014 MODULE_LICENSE("GPL v2");
2015