xref: /OK3568_Linux_fs/kernel/drivers/nvmem/mxs-ocotp.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Freescale MXS On-Chip OTP driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2015 Stefan Wahren <stefan.wahren@i2se.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Based on the driver from Huang Shijie and Christoph G. Baumann
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun #include <linux/clk.h>
10*4882a593Smuzhiyun #include <linux/delay.h>
11*4882a593Smuzhiyun #include <linux/device.h>
12*4882a593Smuzhiyun #include <linux/err.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/nvmem-provider.h>
16*4882a593Smuzhiyun #include <linux/of_device.h>
17*4882a593Smuzhiyun #include <linux/platform_device.h>
18*4882a593Smuzhiyun #include <linux/slab.h>
19*4882a593Smuzhiyun #include <linux/stmp_device.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /* OCOTP registers and bits */
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define BM_OCOTP_CTRL_RD_BANK_OPEN	BIT(12)
24*4882a593Smuzhiyun #define BM_OCOTP_CTRL_ERROR		BIT(9)
25*4882a593Smuzhiyun #define BM_OCOTP_CTRL_BUSY		BIT(8)
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define OCOTP_TIMEOUT		10000
28*4882a593Smuzhiyun #define OCOTP_DATA_OFFSET	0x20
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun struct mxs_ocotp {
31*4882a593Smuzhiyun 	struct clk *clk;
32*4882a593Smuzhiyun 	void __iomem *base;
33*4882a593Smuzhiyun 	struct nvmem_device *nvmem;
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun 
mxs_ocotp_wait(struct mxs_ocotp * otp)36*4882a593Smuzhiyun static int mxs_ocotp_wait(struct mxs_ocotp *otp)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun 	int timeout = OCOTP_TIMEOUT;
39*4882a593Smuzhiyun 	unsigned int status = 0;
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	while (timeout--) {
42*4882a593Smuzhiyun 		status = readl(otp->base);
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 		if (!(status & (BM_OCOTP_CTRL_BUSY | BM_OCOTP_CTRL_ERROR)))
45*4882a593Smuzhiyun 			break;
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 		cpu_relax();
48*4882a593Smuzhiyun 	}
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	if (status & BM_OCOTP_CTRL_BUSY)
51*4882a593Smuzhiyun 		return -EBUSY;
52*4882a593Smuzhiyun 	else if (status & BM_OCOTP_CTRL_ERROR)
53*4882a593Smuzhiyun 		return -EIO;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	return 0;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun 
mxs_ocotp_read(void * context,unsigned int offset,void * val,size_t bytes)58*4882a593Smuzhiyun static int mxs_ocotp_read(void *context, unsigned int offset,
59*4882a593Smuzhiyun 			  void *val, size_t bytes)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun 	struct mxs_ocotp *otp = context;
62*4882a593Smuzhiyun 	u32 *buf = val;
63*4882a593Smuzhiyun 	int ret;
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	ret = clk_enable(otp->clk);
66*4882a593Smuzhiyun 	if (ret)
67*4882a593Smuzhiyun 		return ret;
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	writel(BM_OCOTP_CTRL_ERROR, otp->base + STMP_OFFSET_REG_CLR);
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	ret = mxs_ocotp_wait(otp);
72*4882a593Smuzhiyun 	if (ret)
73*4882a593Smuzhiyun 		goto disable_clk;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	/* open OCOTP banks for read */
76*4882a593Smuzhiyun 	writel(BM_OCOTP_CTRL_RD_BANK_OPEN, otp->base + STMP_OFFSET_REG_SET);
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	/* approximately wait 33 hclk cycles */
79*4882a593Smuzhiyun 	udelay(1);
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	ret = mxs_ocotp_wait(otp);
82*4882a593Smuzhiyun 	if (ret)
83*4882a593Smuzhiyun 		goto close_banks;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	while (bytes) {
86*4882a593Smuzhiyun 		if ((offset < OCOTP_DATA_OFFSET) || (offset % 16)) {
87*4882a593Smuzhiyun 			/* fill up non-data register */
88*4882a593Smuzhiyun 			*buf++ = 0;
89*4882a593Smuzhiyun 		} else {
90*4882a593Smuzhiyun 			*buf++ = readl(otp->base + offset);
91*4882a593Smuzhiyun 		}
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 		bytes -= 4;
94*4882a593Smuzhiyun 		offset += 4;
95*4882a593Smuzhiyun 	}
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun close_banks:
98*4882a593Smuzhiyun 	/* close banks for power saving */
99*4882a593Smuzhiyun 	writel(BM_OCOTP_CTRL_RD_BANK_OPEN, otp->base + STMP_OFFSET_REG_CLR);
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun disable_clk:
102*4882a593Smuzhiyun 	clk_disable(otp->clk);
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	return ret;
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun static struct nvmem_config ocotp_config = {
108*4882a593Smuzhiyun 	.name = "mxs-ocotp",
109*4882a593Smuzhiyun 	.stride = 16,
110*4882a593Smuzhiyun 	.word_size = 4,
111*4882a593Smuzhiyun 	.reg_read = mxs_ocotp_read,
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun struct mxs_data {
115*4882a593Smuzhiyun 	int size;
116*4882a593Smuzhiyun };
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun static const struct mxs_data imx23_data = {
119*4882a593Smuzhiyun 	.size = 0x220,
120*4882a593Smuzhiyun };
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun static const struct mxs_data imx28_data = {
123*4882a593Smuzhiyun 	.size = 0x2a0,
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun static const struct of_device_id mxs_ocotp_match[] = {
127*4882a593Smuzhiyun 	{ .compatible = "fsl,imx23-ocotp", .data = &imx23_data },
128*4882a593Smuzhiyun 	{ .compatible = "fsl,imx28-ocotp", .data = &imx28_data },
129*4882a593Smuzhiyun 	{ /* sentinel */},
130*4882a593Smuzhiyun };
131*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, mxs_ocotp_match);
132*4882a593Smuzhiyun 
mxs_ocotp_action(void * data)133*4882a593Smuzhiyun static void mxs_ocotp_action(void *data)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun 	clk_unprepare(data);
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun 
mxs_ocotp_probe(struct platform_device * pdev)138*4882a593Smuzhiyun static int mxs_ocotp_probe(struct platform_device *pdev)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
141*4882a593Smuzhiyun 	const struct mxs_data *data;
142*4882a593Smuzhiyun 	struct mxs_ocotp *otp;
143*4882a593Smuzhiyun 	const struct of_device_id *match;
144*4882a593Smuzhiyun 	int ret;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	match = of_match_device(dev->driver->of_match_table, dev);
147*4882a593Smuzhiyun 	if (!match || !match->data)
148*4882a593Smuzhiyun 		return -EINVAL;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	otp = devm_kzalloc(dev, sizeof(*otp), GFP_KERNEL);
151*4882a593Smuzhiyun 	if (!otp)
152*4882a593Smuzhiyun 		return -ENOMEM;
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	otp->base = devm_platform_ioremap_resource(pdev, 0);
155*4882a593Smuzhiyun 	if (IS_ERR(otp->base))
156*4882a593Smuzhiyun 		return PTR_ERR(otp->base);
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	otp->clk = devm_clk_get(&pdev->dev, NULL);
159*4882a593Smuzhiyun 	if (IS_ERR(otp->clk))
160*4882a593Smuzhiyun 		return PTR_ERR(otp->clk);
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	ret = clk_prepare(otp->clk);
163*4882a593Smuzhiyun 	if (ret < 0) {
164*4882a593Smuzhiyun 		dev_err(dev, "failed to prepare clk: %d\n", ret);
165*4882a593Smuzhiyun 		return ret;
166*4882a593Smuzhiyun 	}
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	ret = devm_add_action_or_reset(&pdev->dev, mxs_ocotp_action, otp->clk);
169*4882a593Smuzhiyun 	if (ret)
170*4882a593Smuzhiyun 		return ret;
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	data = match->data;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	ocotp_config.size = data->size;
175*4882a593Smuzhiyun 	ocotp_config.priv = otp;
176*4882a593Smuzhiyun 	ocotp_config.dev = dev;
177*4882a593Smuzhiyun 	otp->nvmem = devm_nvmem_register(dev, &ocotp_config);
178*4882a593Smuzhiyun 	if (IS_ERR(otp->nvmem))
179*4882a593Smuzhiyun 		return PTR_ERR(otp->nvmem);
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	platform_set_drvdata(pdev, otp);
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	return 0;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun static struct platform_driver mxs_ocotp_driver = {
187*4882a593Smuzhiyun 	.probe = mxs_ocotp_probe,
188*4882a593Smuzhiyun 	.driver = {
189*4882a593Smuzhiyun 		.name = "mxs-ocotp",
190*4882a593Smuzhiyun 		.of_match_table = mxs_ocotp_match,
191*4882a593Smuzhiyun 	},
192*4882a593Smuzhiyun };
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun module_platform_driver(mxs_ocotp_driver);
195*4882a593Smuzhiyun MODULE_AUTHOR("Stefan Wahren <wahrenst@gmx.net");
196*4882a593Smuzhiyun MODULE_DESCRIPTION("driver for OCOTP in i.MX23/i.MX28");
197*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
198