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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dpxa300-raumfeld-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 hw-revision = <0>;
14 stdout-path = &ffuart;
22 reg_3v3: regulator-3v3 {
23 compatible = "regulator-fixed";
24 regulator-name = "3v3-fixed-supply";
25 regulator-min-microvolt = <3300000>;
[all …]
H A Dpxa300-raumfeld-controller.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "pxa300-raumfeld-common.dtsi"
9 compatible = "raumfeld,raumfeld-controller-pxa303", "marvell,pxa300";
11 reg_vbatt: regulator-vbatt {
12 compatible = "regulator-fixed";
13 regulator-name = "vbatt-fixed-supply";
14 regulator-min-microvolt = <3700000>;
15 regulator-max-microvolt = <3700000>;
16 regulator-always-on;
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/
H A Dpincfg-node.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
33 bias-pull-up:
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H A Dpinctrl-single.txt1 One-register-per-pin type device tree based pinctrl driver
4 - compatible : "pinctrl-single" or "pinconf-single".
5 "pinctrl-single" means that pinconf isn't supported.
6 "pinconf-single" means that generic pinconf is supported.
8 - reg : offset and length of the register set for the mux registers
10 - #pinctrl-cells : number of cells in addition to the index, set to 1
11 for pinctrl-single,pins and 2 for pinctrl-single,bits
13 - pinctrl-single,register-width : pinmux register access width in bits
15 - pinctrl-single,function-mask : mask of allowed pinmux function bits
19 - pinctrl-single,function-off : function off mode for disabled state if
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/OK3568_Linux_fs/kernel/drivers/clk/ti/
H A Ddpll44xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP4-specific DPLL control functions
20 * can supported when using the DPLL low-power mode. Frequencies are
22 * Status, and Low-Power Operation Mode".
45 mask = clk->flags & CLOCK_CLKOUTX2 ? in omap4_dpllmx_allow_gatectrl()
49 v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); in omap4_dpllmx_allow_gatectrl()
52 ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg); in omap4_dpllmx_allow_gatectrl()
63 mask = clk->flags & CLOCK_CLKOUTX2 ? in omap4_dpllmx_deny_gatectrl()
67 v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); in omap4_dpllmx_deny_gatectrl()
70 ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg); in omap4_dpllmx_deny_gatectrl()
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/OK3568_Linux_fs/kernel/drivers/regulator/
H A Dmcp16502.c1 // SPDX-License-Identifier: GPL-2.0
9 // Inspired from tps65086-regulator.c
29 * The PMIC has four sets of registers corresponding to four power modes:
30 * Performance, Active, Low-power, Hibernate.
33 * Each regulator has a register for each power mode. To access a register
34 * for a specific regulator and mode BASE_* and OFFSET_* need to be added.
41 * a low-power state while the PMIC is in Active mode. They are supposed to be
42 * configured at startup and then simply transition to/from a global low-power
43 * state by setting the GPIO lpm pin high/low.
45 * This driver keeps the PMIC in Active mode, Low-power state is set for the
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/usb/
H A Dpxa-usb.txt6 - compatible: Should be "marvell,pxa-ohci" for USB controllers
7 used in host mode.
10 - "marvell,enable-port1", "marvell,enable-port2", "marvell,enable-port3"
12 - "marvell,port-mode" selects the mode of the ports:
16 - "marvell,power-sense-low" - power sense pin is low-active.
17 - "marvell,power-control-low" - power control pin is low-active.
18 - "marvell,no-oc-protection" - disable over-current protection.
19 - "marvell,oc-mode-perport" - enable per-port over-current protection.
20 - "marvell,power_on_delay" Power On to Power Good time - in ms.
25 compatible = "marvell,pxa-ohci", "usb-ohci";
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/OK3568_Linux_fs/kernel/arch/arm/mach-omap2/
H A Domap-mpuss-lowpower.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP MPUSS low power code
8 * OMAP4430 MPUSS mainly consists of dual Cortex-A9 with per-CPU
11 * CPU0, CPU1 and MPUSS each have there own power domain and
12 * hence multiple low power combinations of MPUSS are possible.
15 * because the mode is not supported by hw constraints of dormant
16 * mode. While waking up from the dormant mode, a reset signal
17 * to the Cortex-A9 processor must be asserted by the external
18 * power controller.
21 * below modes are supported from power gain vs latency point of view.
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/OK3568_Linux_fs/kernel/sound/soc/codecs/
H A Des8396.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * ES8396.h -- ES8396 ALSA SoC Audio Codec
22 /* Register 0x02 for PLL power down/up, reset, divider and divider dither */
24 /* Register 0x03 for PLL low power mode and PLL power supply selection */
28 /* Register 0x05-0x07 for PLL k cofficient*/
44 /* Register 0x0E for BCLK divider1 in I2S BUS Master mode*/
46 /* Register 0x0F for BCLK divider2 in I2S BUS Master mode*/
48 /* Register 0x10 for LRCK divider3 in I2S BUS Master mode*/
50 /* Register 0x11 for LRCK divider4 in I2S BUS Master mode*/
54 /* Register 0x12 for SDP1 Master or slave mode*/
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/input/
H A Diqs269a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS269A is an 8-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
28 "#address-cells":
31 "#size-cells":
34 azoteq,hall-enable:
37 Enables Hall-effect sensing on channels 6 and 7. In this case, keycodes
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/OK3568_Linux_fs/kernel/Documentation/arm/pxa/
H A Dmfp.rst7 MFP stands for Multi-Function Pin, which is the pin-mux logic on PXA3xx and
15 mechanism is introduced from PXA3xx to completely move the pin-mux functions
16 out of the GPIO controller. In addition to pin-mux configurations, the MFP
17 also controls the low power state, driving strength, pull-up/down and event
21 +--------+
22 | |--(GPIO19)--+
24 | |--(GPIO...) |
25 +--------+ |
26 | +---------+
27 +--------+ +------>| |
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iio/frequency/
H A Dadf4350.txt4 - compatible: Should be one of
7 - reg: SPI chip select numbert for the device
8 - spi-max-frequency: Max SPI frequency to use (< 20000000)
9 - clocks: From common clock binding. Clock is phandle to clock for
13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number,
15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS).
16 - adi,power-up-frequency: If set in Hz the PLL tunes to
18 - adi,reference-div-factor: If set the driver skips dynamic calculation
20 - adi,reference-doubler-enable: Enables reference doubler.
21 - adi,reference-div2-enable: Enables reference divider.
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/OK3568_Linux_fs/kernel/Documentation/ABI/testing/
H A Dsysfs-bus-iio-vf6103 Contact: linux-iio@vger.kernel.org
5 Specifies the hardware conversion mode used. The three
6 available modes are "normal", "high-speed" and "low-power",
7 where the last is the default mode.
12 Contact: linux-iio@vger.kernel.org
14 Specifies the hardware conversion mode used within DAC.
15 The two available modes are "high-power" and "low-power",
16 where "low-power" mode is the default mode.
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.txt1 NVIDIA Tegra Power Management Controller (PMC)
4 - compatible: Should contain one of the following:
5 - "nvidia,tegra186-pmc": for Tegra186
6 - "nvidia,tegra194-pmc": for Tegra194
7 - "nvidia,tegra234-pmc": for Tegra234
8 - reg: Must contain an (offset, length) pair of the register set for each
9 entry in reg-names.
10 - reg-names: Must include the following entries:
11 - "pmc"
12 - "wake"
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/OK3568_Linux_fs/u-boot/doc/device-tree-bindings/pinctrl/
H A Dpinctrl-bindings.txt4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
15 need to reconfigure pins at run-time, for example to tri-state pins when the
47 pinctrl-0: List of phandles, each pointing at a pin configuration
65 pinctrl-1: List of phandles, each pointing at a pin configuration
68 pinctrl-n: List of phandles, each pointing at a pin configuration
70 pinctrl-names: The list of names to assign states. List entry 0 defines the
78 pinctrl-names = "active", "idle";
79 pinctrl-0 = <&state_0_node_a>;
80 pinctrl-1 = <&state_1_node_a &state_1_node_b>;
85 pinctrl-0 = <&state_0_node_a>;
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/dram/
H A Drk3399_dram_timing.txt4 - compatible : Should be "rockchip,ddr-timing"
6 - ddr3_speed_bin : Value is defined at include/dt-bindings/clock/ddr.h.
7 It select DDR3 cl-trp-trcd type, default value "DDR3_DEFAULT".it must selected
11 - pd_idle : Defines the power-down mode auto entry controller clocks.
14 power-down low power state.
16 - sr_idle : Defines the Self-Refresh or Self-Refresh with Memory Clock Gating
19 before the controller will automatically issue an entry into the Self-Refresh
20 or Self-Refresh with Memory Clock Gating low power state.
22 - sr_mc_gate_idle : Defined the Self-Refresh with Memory and Controller Clock Gating
25 the controller will automatically issue an entry into the Self-Refresh with
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/OK3568_Linux_fs/kernel/include/linux/pinctrl/
H A Dpinconf-generic.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
21 * enum pin_config_param - possible pin configuration parameters
25 * bus to change the value by driving the bus high or low and switching to
28 * transition from say pull-up to pull-down implies that you disable
29 * pull-up in the process, this setting disables all biasing.
31 * mode, also know as "third-state" (tristate) or "high-Z" or "floating".
37 * impedance to GROUND). If the argument is != 0 pull-down is enabled,
38 * if it is 0, pull-down is total, i.e. the pin is connected to GROUND.
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/OK3568_Linux_fs/kernel/tools/power/x86/x86_energy_perf_policy/
H A Dx86_energy_perf_policy.81 .\" This page Copyright (C) 2010 - 2015 Len Brown <len.brown@intel.com>
5 x86_energy_perf_policy \- Manage Energy vs. Performance Policy via x86 Model Specific Registers
10 .RB "scope: \-\-cpu\ cpu-list | \-\-pkg\ pkg-list"
12 .RB "cpu-list, pkg-list: # | #,# | #-# | all"
14 .RB "field: \-\-all | \-\-epb | \-\-hwp-epp | \-\-hwp-min | \-\-hwp-max | \-\-hwp-desired"
16 .RB "other: (\-\-force | \-\-hwp-enable | \-\-turbo-enable) value)"
18 .RB "value: # | default | performance | balance-performance | balance-power | power"
21 displays and updates energy-performance policy settings specific to
23 updates, no matter if the Linux cpufreq sub-system is enabled or not.
27 such as how aggressively the hardware enters and exits CPU idle states (C-states)
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/OK3568_Linux_fs/kernel/include/linux/ssb/
H A Dssb_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 #define SSB_PCI_MEM 0x08000000U /* Host Mode sb2pcitranslation0 (64 MB) */
11 #define SSB_PCI_CFG 0x0c000000U /* Host Mode sb2pcitranslation1 (64 MB) */
23 #define SSB_PCI_DMA 0x40000000U /* Client Mode sb2pcitranslation2 (1 GB) */
24 #define SSB_PCI_DMA_SZ 0x40000000U /* Client Mode sb2pcitranslation2 size in bytes */
25 #define SSB_PCIE_DMA_L32 0x00000000U /* PCIE Client Mode sb2pcitranslation2 (2 ZettaBytes), low 32 …
26 #define SSB_PCIE_DMA_H32 0x80000000U /* PCIE Client Mode sb2pcitranslation2 (2 ZettaBytes), high 32…
33 #define SSB_MAX_NR_CORES ((SSB_ENUM_LIMIT - SSB_ENUM_BASE) / SSB_CORE_SIZE)
99 #define SSB_TMSLOW 0x0F98 /* SB Target State Low */
105 #define SSB_TMSLOW_PE 0x40000000 /* Power Management Enable */
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mfd/
H A Dqcom-rpm.txt1 Qualcomm Resource Power Manager (RPM)
3 This driver is used to interface with the Resource Power Manager (RPM) found in
8 - compatible:
12 "qcom,rpm-apq8064"
13 "qcom,rpm-msm8660"
14 "qcom,rpm-msm8960"
15 "qcom,rpm-ipq8064"
16 "qcom,rpm-mdm9615"
18 - reg:
20 Value type: <prop-encoded-array>
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H A Dmax77620.txt1 MAX77620 Power management IC from Maxim Semiconductor.
4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/msm/
H A Dqcom,idle-state.txt3 ARM provides idle-state node to define the cpuidle states, as defined in [1].
4 cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle
6 The idle states supported by the QCOM SoC are defined as -
10 * Standalone Power Collapse (Standalone PC or SPC)
11 * Power Collapse (PC)
26 Retention: Retention is a low power state where the core is clock gated and
33 Standalone PC: A cpu can power down and warmboot if there is a sufficient time
34 between the time it enters idle and the next known wake up. SPC mode is used
35 to indicate a core entering a power down state without consulting any other
36 cpu or the system resources. This helps save power only on that core. The SPM
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/regulator/
H A Dmax77802.txt3 This is a part of device tree bindings of MAX77802 multi-function device.
6 The MAX77802 PMIC has 10 high-efficiency Buck and 32 Low-dropout (LDO)
12 - inb1-supply: The input supply for BUCK1
13 - inb2-supply: The input supply for BUCK2
14 - inb3-supply: The input supply for BUCK3
15 - inb4-supply: The input supply for BUCK4
16 - inb5-supply: The input supply for BUCK5
17 - inb6-supply: The input supply for BUCK6
18 - inb7-supply: The input supply for BUCK7
19 - inb8-supply: The input supply for BUCK8
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ti/
H A Ddpll.txt3 Binding status: Unstable - ABI compatibility may be broken in the future
6 register-mapped DPLL with usually two selectable input clocks
10 modes (locked, low power stop etc.) This binding has several
11 sub-types, which effectively result in slightly different setup
14 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
17 - compatible : shall be one of:
18 "ti,omap3-dpll-clock",
19 "ti,omap3-dpll-core-clock",
20 "ti,omap3-dpll-per-clock",
21 "ti,omap3-dpll-per-j-type-clock",
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/OK3568_Linux_fs/kernel/include/soc/at91/
H A Dat91sam9_ddrsdr.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 #define AT91_DDRSDRC_MR 0x00 /* Mode Register */
12 #define AT91_DDRSDRC_MODE (0x7 << 0) /* Command Mode */
46 #define AT91_DDRSDRC_OCD (1 << 12) /* Off-Chip Driver [SAM9 Only] */
59 #define AT91_DDRSDRC_TMRD (0xf << 28) /* Load mode to active/refresh delay */
63 #define AT91_DDRSDRC_TXSNR (0xff << 8) /* Exit self-refresh to non-read */
64 #define AT91_DDRSDRC_TXSRD (0xff << 16) /* Exit self-refresh to read */
65 #define AT91_DDRSDRC_TXP (0xf << 24) /* Exit power-down delay */
68 #define AT91_DDRSDRC_TXARD (0xf << 0) /* Exit active power down delay to read command in mode "F…
69 #define AT91_DDRSDRC_TXARDS (0xf << 4) /* Exit active power down delay to read command in mode "…
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