xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/input/iqs269a.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/input/iqs269a.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Azoteq IQS269A Capacitive Touch Controller
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Jeff LaBundy <jeff@labundy.com>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyundescription: |
13*4882a593Smuzhiyun  The Azoteq IQS269A is an 8-channel capacitive touch controller that features
14*4882a593Smuzhiyun  additional Hall-effect and inductive sensing capabilities.
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun  Link to datasheet: https://www.azoteq.com/
17*4882a593Smuzhiyun
18*4882a593Smuzhiyunproperties:
19*4882a593Smuzhiyun  compatible:
20*4882a593Smuzhiyun    const: azoteq,iqs269a
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun  reg:
23*4882a593Smuzhiyun    maxItems: 1
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun  interrupts:
26*4882a593Smuzhiyun    maxItems: 1
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun  "#address-cells":
29*4882a593Smuzhiyun    const: 1
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun  "#size-cells":
32*4882a593Smuzhiyun    const: 0
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun  azoteq,hall-enable:
35*4882a593Smuzhiyun    type: boolean
36*4882a593Smuzhiyun    description:
37*4882a593Smuzhiyun      Enables Hall-effect sensing on channels 6 and 7. In this case, keycodes
38*4882a593Smuzhiyun      assigned to channel 6 are ignored and keycodes assigned to channel 7 are
39*4882a593Smuzhiyun      interpreted as switch codes. Refer to the datasheet for requirements im-
40*4882a593Smuzhiyun      posed on channels 6 and 7 by Hall-effect sensing.
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun  azoteq,suspend-mode:
43*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
44*4882a593Smuzhiyun    enum: [0, 1, 2, 3]
45*4882a593Smuzhiyun    default: 0
46*4882a593Smuzhiyun    description: |
47*4882a593Smuzhiyun      Specifies the power mode during suspend as follows:
48*4882a593Smuzhiyun      0: Automatic (same as normal runtime, i.e. suspend/resume disabled)
49*4882a593Smuzhiyun      1: Low power (all sensing at a reduced reporting rate)
50*4882a593Smuzhiyun      2: Ultra-low power (channel 0 proximity sensing)
51*4882a593Smuzhiyun      3: Halt (no sensing)
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun  azoteq,clk-div:
54*4882a593Smuzhiyun    type: boolean
55*4882a593Smuzhiyun    description: Divides the device's core clock by a factor of 4.
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun  azoteq,ulp-update:
58*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
59*4882a593Smuzhiyun    minimum: 0
60*4882a593Smuzhiyun    maximum: 7
61*4882a593Smuzhiyun    default: 3
62*4882a593Smuzhiyun    description: Specifies the ultra-low-power mode update rate.
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun  azoteq,reseed-offset:
65*4882a593Smuzhiyun    type: boolean
66*4882a593Smuzhiyun    description:
67*4882a593Smuzhiyun      Applies an 8-count offset to all long-term averages upon either ATI or
68*4882a593Smuzhiyun      reseed events.
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun  azoteq,filt-str-lp-lta:
71*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
72*4882a593Smuzhiyun    enum: [0, 1, 2, 3]
73*4882a593Smuzhiyun    default: 0
74*4882a593Smuzhiyun    description:
75*4882a593Smuzhiyun      Specifies the long-term average filter strength during low-power mode.
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun  azoteq,filt-str-lp-cnt:
78*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
79*4882a593Smuzhiyun    enum: [0, 1, 2, 3]
80*4882a593Smuzhiyun    default: 0
81*4882a593Smuzhiyun    description:
82*4882a593Smuzhiyun      Specifies the raw count filter strength during low-power mode.
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun  azoteq,filt-str-np-lta:
85*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
86*4882a593Smuzhiyun    enum: [0, 1, 2, 3]
87*4882a593Smuzhiyun    default: 0
88*4882a593Smuzhiyun    description:
89*4882a593Smuzhiyun      Specifies the long-term average filter strength during normal-power mode.
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun  azoteq,filt-str-np-cnt:
92*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
93*4882a593Smuzhiyun    enum: [0, 1, 2, 3]
94*4882a593Smuzhiyun    default: 0
95*4882a593Smuzhiyun    description:
96*4882a593Smuzhiyun      Specifies the raw count filter strength during normal-power mode.
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun  azoteq,rate-np-ms:
99*4882a593Smuzhiyun    minimum: 0
100*4882a593Smuzhiyun    maximum: 255
101*4882a593Smuzhiyun    default: 16
102*4882a593Smuzhiyun    description: Specifies the report rate (in ms) during normal-power mode.
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun  azoteq,rate-lp-ms:
105*4882a593Smuzhiyun    minimum: 0
106*4882a593Smuzhiyun    maximum: 255
107*4882a593Smuzhiyun    default: 160
108*4882a593Smuzhiyun    description: Specifies the report rate (in ms) during low-power mode.
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun  azoteq,rate-ulp-ms:
111*4882a593Smuzhiyun    multipleOf: 16
112*4882a593Smuzhiyun    minimum: 0
113*4882a593Smuzhiyun    maximum: 4080
114*4882a593Smuzhiyun    default: 160
115*4882a593Smuzhiyun    description: Specifies the report rate (in ms) during ultra-low-power mode.
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun  azoteq,timeout-pwr-ms:
118*4882a593Smuzhiyun    multipleOf: 512
119*4882a593Smuzhiyun    minimum: 0
120*4882a593Smuzhiyun    maximum: 130560
121*4882a593Smuzhiyun    default: 2560
122*4882a593Smuzhiyun    description:
123*4882a593Smuzhiyun      Specifies the length of time (in ms) to wait for an event during normal-
124*4882a593Smuzhiyun      power mode before transitioning to low-power mode.
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun  azoteq,timeout-lta-ms:
127*4882a593Smuzhiyun    multipleOf: 512
128*4882a593Smuzhiyun    minimum: 0
129*4882a593Smuzhiyun    maximum: 130560
130*4882a593Smuzhiyun    default: 32768
131*4882a593Smuzhiyun    description:
132*4882a593Smuzhiyun      Specifies the length of time (in ms) to wait before resetting the long-
133*4882a593Smuzhiyun      term average of all channels. Specify the maximum timeout to disable it
134*4882a593Smuzhiyun      altogether.
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun  azoteq,ati-band-disable:
137*4882a593Smuzhiyun    type: boolean
138*4882a593Smuzhiyun    description: Disables the ATI band check.
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun  azoteq,ati-lp-only:
141*4882a593Smuzhiyun    type: boolean
142*4882a593Smuzhiyun    description: Limits automatic ATI to low-power mode.
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun  azoteq,ati-band-tighten:
145*4882a593Smuzhiyun    type: boolean
146*4882a593Smuzhiyun    description: Tightens the ATI band from 1/8 to 1/16 of the desired target.
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun  azoteq,filt-disable:
149*4882a593Smuzhiyun    type: boolean
150*4882a593Smuzhiyun    description: Disables all raw count filtering.
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun  azoteq,gpio3-select:
153*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
154*4882a593Smuzhiyun    minimum: 0
155*4882a593Smuzhiyun    maximum: 7
156*4882a593Smuzhiyun    default: 0
157*4882a593Smuzhiyun    description:
158*4882a593Smuzhiyun      Selects the channel for which the GPIO3 pin represents touch state.
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun  azoteq,dual-direction:
161*4882a593Smuzhiyun    type: boolean
162*4882a593Smuzhiyun    description:
163*4882a593Smuzhiyun      Specifies that long-term averages are to freeze in the presence of either
164*4882a593Smuzhiyun      increasing or decreasing counts, thereby permitting events to be reported
165*4882a593Smuzhiyun      in either direction.
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun  azoteq,tx-freq:
168*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
169*4882a593Smuzhiyun    enum: [0, 1, 2, 3]
170*4882a593Smuzhiyun    default: 0
171*4882a593Smuzhiyun    description: |
172*4882a593Smuzhiyun      Specifies the inductive sensing excitation frequency as follows (paren-
173*4882a593Smuzhiyun      thesized numbers represent the frequency if 'azoteq,clk-div' is present):
174*4882a593Smuzhiyun      0: 16 MHz (4 MHz)
175*4882a593Smuzhiyun      1: 8 MHz (2 MHz)
176*4882a593Smuzhiyun      2: 4 MHz (1 MHz)
177*4882a593Smuzhiyun      3: 2 MHz (500 kHz)
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun  azoteq,global-cap-increase:
180*4882a593Smuzhiyun    type: boolean
181*4882a593Smuzhiyun    description: Increases the global capacitance adder from 0.5 pF to 1.5 pF.
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun  azoteq,reseed-select:
184*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
185*4882a593Smuzhiyun    enum: [0, 1, 2, 3]
186*4882a593Smuzhiyun    default: 0
187*4882a593Smuzhiyun    description: |
188*4882a593Smuzhiyun      Specifies the event(s) that prompt the device to reseed (i.e. reset the
189*4882a593Smuzhiyun      long-term average) of an associated channel as follows:
190*4882a593Smuzhiyun      0: None
191*4882a593Smuzhiyun      1: Proximity
192*4882a593Smuzhiyun      2: Proximity or touch
193*4882a593Smuzhiyun      3: Proximity, touch or deep touch
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun  azoteq,tracking-enable:
196*4882a593Smuzhiyun    type: boolean
197*4882a593Smuzhiyun    description:
198*4882a593Smuzhiyun      Enables all associated channels to track their respective reference
199*4882a593Smuzhiyun      channels.
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun  azoteq,filt-str-slider:
202*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
203*4882a593Smuzhiyun    enum: [0, 1, 2, 3]
204*4882a593Smuzhiyun    default: 1
205*4882a593Smuzhiyun    description: Specifies the slider coordinate filter strength.
206*4882a593Smuzhiyun
207*4882a593SmuzhiyunpatternProperties:
208*4882a593Smuzhiyun  "^channel@[0-7]$":
209*4882a593Smuzhiyun    type: object
210*4882a593Smuzhiyun    description:
211*4882a593Smuzhiyun      Represents a single sensing channel. A channel is active if defined and
212*4882a593Smuzhiyun      inactive otherwise.
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun    properties:
215*4882a593Smuzhiyun      reg:
216*4882a593Smuzhiyun        minimum: 0
217*4882a593Smuzhiyun        maximum: 7
218*4882a593Smuzhiyun        description: Index of the channel.
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun      azoteq,reseed-disable:
221*4882a593Smuzhiyun        type: boolean
222*4882a593Smuzhiyun        description:
223*4882a593Smuzhiyun          Prevents the channel from being reseeded if the long-term average
224*4882a593Smuzhiyun          timeout (defined in 'azoteq,timeout-lta') expires.
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun      azoteq,blocking-enable:
227*4882a593Smuzhiyun        type: boolean
228*4882a593Smuzhiyun        description: Specifies that the channel is a blocking channel.
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun      azoteq,slider0-select:
231*4882a593Smuzhiyun        type: boolean
232*4882a593Smuzhiyun        description: Specifies that the channel participates in slider 0.
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun      azoteq,slider1-select:
235*4882a593Smuzhiyun        type: boolean
236*4882a593Smuzhiyun        description: Specifies that the channel participates in slider 1.
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun      azoteq,rx-enable:
239*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/uint32-array
240*4882a593Smuzhiyun        minItems: 1
241*4882a593Smuzhiyun        maxItems: 8
242*4882a593Smuzhiyun        items:
243*4882a593Smuzhiyun          minimum: 0
244*4882a593Smuzhiyun          maximum: 7
245*4882a593Smuzhiyun        description:
246*4882a593Smuzhiyun          Specifies the CRX pin(s) associated with the channel. By default, only
247*4882a593Smuzhiyun          the CRX pin corresponding to the channel's index is enabled (e.g. CRX0
248*4882a593Smuzhiyun          for channel 0).
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun      azoteq,tx-enable:
251*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/uint32-array
252*4882a593Smuzhiyun        minItems: 1
253*4882a593Smuzhiyun        maxItems: 8
254*4882a593Smuzhiyun        items:
255*4882a593Smuzhiyun          minimum: 0
256*4882a593Smuzhiyun          maximum: 7
257*4882a593Smuzhiyun        default: [0, 1, 2, 3, 4, 5, 6, 7]
258*4882a593Smuzhiyun        description: Specifies the TX pin(s) associated with the channel.
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun      azoteq,meas-cap-decrease:
261*4882a593Smuzhiyun        type: boolean
262*4882a593Smuzhiyun        description:
263*4882a593Smuzhiyun          Decreases the internal measurement capacitance from 60 pF to 15 pF.
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun      azoteq,rx-float-inactive:
266*4882a593Smuzhiyun        type: boolean
267*4882a593Smuzhiyun        description: Floats any inactive CRX pins instead of grounding them.
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun      azoteq,local-cap-size:
270*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/uint32
271*4882a593Smuzhiyun        enum: [0, 1, 2]
272*4882a593Smuzhiyun        default: 0
273*4882a593Smuzhiyun        description: |
274*4882a593Smuzhiyun          Specifies the capacitance to be added to the channel as follows:
275*4882a593Smuzhiyun          0: None
276*4882a593Smuzhiyun          1: Global adder (based on 'azoteq,global-cap-increase')
277*4882a593Smuzhiyun          2: Global adder + 0.5 pF
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun      azoteq,invert-enable:
280*4882a593Smuzhiyun        type: boolean
281*4882a593Smuzhiyun        description:
282*4882a593Smuzhiyun          Inverts the polarity of the states reported for proximity, touch and
283*4882a593Smuzhiyun          deep-touch events relative to their respective thresholds.
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun      azoteq,proj-bias:
286*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/uint32
287*4882a593Smuzhiyun        enum: [0, 1, 2, 3]
288*4882a593Smuzhiyun        default: 2
289*4882a593Smuzhiyun        description: |
290*4882a593Smuzhiyun          Specifies the bias current applied during projected-capacitance
291*4882a593Smuzhiyun          sensing as follows:
292*4882a593Smuzhiyun          0: 2.5 uA
293*4882a593Smuzhiyun          1: 5 uA
294*4882a593Smuzhiyun          2: 10 uA
295*4882a593Smuzhiyun          3: 20 uA
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun      azoteq,sense-mode:
298*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/uint32
299*4882a593Smuzhiyun        enum: [0, 1, 9, 14, 15]
300*4882a593Smuzhiyun        default: 0
301*4882a593Smuzhiyun        description: |
302*4882a593Smuzhiyun          Specifies the channel's sensing mode as follows:
303*4882a593Smuzhiyun          0:  Self capacitance
304*4882a593Smuzhiyun          1:  Projected capacitance
305*4882a593Smuzhiyun          9:  Self or mutual inductance
306*4882a593Smuzhiyun          14: Hall effect
307*4882a593Smuzhiyun          15: Temperature
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun      azoteq,sense-freq:
310*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/uint32
311*4882a593Smuzhiyun        enum: [0, 1, 2, 3]
312*4882a593Smuzhiyun        default: 1
313*4882a593Smuzhiyun        description: |
314*4882a593Smuzhiyun          Specifies the channel's sensing frequency as follows (parenthesized
315*4882a593Smuzhiyun          numbers represent the frequency if 'azoteq,clk-div' is present):
316*4882a593Smuzhiyun          0: 4 MHz (1 MHz)
317*4882a593Smuzhiyun          1: 2 MHz (500 kHz)
318*4882a593Smuzhiyun          2: 1 MHz (250 kHz)
319*4882a593Smuzhiyun          3: 500 kHz (125 kHz)
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun      azoteq,static-enable:
322*4882a593Smuzhiyun        type: boolean
323*4882a593Smuzhiyun        description: Enables the static front-end for the channel.
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun      azoteq,ati-mode:
326*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/uint32
327*4882a593Smuzhiyun        enum: [0, 1, 2, 3]
328*4882a593Smuzhiyun        default: 3
329*4882a593Smuzhiyun        description: |
330*4882a593Smuzhiyun          Specifies the channel's ATI mode as follows:
331*4882a593Smuzhiyun          0: Disabled
332*4882a593Smuzhiyun          1: Semi-partial
333*4882a593Smuzhiyun          2: Partial
334*4882a593Smuzhiyun          3: Full
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun      azoteq,ati-base:
337*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/uint32
338*4882a593Smuzhiyun        enum: [75, 100, 150, 200]
339*4882a593Smuzhiyun        default: 100
340*4882a593Smuzhiyun        description: Specifies the channel's ATI base.
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun      azoteq,ati-target:
343*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/uint32
344*4882a593Smuzhiyun        multipleOf: 32
345*4882a593Smuzhiyun        minimum: 0
346*4882a593Smuzhiyun        maximum: 2016
347*4882a593Smuzhiyun        default: 512
348*4882a593Smuzhiyun        description: Specifies the channel's ATI target.
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun      azoteq,assoc-select:
351*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/uint32-array
352*4882a593Smuzhiyun        minItems: 1
353*4882a593Smuzhiyun        maxItems: 8
354*4882a593Smuzhiyun        items:
355*4882a593Smuzhiyun          minimum: 0
356*4882a593Smuzhiyun          maximum: 7
357*4882a593Smuzhiyun        description:
358*4882a593Smuzhiyun          Specifies the associated channels for which the channel serves as a
359*4882a593Smuzhiyun          reference channel. By default, no channels are selected.
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun      azoteq,assoc-weight:
362*4882a593Smuzhiyun        $ref: /schemas/types.yaml#/definitions/uint32
363*4882a593Smuzhiyun        minimum: 0
364*4882a593Smuzhiyun        maximum: 255
365*4882a593Smuzhiyun        default: 0
366*4882a593Smuzhiyun        description:
367*4882a593Smuzhiyun          Specifies the channel's impact weight if it acts as an associated
368*4882a593Smuzhiyun          channel (0 = 0% impact, 255 = 200% impact).
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun    patternProperties:
371*4882a593Smuzhiyun      "^event-prox(-alt)?$":
372*4882a593Smuzhiyun        type: object
373*4882a593Smuzhiyun        description:
374*4882a593Smuzhiyun          Represents a proximity event reported by the channel in response to
375*4882a593Smuzhiyun          a decrease in counts. Node names suffixed with '-alt' instead corre-
376*4882a593Smuzhiyun          spond to an increase in counts.
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun          By default, the long-term average tracks an increase in counts such
379*4882a593Smuzhiyun          that only events corresponding to a decrease in counts are reported
380*4882a593Smuzhiyun          (refer to the datasheet for more information).
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun          Specify 'azoteq,dual-direction' to freeze the long-term average when
383*4882a593Smuzhiyun          the counts increase or decrease such that events of either direction
384*4882a593Smuzhiyun          can be reported. Alternatively, specify 'azoteq,invert-enable' to in-
385*4882a593Smuzhiyun          vert the polarity of the states reported by the channel.
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun          Complementary events (e.g. event-touch and event-touch-alt) can both
388*4882a593Smuzhiyun          be present and specify different key or switch codes, but not differ-
389*4882a593Smuzhiyun          ent thresholds or hysteresis (if applicable).
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun        properties:
392*4882a593Smuzhiyun          azoteq,thresh:
393*4882a593Smuzhiyun            $ref: /schemas/types.yaml#/definitions/uint32
394*4882a593Smuzhiyun            minimum: 0
395*4882a593Smuzhiyun            maximum: 255
396*4882a593Smuzhiyun            default: 10
397*4882a593Smuzhiyun            description: Specifies the threshold for the event.
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun          linux,code:
400*4882a593Smuzhiyun            $ref: /schemas/types.yaml#/definitions/uint32
401*4882a593Smuzhiyun            description: Numeric key or switch code associated with the event.
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun        additionalProperties: false
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun      "^event-touch(-alt)?$":
406*4882a593Smuzhiyun        type: object
407*4882a593Smuzhiyun        description: Represents a touch event reported by the channel.
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun        properties:
410*4882a593Smuzhiyun          azoteq,thresh:
411*4882a593Smuzhiyun            $ref: /schemas/types.yaml#/definitions/uint32
412*4882a593Smuzhiyun            minimum: 0
413*4882a593Smuzhiyun            maximum: 255
414*4882a593Smuzhiyun            default: 8
415*4882a593Smuzhiyun            description: Specifies the threshold for the event.
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun          azoteq,hyst:
418*4882a593Smuzhiyun            $ref: /schemas/types.yaml#/definitions/uint32
419*4882a593Smuzhiyun            minimum: 0
420*4882a593Smuzhiyun            maximum: 15
421*4882a593Smuzhiyun            default: 4
422*4882a593Smuzhiyun            description: Specifies the hysteresis for the event.
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun          linux,code:
425*4882a593Smuzhiyun            $ref: /schemas/types.yaml#/definitions/uint32
426*4882a593Smuzhiyun            description: Numeric key or switch code associated with the event.
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun        additionalProperties: false
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun      "^event-deep(-alt)?$":
431*4882a593Smuzhiyun        type: object
432*4882a593Smuzhiyun        description: Represents a deep-touch event reported by the channel.
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun        properties:
435*4882a593Smuzhiyun          azoteq,thresh:
436*4882a593Smuzhiyun            $ref: /schemas/types.yaml#/definitions/uint32
437*4882a593Smuzhiyun            minimum: 0
438*4882a593Smuzhiyun            maximum: 255
439*4882a593Smuzhiyun            default: 26
440*4882a593Smuzhiyun            description: Specifies the threshold for the event.
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun          azoteq,hyst:
443*4882a593Smuzhiyun            $ref: /schemas/types.yaml#/definitions/uint32
444*4882a593Smuzhiyun            minimum: 0
445*4882a593Smuzhiyun            maximum: 15
446*4882a593Smuzhiyun            default: 0
447*4882a593Smuzhiyun            description: Specifies the hysteresis for the event.
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun          linux,code:
450*4882a593Smuzhiyun            $ref: /schemas/types.yaml#/definitions/uint32
451*4882a593Smuzhiyun            description: Numeric key or switch code associated with the event.
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun        additionalProperties: false
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun    required:
456*4882a593Smuzhiyun      - reg
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun    additionalProperties: false
459*4882a593Smuzhiyun
460*4882a593Smuzhiyunrequired:
461*4882a593Smuzhiyun  - compatible
462*4882a593Smuzhiyun  - reg
463*4882a593Smuzhiyun  - interrupts
464*4882a593Smuzhiyun  - "#address-cells"
465*4882a593Smuzhiyun  - "#size-cells"
466*4882a593Smuzhiyun
467*4882a593SmuzhiyunadditionalProperties: false
468*4882a593Smuzhiyun
469*4882a593Smuzhiyunexamples:
470*4882a593Smuzhiyun  - |
471*4882a593Smuzhiyun    #include <dt-bindings/input/input.h>
472*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/irq.h>
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun    i2c {
475*4882a593Smuzhiyun            #address-cells = <1>;
476*4882a593Smuzhiyun            #size-cells = <0>;
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun            iqs269a@44 {
479*4882a593Smuzhiyun                    #address-cells = <1>;
480*4882a593Smuzhiyun                    #size-cells = <0>;
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun                    compatible = "azoteq,iqs269a";
483*4882a593Smuzhiyun                    reg = <0x44>;
484*4882a593Smuzhiyun                    interrupt-parent = <&gpio>;
485*4882a593Smuzhiyun                    interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun                    azoteq,hall-enable;
488*4882a593Smuzhiyun                    azoteq,suspend-mode = <2>;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun                    channel@0 {
491*4882a593Smuzhiyun                            reg = <0x0>;
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun                            event-prox {
494*4882a593Smuzhiyun                                    linux,code = <KEY_POWER>;
495*4882a593Smuzhiyun                            };
496*4882a593Smuzhiyun                    };
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun                    channel@1 {
499*4882a593Smuzhiyun                            reg = <0x1>;
500*4882a593Smuzhiyun                            azoteq,slider0-select;
501*4882a593Smuzhiyun                    };
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun                    channel@2 {
504*4882a593Smuzhiyun                            reg = <0x2>;
505*4882a593Smuzhiyun                            azoteq,slider0-select;
506*4882a593Smuzhiyun                    };
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun                    channel@3 {
509*4882a593Smuzhiyun                            reg = <0x3>;
510*4882a593Smuzhiyun                            azoteq,slider0-select;
511*4882a593Smuzhiyun                    };
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun                    channel@4 {
514*4882a593Smuzhiyun                            reg = <0x4>;
515*4882a593Smuzhiyun                            azoteq,slider0-select;
516*4882a593Smuzhiyun                    };
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun                    channel@5 {
519*4882a593Smuzhiyun                            reg = <0x5>;
520*4882a593Smuzhiyun                            azoteq,slider0-select;
521*4882a593Smuzhiyun                    };
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun                    channel@6 {
524*4882a593Smuzhiyun                            reg = <0x6>;
525*4882a593Smuzhiyun                            azoteq,invert-enable;
526*4882a593Smuzhiyun                            azoteq,static-enable;
527*4882a593Smuzhiyun                            azoteq,reseed-disable;
528*4882a593Smuzhiyun                            azoteq,rx-enable = <0>;
529*4882a593Smuzhiyun                            azoteq,sense-freq = <0x0>;
530*4882a593Smuzhiyun                            azoteq,sense-mode = <0xE>;
531*4882a593Smuzhiyun                            azoteq,ati-mode = <0x0>;
532*4882a593Smuzhiyun                            azoteq,ati-base = <200>;
533*4882a593Smuzhiyun                            azoteq,ati-target = <320>;
534*4882a593Smuzhiyun                    };
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun                    channel@7 {
537*4882a593Smuzhiyun                            reg = <0x7>;
538*4882a593Smuzhiyun                            azoteq,invert-enable;
539*4882a593Smuzhiyun                            azoteq,static-enable;
540*4882a593Smuzhiyun                            azoteq,reseed-disable;
541*4882a593Smuzhiyun                            azoteq,rx-enable = <0>, <6>;
542*4882a593Smuzhiyun                            azoteq,sense-freq = <0x0>;
543*4882a593Smuzhiyun                            azoteq,sense-mode = <0xE>;
544*4882a593Smuzhiyun                            azoteq,ati-mode = <0x3>;
545*4882a593Smuzhiyun                            azoteq,ati-base = <200>;
546*4882a593Smuzhiyun                            azoteq,ati-target = <320>;
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun                            event-touch {
549*4882a593Smuzhiyun                                    linux,code = <SW_LID>;
550*4882a593Smuzhiyun                            };
551*4882a593Smuzhiyun                    };
552*4882a593Smuzhiyun            };
553*4882a593Smuzhiyun    };
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun...
556