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/OK3568_Linux_fs/kernel/drivers/staging/fbtft/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 tristate "Support for small TFT LCD display modules"
14 tristate "FB driver for the AGM1264K-FL LCD display"
17 Framebuffer support for the AGM1264K-FL LCD display (two Samsung KS0108 compatible chips)
20 tristate "FB driver for the BD663474 LCD Controller"
26 tristate "FB driver for the HX8340BN LCD Controller"
32 tristate "FB driver for the HX8347D LCD Controller"
38 tristate "FB driver for the HX8353D LCD Controller"
44 tristate "FB driver for the HX8357D LCD Controller"
50 tristate "FB driver for the ILI9163 LCD Controller"
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-sunxi/
H A DKconfig4 default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM64
12 ---help---
24 ---help---
26 as the original A10 (mach-sun4i).
30 ---help---
37 ---help---
38 Select this for sunxi SoCs which uses a DRAM controller like the
39 DesignWare controller used in H3, mainly SoCs after H3, which do
40 not have official open-source DRAM initialization code, but can
46 ---help---
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/
H A Dallwinner,sun4i-a10-tcon.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Timings Controller (TCON) Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 The TCON acts as a timing controller for RGB, LVDS and TV
18 "#clock-cells":
23 - const: allwinner,sun4i-a10-tcon
[all …]
H A Dingenic,lcd.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/ingenic,lcd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs LCD controller devicetree bindings
10 - Paul Cercueil <paul@crapouillou.net>
14 pattern: "^lcd-controller@[0-9a-f]+$"
18 - ingenic,jz4740-lcd
19 - ingenic,jz4725b-lcd
20 - ingenic,jz4770-lcd
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H A Dmarvell,pxa2xx-lcdc.txt1 PXA LCD Controller
2 ------------------
5 - compatible : one of these
6 "marvell,pxa2xx-lcdc",
7 "marvell,pxa270-lcdc",
8 "marvell,pxa300-lcdc"
9 - reg : should contain 1 register range (address and length).
10 - interrupts : framebuffer controller interrupt.
11 - clocks: phandle to input clocks
14 - lcd-supply: A phandle to a power regulator that controls the LCD voltage.
[all …]
H A Datmel,lcdc.txt2 -----------------------------------------------------
5 - compatible :
6 "atmel,at91sam9261-lcdc" ,
7 "atmel,at91sam9263-lcdc" ,
8 "atmel,at91sam9g10-lcdc" ,
9 "atmel,at91sam9g45-lcdc" ,
10 "atmel,at91sam9g45es-lcdc" ,
11 "atmel,at91sam9rl-lcdc" ,
12 "atmel,at32ap-lcdc"
13 - reg : Should contain 1 register ranges(address and length).
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/panel/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
38 TFT-LCD modules. The panel has a 1200x1920 resolution and uses
40 the host and has a built-in LED backlight.
57 This driver supports LVDS panels that don't require device-specific
59 backlight handling if the panel is attached to a backlight controller.
79 KD35T133 controller for 320x480 LCD panels with MIPI-DSI
89 4-lane 800x1280 MIPI DSI panel.
92 tristate "Feiyang FY07024DI26A30-D MIPI-DSI LCD panel"
98 Feiyang FY07024DI26A30-D MIPI-DSI interface.
106 QVGA (320x240) RGB, YUV and ITU-T BT.656 panels.
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/OK3568_Linux_fs/kernel/drivers/video/fbdev/omap/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 bool "External LCD controller support"
17 external LCD controller connected to the SoSSI/RFBI interface.
20 bool "Epson HWA742 LCD controller support"
24 Epson HWA742 LCD controller.
30 Say Y here, if your user-space applications are capable of
36 bool "MIPI DBI-C/DCS compatible LCD support"
40 the Mobile Industry Processor Interface DBI-C/DCS
44 bool "TPS65010 LCD controller on OMAP-H3"
49 Say Y here if you want to have support for the LCD on the
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/panel/
H A Dolimex,lcd-olinuxino.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/olimex,lcd-olinuxino.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Binding for Olimex Ltd. LCD-OLinuXino bridge panel.
10 - Stefan Mavrodiev <stefan@olimex.com>
13 This device can be used as bridge between a host controller and LCD panels.
15 - LCD-OLinuXino-4.3TS
16 - LCD-OLinuXino-5
17 - LCD-OLinuXino-7
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/auxdisplay/
H A Dhit,hd44780.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hitachi HD44780 Character LCD Controller
10 - Geert Uytterhoeven <geert@linux-m68k.org>
13 The Hitachi HD44780 Character LCD Controller is commonly used on character
15 interface, which can be used in either 4-bit or 8-bit mode.
21 data-gpios:
23 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or
24 DB4-DB7 (4-bit mode) of the LCD Controller's bus interface.
[all …]
H A Dimg-ascii-lcd.txt1 Binding for ASCII LCD displays on Imagination Technologies boards
4 - compatible : should be one of:
5 "img,boston-lcd"
6 "mti,malta-lcd"
7 "mti,sead3-lcd"
9 Required properties for "img,boston-lcd":
10 - reg : memory region locating the device registers
12 Required properties for "mti,malta-lcd" or "mti,sead3-lcd":
13 - regmap: phandle of the system controller containing the LCD registers
14 - offset: offset in bytes to the LCD registers within the system controller
/OK3568_Linux_fs/kernel/Documentation/admin-guide/auxdisplay/
H A Dks0108.rst2 ks0108 LCD Controller Driver Documentation
7 :Date: 2006-10-27
19 ---------------------
21 This driver supports the ks0108 LCD controller.
25 ---------------------
28 :Device Name: KS0108 LCD Controller
30 :Webpage: -
31 :Device Webpage: -
32 :Type: LCD Controller (Liquid Crystal Display Controller)
43 ---------
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/OK3568_Linux_fs/kernel/drivers/video/backlight/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Backlight & LCD drivers configuration
6 menu "Backlight & LCD device support"
9 # LCD
12 tristate "Lowlevel LCD controls"
14 This framework adds support for low-level control of LCD.
15 Some framebuffer devices connect to platform-specific LCD modules
16 in order to have a platform-specific way to control the flat panel
17 (contrast and applying power to the LCD (not to the backlight!)).
19 To have support for your specific LCD panel you will have to
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H A Dhx8357.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for the Himax HX-8357 LCD Controller
9 #include <linux/lcd.h>
217 struct hx8357_data *lcd = lcd_get_data(lcdev); in hx8357_spi_write_then_read() local
232 return -ENOMEM; in hx8357_spi_write_then_read()
253 ret = spi_sync(lcd->spi, &msg); in hx8357_spi_write_then_read()
255 dev_err(&lcdev->dev, "Couldn't send SPI data\n"); in hx8357_spi_write_then_read()
290 * The controller needs 120ms when entering in sleep mode before we can in hx8357_enter_standby()
307 * The controller needs 120ms when exiting from sleep mode before we in hx8357_exit_standby()
321 struct hx8357_data *lcd = lcd_get_data(lcdev); in hx8357_lcd_reset() local
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-pxa/include/mach/
H A Dregs-lcd.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * LCD Controller Registers and Bits Definitions
10 #define LCCR0 (0x000) /* LCD Controller Control Register 0 */
11 #define LCCR1 (0x004) /* LCD Controller Control Register 1 */
12 #define LCCR2 (0x008) /* LCD Controller Control Register 2 */
13 #define LCCR3 (0x00C) /* LCD Controller Control Register 3 */
14 #define LCCR4 (0x010) /* LCD Controller Control Register 4 */
15 #define LCCR5 (0x014) /* LCD Controller Control Register 5 */
16 #define LCSR (0x038) /* LCD Controller Status Register 0 */
17 #define LCSR1 (0x034) /* LCD Controller Status Register 1 */
[all …]
/OK3568_Linux_fs/kernel/Documentation/admin-guide/media/
H A Ddavinci-vpbe.rst1 .. SPDX-License-Identifier: GPL-2.0
7 -----------------------
16 2. Display controller
22 using sub device ops. The connection of external encoders to VENC LCD
23 controller port is done at init time based on default output and standard
27 When connected to an external encoder, vpbe controller is also responsible
29 board specific settings (specified in board-xxx-evm.c). This allows
39 setting timings at LCD controller port when external encoders are connected
40 at the port or LCD panel timings required. When external encoder/LCD panel
43 venc using non-standard timing mode.
[all …]
/OK3568_Linux_fs/kernel/drivers/auxdisplay/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 # see Documentation/kbuild/kconfig-language.rst.
20 tristate "HD44780 Character LCD support"
24 Enable support for Character LCDs using a HD44780 controller.
25 The LCD is accessible through the /dev/lcd char device (10, 156).
31 tristate "KS0108 LCD Controller"
35 If you have a LCD controlled by one or more KS0108
37 driver for your LCD.
41 and built-in as well (Y).
49 hex "Parallel port where the LCD is connected"
[all …]
H A Darm-charlcd.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the on-board character LCD found on some ARM reference boards
4 * This is basically an Hitachi HD44780 LCD with a custom IP block to drive it
21 #define DRIVERNAME "arm-charlcd"
57 * struct charlcd - Private data structure
59 * @phybase: the offset to the controller in physical memory
61 * @virtbase: the offset to the controller in virtual memory
63 * @complete: completion structure for the last LCD command
78 struct charlcd *lcd = data; in charlcd_interrupt() local
81 status = readl(lcd->virtbase + CHAR_STAT) & 0x01; in charlcd_interrupt()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/armada/
H A Dmarvell,dove-lcd.txt4 - compatible: value should be "marvell,dove-lcd".
5 - reg: base address and size of the LCD controller
6 - interrupts: single interrupt number for the LCD controller
7 - port: video output port with endpoints, as described by graph.txt
11 - clocks: as described by clock-bindings.txt
12 - clock-names: as described by clock-bindings.txt
13 "axiclk" - axi bus clock for pixel clock
14 "plldivider" - pll divider clock for pixel clock
15 "ext_ref_clk0" - external clock 0 for pixel clock
16 "ext_ref_clk1" - external clock 1 for pixel clock
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * FILE SA-1100.h
9 * System StrongARM SA-1100
12 * SA-1100 microprocessor (Advanced RISC Machine (ARM)
14 * StrongARM SA-1100 data sheet version 2.2.
21 #error You must include hardware.h not SA-1100.h
77 * Universal Serial Bus (USB) Device Controller (UDC) control registers
81 * Controller (UDC) Control Register (read/write).
83 * Controller (UDC) Address Register (read/write).
85 * Controller (UDC) Output Maximum Packet size register
[all …]
/OK3568_Linux_fs/kernel/drivers/video/fbdev/
H A Dau1200fb.c3 * Au1200 LCD Driver.
5 * Copyright 2004-2005 AMD
9 * linux/drivers/video/skeletonfb.c -- Skeleton for a frame buffer device
44 #include <linux/dma-mapping.h>
48 #include <asm/mach-au1x00/au1000.h>
49 #include <asm/mach-au1x00/au1200fb.h> /* platform_data */
53 #define DRIVER_DESC "LCD controller driver for AU1200 processors"
146 /* Private, per-framebuffer management information (independent of the panel itself) */
160 /* LCD controller restrictions */
179 static struct au1200_lcd *lcd = (struct au1200_lcd *) AU1200_LCD_ADDR; variable
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H A Dsa1100fb.c11 * StrongARM 1100 LCD Controller Frame Buffer Driver
16 * linux-arm-kernel@lists.arm.linux.org.uk
26 * - With the Neponset plugged into an Assabet, LCD powerdown
27 * doesn't work (LCD stays powered up). Therefore we shouldn't
29 * - We don't limit the CPU clock rate nor the mode selection
33 * - Linear grayscale palettes and the kernel.
44 * - The following must never be specified in a panel definition:
47 * - The following should be specified:
57 * - Driver appears to be working for Brutus 320x200x8bpp mode. Other
66 * - FrameBuffer memory is now allocated at run-time when the
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/include/mach/
H A Dmipi_dsim.h7 * SPDX-License-Identifier: GPL-2.0+
15 #include <lcd.h>
63 /* MIPI DSI Processor-to-Peripheral transaction types */
112 * struct mipi_dsim_config - interface for configuring mipi-dsi controller.
140 * in Non-burst mode, RGB data area is filled with RGB data and NULL
155 * BTA requests to D-PHY automatically. this counter value specifies
163 * - RxValid specifies Rx data valid indicator.
164 * - RxLpdt specifies an indicator that D-PHY is under RxLpdt mode.
165 * - RxValid and RxLpdt specifies signal from D-PHY.
187 * -------------------------------------------
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/OK3568_Linux_fs/u-boot/include/
H A Dpxa_lcd.h2 * pxa_lcd.h - PXA LCD Controller structures
7 * SPDX-License-Identifier: GPL-2.0+
14 * PXA LCD DMA descriptor
24 * PXA LCD info
46 * LCD controller stucture for PXA CPU
55 /* LCD configuration register */
62 u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */
63 u_char vl_splt;/* Split display, 0 = single-scan, 1 = dual-scan */
77 /* PXA LCD controller params */
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dat91sam9x5_lcd.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9x5_lcd.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an
4 * LCD controller.
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
16 compatible = "atmel,at91sam9x5-hlcdc";
20 clock-names = "periph_clk","sys_clk", "slow_clk";
23 hlcdc-display-controller {
24 compatible = "atmel,hlcdc-display-controller";
25 #address-cells = <1>;
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