1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for the on-board character LCD found on some ARM reference boards
4*4882a593Smuzhiyun * This is basically an Hitachi HD44780 LCD with a custom IP block to drive it
5*4882a593Smuzhiyun * https://en.wikipedia.org/wiki/HD44780_Character_LCD
6*4882a593Smuzhiyun * Currently it will just display the text "ARM Linux" and the linux version
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Author: Linus Walleij <triad@df.lth.se>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/interrupt.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <linux/of.h>
14*4882a593Smuzhiyun #include <linux/completion.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/io.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun #include <linux/workqueue.h>
19*4882a593Smuzhiyun #include <generated/utsrelease.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define DRIVERNAME "arm-charlcd"
22*4882a593Smuzhiyun #define CHARLCD_TIMEOUT (msecs_to_jiffies(1000))
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun /* Offsets to registers */
25*4882a593Smuzhiyun #define CHAR_COM 0x00U
26*4882a593Smuzhiyun #define CHAR_DAT 0x04U
27*4882a593Smuzhiyun #define CHAR_RD 0x08U
28*4882a593Smuzhiyun #define CHAR_RAW 0x0CU
29*4882a593Smuzhiyun #define CHAR_MASK 0x10U
30*4882a593Smuzhiyun #define CHAR_STAT 0x14U
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define CHAR_RAW_CLEAR 0x00000000U
33*4882a593Smuzhiyun #define CHAR_RAW_VALID 0x00000100U
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* Hitachi HD44780 display commands */
36*4882a593Smuzhiyun #define HD_CLEAR 0x01U
37*4882a593Smuzhiyun #define HD_HOME 0x02U
38*4882a593Smuzhiyun #define HD_ENTRYMODE 0x04U
39*4882a593Smuzhiyun #define HD_ENTRYMODE_INCREMENT 0x02U
40*4882a593Smuzhiyun #define HD_ENTRYMODE_SHIFT 0x01U
41*4882a593Smuzhiyun #define HD_DISPCTRL 0x08U
42*4882a593Smuzhiyun #define HD_DISPCTRL_ON 0x04U
43*4882a593Smuzhiyun #define HD_DISPCTRL_CURSOR_ON 0x02U
44*4882a593Smuzhiyun #define HD_DISPCTRL_CURSOR_BLINK 0x01U
45*4882a593Smuzhiyun #define HD_CRSR_SHIFT 0x10U
46*4882a593Smuzhiyun #define HD_CRSR_SHIFT_DISPLAY 0x08U
47*4882a593Smuzhiyun #define HD_CRSR_SHIFT_DISPLAY_RIGHT 0x04U
48*4882a593Smuzhiyun #define HD_FUNCSET 0x20U
49*4882a593Smuzhiyun #define HD_FUNCSET_8BIT 0x10U
50*4882a593Smuzhiyun #define HD_FUNCSET_2_LINES 0x08U
51*4882a593Smuzhiyun #define HD_FUNCSET_FONT_5X10 0x04U
52*4882a593Smuzhiyun #define HD_SET_CGRAM 0x40U
53*4882a593Smuzhiyun #define HD_SET_DDRAM 0x80U
54*4882a593Smuzhiyun #define HD_BUSY_FLAG 0x80U
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /**
57*4882a593Smuzhiyun * struct charlcd - Private data structure
58*4882a593Smuzhiyun * @dev: a pointer back to containing device
59*4882a593Smuzhiyun * @phybase: the offset to the controller in physical memory
60*4882a593Smuzhiyun * @physize: the size of the physical page
61*4882a593Smuzhiyun * @virtbase: the offset to the controller in virtual memory
62*4882a593Smuzhiyun * @irq: reserved interrupt number
63*4882a593Smuzhiyun * @complete: completion structure for the last LCD command
64*4882a593Smuzhiyun * @init_work: delayed work structure to initialize the display on boot
65*4882a593Smuzhiyun */
66*4882a593Smuzhiyun struct charlcd {
67*4882a593Smuzhiyun struct device *dev;
68*4882a593Smuzhiyun u32 phybase;
69*4882a593Smuzhiyun u32 physize;
70*4882a593Smuzhiyun void __iomem *virtbase;
71*4882a593Smuzhiyun int irq;
72*4882a593Smuzhiyun struct completion complete;
73*4882a593Smuzhiyun struct delayed_work init_work;
74*4882a593Smuzhiyun };
75*4882a593Smuzhiyun
charlcd_interrupt(int irq,void * data)76*4882a593Smuzhiyun static irqreturn_t charlcd_interrupt(int irq, void *data)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun struct charlcd *lcd = data;
79*4882a593Smuzhiyun u8 status;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun status = readl(lcd->virtbase + CHAR_STAT) & 0x01;
82*4882a593Smuzhiyun /* Clear IRQ */
83*4882a593Smuzhiyun writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
84*4882a593Smuzhiyun if (status)
85*4882a593Smuzhiyun complete(&lcd->complete);
86*4882a593Smuzhiyun else
87*4882a593Smuzhiyun dev_info(lcd->dev, "Spurious IRQ (%02x)\n", status);
88*4882a593Smuzhiyun return IRQ_HANDLED;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun
charlcd_wait_complete_irq(struct charlcd * lcd)92*4882a593Smuzhiyun static void charlcd_wait_complete_irq(struct charlcd *lcd)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun int ret;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun ret = wait_for_completion_interruptible_timeout(&lcd->complete,
97*4882a593Smuzhiyun CHARLCD_TIMEOUT);
98*4882a593Smuzhiyun /* Disable IRQ after completion */
99*4882a593Smuzhiyun writel(0x00, lcd->virtbase + CHAR_MASK);
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun if (ret < 0) {
102*4882a593Smuzhiyun dev_err(lcd->dev,
103*4882a593Smuzhiyun "wait_for_completion_interruptible_timeout() "
104*4882a593Smuzhiyun "returned %d waiting for ready\n", ret);
105*4882a593Smuzhiyun return;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun if (ret == 0) {
109*4882a593Smuzhiyun dev_err(lcd->dev, "charlcd controller timed out "
110*4882a593Smuzhiyun "waiting for ready\n");
111*4882a593Smuzhiyun return;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
charlcd_4bit_read_char(struct charlcd * lcd)115*4882a593Smuzhiyun static u8 charlcd_4bit_read_char(struct charlcd *lcd)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun u8 data;
118*4882a593Smuzhiyun u32 val;
119*4882a593Smuzhiyun int i;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /* If we can, use an IRQ to wait for the data, else poll */
122*4882a593Smuzhiyun if (lcd->irq >= 0)
123*4882a593Smuzhiyun charlcd_wait_complete_irq(lcd);
124*4882a593Smuzhiyun else {
125*4882a593Smuzhiyun i = 0;
126*4882a593Smuzhiyun val = 0;
127*4882a593Smuzhiyun while (!(val & CHAR_RAW_VALID) && i < 10) {
128*4882a593Smuzhiyun udelay(100);
129*4882a593Smuzhiyun val = readl(lcd->virtbase + CHAR_RAW);
130*4882a593Smuzhiyun i++;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun msleep(1);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun /* Read the 4 high bits of the data */
138*4882a593Smuzhiyun data = readl(lcd->virtbase + CHAR_RD) & 0xf0;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /*
141*4882a593Smuzhiyun * The second read for the low bits does not trigger an IRQ
142*4882a593Smuzhiyun * so in this case we have to poll for the 4 lower bits
143*4882a593Smuzhiyun */
144*4882a593Smuzhiyun i = 0;
145*4882a593Smuzhiyun val = 0;
146*4882a593Smuzhiyun while (!(val & CHAR_RAW_VALID) && i < 10) {
147*4882a593Smuzhiyun udelay(100);
148*4882a593Smuzhiyun val = readl(lcd->virtbase + CHAR_RAW);
149*4882a593Smuzhiyun i++;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
152*4882a593Smuzhiyun msleep(1);
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun /* Read the 4 low bits of the data */
155*4882a593Smuzhiyun data |= (readl(lcd->virtbase + CHAR_RD) >> 4) & 0x0f;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun return data;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
charlcd_4bit_read_bf(struct charlcd * lcd)160*4882a593Smuzhiyun static bool charlcd_4bit_read_bf(struct charlcd *lcd)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun if (lcd->irq >= 0) {
163*4882a593Smuzhiyun /*
164*4882a593Smuzhiyun * If we'll use IRQs to wait for the busyflag, clear any
165*4882a593Smuzhiyun * pending flag and enable IRQ
166*4882a593Smuzhiyun */
167*4882a593Smuzhiyun writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW);
168*4882a593Smuzhiyun init_completion(&lcd->complete);
169*4882a593Smuzhiyun writel(0x01, lcd->virtbase + CHAR_MASK);
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun readl(lcd->virtbase + CHAR_COM);
172*4882a593Smuzhiyun return charlcd_4bit_read_char(lcd) & HD_BUSY_FLAG ? true : false;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
charlcd_4bit_wait_busy(struct charlcd * lcd)175*4882a593Smuzhiyun static void charlcd_4bit_wait_busy(struct charlcd *lcd)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun int retries = 50;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun udelay(100);
180*4882a593Smuzhiyun while (charlcd_4bit_read_bf(lcd) && retries)
181*4882a593Smuzhiyun retries--;
182*4882a593Smuzhiyun if (!retries)
183*4882a593Smuzhiyun dev_err(lcd->dev, "timeout waiting for busyflag\n");
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
charlcd_4bit_command(struct charlcd * lcd,u8 cmd)186*4882a593Smuzhiyun static void charlcd_4bit_command(struct charlcd *lcd, u8 cmd)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun u32 cmdlo = (cmd << 4) & 0xf0;
189*4882a593Smuzhiyun u32 cmdhi = (cmd & 0xf0);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun writel(cmdhi, lcd->virtbase + CHAR_COM);
192*4882a593Smuzhiyun udelay(10);
193*4882a593Smuzhiyun writel(cmdlo, lcd->virtbase + CHAR_COM);
194*4882a593Smuzhiyun charlcd_4bit_wait_busy(lcd);
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
charlcd_4bit_char(struct charlcd * lcd,u8 ch)197*4882a593Smuzhiyun static void charlcd_4bit_char(struct charlcd *lcd, u8 ch)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun u32 chlo = (ch << 4) & 0xf0;
200*4882a593Smuzhiyun u32 chhi = (ch & 0xf0);
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun writel(chhi, lcd->virtbase + CHAR_DAT);
203*4882a593Smuzhiyun udelay(10);
204*4882a593Smuzhiyun writel(chlo, lcd->virtbase + CHAR_DAT);
205*4882a593Smuzhiyun charlcd_4bit_wait_busy(lcd);
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
charlcd_4bit_print(struct charlcd * lcd,int line,const char * str)208*4882a593Smuzhiyun static void charlcd_4bit_print(struct charlcd *lcd, int line, const char *str)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun u8 offset;
211*4882a593Smuzhiyun int i;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun /*
214*4882a593Smuzhiyun * We support line 0, 1
215*4882a593Smuzhiyun * Line 1 runs from 0x00..0x27
216*4882a593Smuzhiyun * Line 2 runs from 0x28..0x4f
217*4882a593Smuzhiyun */
218*4882a593Smuzhiyun if (line == 0)
219*4882a593Smuzhiyun offset = 0;
220*4882a593Smuzhiyun else if (line == 1)
221*4882a593Smuzhiyun offset = 0x28;
222*4882a593Smuzhiyun else
223*4882a593Smuzhiyun return;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun /* Set offset */
226*4882a593Smuzhiyun charlcd_4bit_command(lcd, HD_SET_DDRAM | offset);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /* Send string */
229*4882a593Smuzhiyun for (i = 0; i < strlen(str) && i < 0x28; i++)
230*4882a593Smuzhiyun charlcd_4bit_char(lcd, str[i]);
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
charlcd_4bit_init(struct charlcd * lcd)233*4882a593Smuzhiyun static void charlcd_4bit_init(struct charlcd *lcd)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun /* These commands cannot be checked with the busy flag */
236*4882a593Smuzhiyun writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
237*4882a593Smuzhiyun msleep(5);
238*4882a593Smuzhiyun writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
239*4882a593Smuzhiyun udelay(100);
240*4882a593Smuzhiyun writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM);
241*4882a593Smuzhiyun udelay(100);
242*4882a593Smuzhiyun /* Go to 4bit mode */
243*4882a593Smuzhiyun writel(HD_FUNCSET, lcd->virtbase + CHAR_COM);
244*4882a593Smuzhiyun udelay(100);
245*4882a593Smuzhiyun /*
246*4882a593Smuzhiyun * 4bit mode, 2 lines, 5x8 font, after this the number of lines
247*4882a593Smuzhiyun * and the font cannot be changed until the next initialization sequence
248*4882a593Smuzhiyun */
249*4882a593Smuzhiyun charlcd_4bit_command(lcd, HD_FUNCSET | HD_FUNCSET_2_LINES);
250*4882a593Smuzhiyun charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON);
251*4882a593Smuzhiyun charlcd_4bit_command(lcd, HD_ENTRYMODE | HD_ENTRYMODE_INCREMENT);
252*4882a593Smuzhiyun charlcd_4bit_command(lcd, HD_CLEAR);
253*4882a593Smuzhiyun charlcd_4bit_command(lcd, HD_HOME);
254*4882a593Smuzhiyun /* Put something useful in the display */
255*4882a593Smuzhiyun charlcd_4bit_print(lcd, 0, "ARM Linux");
256*4882a593Smuzhiyun charlcd_4bit_print(lcd, 1, UTS_RELEASE);
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun
charlcd_init_work(struct work_struct * work)259*4882a593Smuzhiyun static void charlcd_init_work(struct work_struct *work)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun struct charlcd *lcd =
262*4882a593Smuzhiyun container_of(work, struct charlcd, init_work.work);
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun charlcd_4bit_init(lcd);
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun
charlcd_probe(struct platform_device * pdev)267*4882a593Smuzhiyun static int __init charlcd_probe(struct platform_device *pdev)
268*4882a593Smuzhiyun {
269*4882a593Smuzhiyun int ret;
270*4882a593Smuzhiyun struct charlcd *lcd;
271*4882a593Smuzhiyun struct resource *res;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun lcd = kzalloc(sizeof(struct charlcd), GFP_KERNEL);
274*4882a593Smuzhiyun if (!lcd)
275*4882a593Smuzhiyun return -ENOMEM;
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun lcd->dev = &pdev->dev;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
280*4882a593Smuzhiyun if (!res) {
281*4882a593Smuzhiyun ret = -ENOENT;
282*4882a593Smuzhiyun goto out_no_resource;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun lcd->phybase = res->start;
285*4882a593Smuzhiyun lcd->physize = resource_size(res);
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun if (request_mem_region(lcd->phybase, lcd->physize,
288*4882a593Smuzhiyun DRIVERNAME) == NULL) {
289*4882a593Smuzhiyun ret = -EBUSY;
290*4882a593Smuzhiyun goto out_no_memregion;
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun lcd->virtbase = ioremap(lcd->phybase, lcd->physize);
294*4882a593Smuzhiyun if (!lcd->virtbase) {
295*4882a593Smuzhiyun ret = -ENOMEM;
296*4882a593Smuzhiyun goto out_no_memregion;
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun lcd->irq = platform_get_irq(pdev, 0);
300*4882a593Smuzhiyun /* If no IRQ is supplied, we'll survive without it */
301*4882a593Smuzhiyun if (lcd->irq >= 0) {
302*4882a593Smuzhiyun if (request_irq(lcd->irq, charlcd_interrupt, 0,
303*4882a593Smuzhiyun DRIVERNAME, lcd)) {
304*4882a593Smuzhiyun ret = -EIO;
305*4882a593Smuzhiyun goto out_no_irq;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun platform_set_drvdata(pdev, lcd);
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun /*
312*4882a593Smuzhiyun * Initialize the display in a delayed work, because
313*4882a593Smuzhiyun * it is VERY slow and would slow down the boot of the system.
314*4882a593Smuzhiyun */
315*4882a593Smuzhiyun INIT_DELAYED_WORK(&lcd->init_work, charlcd_init_work);
316*4882a593Smuzhiyun schedule_delayed_work(&lcd->init_work, 0);
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun dev_info(&pdev->dev, "initialized ARM character LCD at %08x\n",
319*4882a593Smuzhiyun lcd->phybase);
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun return 0;
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun out_no_irq:
324*4882a593Smuzhiyun iounmap(lcd->virtbase);
325*4882a593Smuzhiyun out_no_memregion:
326*4882a593Smuzhiyun release_mem_region(lcd->phybase, SZ_4K);
327*4882a593Smuzhiyun out_no_resource:
328*4882a593Smuzhiyun kfree(lcd);
329*4882a593Smuzhiyun return ret;
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
charlcd_suspend(struct device * dev)332*4882a593Smuzhiyun static int charlcd_suspend(struct device *dev)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun struct charlcd *lcd = dev_get_drvdata(dev);
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun /* Power the display off */
337*4882a593Smuzhiyun charlcd_4bit_command(lcd, HD_DISPCTRL);
338*4882a593Smuzhiyun return 0;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun
charlcd_resume(struct device * dev)341*4882a593Smuzhiyun static int charlcd_resume(struct device *dev)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun struct charlcd *lcd = dev_get_drvdata(dev);
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun /* Turn the display back on */
346*4882a593Smuzhiyun charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON);
347*4882a593Smuzhiyun return 0;
348*4882a593Smuzhiyun }
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun static const struct dev_pm_ops charlcd_pm_ops = {
351*4882a593Smuzhiyun .suspend = charlcd_suspend,
352*4882a593Smuzhiyun .resume = charlcd_resume,
353*4882a593Smuzhiyun };
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun static const struct of_device_id charlcd_match[] = {
356*4882a593Smuzhiyun { .compatible = "arm,versatile-lcd", },
357*4882a593Smuzhiyun {}
358*4882a593Smuzhiyun };
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun static struct platform_driver charlcd_driver = {
361*4882a593Smuzhiyun .driver = {
362*4882a593Smuzhiyun .name = DRIVERNAME,
363*4882a593Smuzhiyun .pm = &charlcd_pm_ops,
364*4882a593Smuzhiyun .suppress_bind_attrs = true,
365*4882a593Smuzhiyun .of_match_table = of_match_ptr(charlcd_match),
366*4882a593Smuzhiyun },
367*4882a593Smuzhiyun };
368*4882a593Smuzhiyun builtin_platform_driver_probe(charlcd_driver, charlcd_probe);
369