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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/power/
H A Dfsl,imx-gpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Philipp Zabel <p.zabel@pengutronix.de>
13 The i.MX6 General Power Control (GPC) block contains DVFS load tracking
17 Documentation/devicetree/bindings/power/power-domain.yaml. They are
18 described as subnodes of the power gating controller 'pgc' node of the GPC.
20 IP cores belonging to a power domain should contain a 'power-domains'
27 - fsl,imx6q-gpc
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/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dimx6qdl.dtsi9 * http://www.opensource.org/licenses/gpl-license.html
13 #include <dt-bindings/clock/imx6qdl-clock.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
52 #address-cells = <1>;
53 #size-cells = <0>;
56 compatible = "fsl,imx-ckil", "fixed-clock";
57 #clock-cells = <0>;
58 clock-frequency = <32768>;
62 compatible = "fsl,imx-ckih1", "fixed-clock";
63 #clock-cells = <0>;
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H A Dimx6ul.dtsi9 #include <dt-bindings/clock/imx6ul-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "imx6ul-pinfunc.h"
53 #address-cells = <1>;
54 #size-cells = <0>;
57 compatible = "arm,cortex-a7";
60 clock-latency = <61036>; /* two CLK32 periods */
61 operating-points = <
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H A Dimx6sl.dtsi10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include "imx6sl-pinfunc.h"
12 #include <dt-bindings/clock/imx6sl-clock.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
19 * pre-existing /chosen node to be available to insert the
21 * Also for U-Boot there must be a pre-existing /memory node.
47 #address-cells = <1>;
48 #size-cells = <0>;
51 compatible = "arm,cortex-a9";
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H A Dimx6sll.dtsi9 #include <dt-bindings/clock/imx6sll-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx6sll-pinfunc.h"
43 #address-cells = <1>;
44 #size-cells = <0>;
47 compatible = "arm,cortex-a9";
50 next-level-cache = <&L2>;
51 operating-points = <
58 fsl,soc-operating-points = <
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H A Dimx6ull.dtsi2 * Copyright 2015-2016 Freescale Semiconductor, Inc.
9 #include <dt-bindings/clock/imx6ul-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx6ull-pinfunc.h"
13 #include "imx6ull-pinfunc-snvs.h"
50 #address-cells = <1>;
51 #size-cells = <0>;
54 compatible = "arm,cortex-a7";
57 clock-latency = <61036>; /* two CLK32 periods */
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H A Dimx6sx.dtsi9 #include <dt-bindings/clock/imx6sx-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "imx6sx-pinfunc.h"
53 #address-cells = <1>;
54 #size-cells = <0>;
57 compatible = "arm,cortex-a9";
60 next-level-cache = <&L2>;
61 operating-points = <
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H A Dimx6q.dtsi11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include "imx6q-pinfunc.h"
22 #address-cells = <1>;
23 #size-cells = <0>;
26 compatible = "arm,cortex-a9";
29 next-level-cache = <&L2>;
30 operating-points = <
38 fsl,soc-operating-points = <
39 /* ARM kHz SOC-PU uV */
46 clock-latency = <61036>; /* two CLK32 periods */
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-imx/
H A Dpm-imx6.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2014 Freescale Semiconductor, Inc.
12 #include <linux/irqchip/arm-gic.h>
14 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
22 #include <asm/proc-fns.h>
145 0x27c, 0x498, 0x4a4, 0x490, /* SDCLK0, GPR_B0DS-B1DS, GPR_ADDS */
151 .mmdc_compat = "fsl,imx6q-mmdc",
152 .src_compat = "fsl,imx6q-src",
153 .iomuxc_compat = "fsl,imx6q-iomuxc",
154 .gpc_compat = "fsl,imx6q-gpc",
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H A Dgpc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2013 Freescale Semiconductor, Inc.
67 /* Tell GPC to power off ARM core when suspend */ in imx_gpc_pre_suspend()
82 /* Keep ARM core powered on for other low-power modes */ in imx_gpc_post_resume()
91 unsigned int idx = d->hwirq / 32; in imx_gpc_irq_set_wake()
94 mask = 1 << d->hwirq % 32; in imx_gpc_irq_set_wake()
100 * wake-up facility... in imx_gpc_irq_set_wake()
149 imx_gpc_hwirq_unmask(d->hwirq); in imx_gpc_irq_unmask()
155 imx_gpc_hwirq_mask(d->hwirq); in imx_gpc_irq_mask()
160 .name = "GPC",
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-y := cpu.o system.o irq-common.o
4 obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o pm-imx25.o
6 obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o mach-imx27.o
8 obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o mach-imx31.o
9 obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o mach-imx35.o
11 imx5-pm-$(CONFIG_PM) += pm-imx5.o
12 obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y)
14 obj-$(CONFIG_MXC_TZIC) += tzic.o
15 obj-$(CONFIG_MXC_AVIC) += avic.o
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H A Dsuspend-imx6.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <asm/asm-offsets.h>
9 #include <asm/hardware/cache-l2x0.h>
36 * which defined in arch/arm/mach-imx/pm-imx6q.c, this
133 /* let DDR out of self-refresh */
188 * put DDR explicitly into self-refresh and
195 /* make the DDR explicitly enter self-refresh. */
232 * mask all GPC interrupts before
267 /* unmask all the GPC interrupts. */
308 /* invalidate L1 I-cache first */
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dimx6qp.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 #include "imx6q.dtsi"
10 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
19 compatible = "mmio-sram";
22 #address-cells = <1>;
23 #size-cells = <1>;
29 compatible = "fsl,imx6qp-pre";
33 clock-names = "axi";
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H A Dimx6qdl.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx6qdl-clock.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 * pre-existing /chosen node to be available to insert the
54 compatible = "fsl,imx-ckil", "fixed-clock";
55 #clock-cells = <0>;
56 clock-frequency = <32768>;
[all …]
H A Dimx6sx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6sx-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6sx-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
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H A Dimx6sl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6sl-pinfunc.h"
7 #include <dt-bindings/clock/imx6sl-clock.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 * pre-existing /chosen node to be available to insert the
47 #address-cells = <1>;
48 #size-cells = <0>;
51 compatible = "arm,cortex-a9";
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H A Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
55 #address-cells = <1>;
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H A Dimx6sll.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright 2017-2018 NXP.
8 #include <dt-bindings/clock/imx6sll-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx6sll-pinfunc.h"
14 #address-cells = <1>;
15 #size-cells = <1>;
44 #address-cells = <1>;
45 #size-cells = <0>;
[all …]
H A Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
[all …]
/OK3568_Linux_fs/kernel/drivers/soc/imx/
H A Dgpc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2015-2017 Pengutronix, Lucas Stach <kernel@pengutronix.de>
4 * Copyright 2011-2013 Freescale Semiconductor, Inc.
66 regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PDNSCR_OFFS, &val); in imx6_pm_domain_power_off()
71 regmap_update_bits(pd->regmap, pd->reg_offs + GPC_PGC_CTRL_OFFS, in imx6_pm_domain_power_off()
74 /* Request GPC to power down domain */ in imx6_pm_domain_power_off()
75 val = BIT(pd->cntr_pdn_bit); in imx6_pm_domain_power_off()
76 regmap_update_bits(pd->regmap, GPC_CNTR, val, val); in imx6_pm_domain_power_off()
79 udelay(DIV_ROUND_UP(iso + iso2sw, pd->ipg_rate_mhz)); in imx6_pm_domain_power_off()
81 if (pd->supply) in imx6_pm_domain_power_off()
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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dimx8mq.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 #include <dt-bindings/clock/imx8mq-clock.h>
8 #include <dt-bindings/power/imx8mq-power.h>
9 #include <dt-bindings/reset/imx8mq-reset.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include "dt-bindings/input/input.h"
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mq-pinfunc.h"
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